| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-footbridge/include/mach/irqs.h |
| 3 | * |
| 4 | * Copyright (C) 1998 Russell King |
| 5 | * Copyright (C) 1998 Phil Blundell |
| 6 | * |
| 7 | * Changelog: |
| 8 | * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder |
| 9 | * 01-Feb-1999 PJB ISA IRQs start at 0 not 16 |
| 10 | */ |
| 11 | #include <asm/mach-types.h> |
| 12 | |
| 13 | #define NR_IRQS 36 |
| 14 | #define NR_DC21285_IRQS 16 |
| 15 | |
| 16 | #define _ISA_IRQ(x) (0 + (x)) |
| 17 | #define _ISA_INR(x) ((x) - 0) |
| 18 | #define _DC21285_IRQ(x) (16 + (x)) |
| 19 | #define _DC21285_INR(x) ((x) - 16) |
| 20 | |
| 21 | /* |
| 22 | * This is a list of all interrupts that the 21285 |
| 23 | * can generate and we handle. |
| 24 | */ |
| 25 | #define IRQ_CONRX _DC21285_IRQ(0) |
| 26 | #define IRQ_CONTX _DC21285_IRQ(1) |
| 27 | #define IRQ_TIMER1 _DC21285_IRQ(2) |
| 28 | #define IRQ_TIMER2 _DC21285_IRQ(3) |
| 29 | #define IRQ_TIMER3 _DC21285_IRQ(4) |
| 30 | #define IRQ_IN0 _DC21285_IRQ(5) |
| 31 | #define IRQ_IN1 _DC21285_IRQ(6) |
| 32 | #define IRQ_IN2 _DC21285_IRQ(7) |
| 33 | #define IRQ_IN3 _DC21285_IRQ(8) |
| 34 | #define IRQ_DOORBELLHOST _DC21285_IRQ(9) |
| 35 | #define IRQ_DMA1 _DC21285_IRQ(10) |
| 36 | #define IRQ_DMA2 _DC21285_IRQ(11) |
| 37 | #define IRQ_PCI _DC21285_IRQ(12) |
| 38 | #define IRQ_SDRAMPARITY _DC21285_IRQ(13) |
| 39 | #define IRQ_I2OINPOST _DC21285_IRQ(14) |
| 40 | #define IRQ_PCI_ABORT _DC21285_IRQ(15) |
| 41 | #define IRQ_PCI_SERR _DC21285_IRQ(16) |
| 42 | #define IRQ_DISCARD_TIMER _DC21285_IRQ(17) |
| 43 | #define IRQ_PCI_DPERR _DC21285_IRQ(18) |
| 44 | #define IRQ_PCI_PERR _DC21285_IRQ(19) |
| 45 | |
| 46 | #define IRQ_ISA_TIMER _ISA_IRQ(0) |
| 47 | #define IRQ_ISA_KEYBOARD _ISA_IRQ(1) |
| 48 | #define IRQ_ISA_CASCADE _ISA_IRQ(2) |
| 49 | #define IRQ_ISA_UART2 _ISA_IRQ(3) |
| 50 | #define IRQ_ISA_UART _ISA_IRQ(4) |
| 51 | #define IRQ_ISA_FLOPPY _ISA_IRQ(6) |
| 52 | #define IRQ_ISA_PRINTER _ISA_IRQ(7) |
| 53 | #define IRQ_ISA_RTC_ALARM _ISA_IRQ(8) |
| 54 | #define IRQ_ISA_2 _ISA_IRQ(9) |
| 55 | #define IRQ_ISA_PS2MOUSE _ISA_IRQ(12) |
| 56 | #define IRQ_ISA_HARDDISK1 _ISA_IRQ(14) |
| 57 | #define IRQ_ISA_HARDDISK2 _ISA_IRQ(15) |
| 58 | |
| 59 | #define IRQ_MASK_UART_RX (1 << 2) |
| 60 | #define IRQ_MASK_UART_TX (1 << 3) |
| 61 | #define IRQ_MASK_TIMER1 (1 << 4) |
| 62 | #define IRQ_MASK_TIMER2 (1 << 5) |
| 63 | #define IRQ_MASK_TIMER3 (1 << 6) |
| 64 | #define IRQ_MASK_IN0 (1 << 8) |
| 65 | #define IRQ_MASK_IN1 (1 << 9) |
| 66 | #define IRQ_MASK_IN2 (1 << 10) |
| 67 | #define IRQ_MASK_IN3 (1 << 11) |
| 68 | #define IRQ_MASK_DOORBELLHOST (1 << 15) |
| 69 | #define IRQ_MASK_DMA1 (1 << 16) |
| 70 | #define IRQ_MASK_DMA2 (1 << 17) |
| 71 | #define IRQ_MASK_PCI (1 << 18) |
| 72 | #define IRQ_MASK_SDRAMPARITY (1 << 24) |
| 73 | #define IRQ_MASK_I2OINPOST (1 << 25) |
| 74 | #define IRQ_MASK_PCI_ABORT ((1 << 29) | (1 << 30)) |
| 75 | #define IRQ_MASK_PCI_SERR (1 << 23) |
| 76 | #define IRQ_MASK_DISCARD_TIMER (1 << 27) |
| 77 | #define IRQ_MASK_PCI_DPERR (1 << 28) |
| 78 | #define IRQ_MASK_PCI_PERR (1 << 31) |
| 79 | |
| 80 | /* |
| 81 | * Netwinder interrupt allocations |
| 82 | */ |
| 83 | #define IRQ_NETWINDER_ETHER10 IRQ_IN0 |
| 84 | #define IRQ_NETWINDER_ETHER100 IRQ_IN1 |
| 85 | #define IRQ_NETWINDER_VIDCOMP IRQ_IN2 |
| 86 | #define IRQ_NETWINDER_PS2MOUSE _ISA_IRQ(5) |
| 87 | #define IRQ_NETWINDER_IR _ISA_IRQ(6) |
| 88 | #define IRQ_NETWINDER_BUTTON _ISA_IRQ(10) |
| 89 | #define IRQ_NETWINDER_VGA _ISA_IRQ(11) |
| 90 | #define IRQ_NETWINDER_SOUND _ISA_IRQ(12) |
| 91 | |
| 92 | #undef RTC_IRQ |
| 93 | #define RTC_IRQ IRQ_ISA_RTC_ALARM |
| 94 | #define I8042_KBD_IRQ IRQ_ISA_KEYBOARD |
| 95 | #define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE) |
| 96 | #define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY |
| 97 | |
| 98 | #define irq_canonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i) |