Blame - drivers/coresight/Kconfig - kernel/msm

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Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	1	menuconfig CORESIGHT
				2	bool "CoreSight Tracing Support"
Pratik Patel	2963de4	2012-05-17 12:43:40 -0700	[diff] [blame]	3	help
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	4	CoreSight components are compliant with the ARM CoreSight
				5	architecture specification and can be connected in various
				6	topologies to suite a particular SoCs tracing needs. These trace
				7	components can generally be classified as sources, links and
				8	sinks. Trace data produced by one or more sources flows through
				9	the intermediate links connecting the source to the currently
				10	selected sink.
Pratik Patel	2963de4	2012-05-17 12:43:40 -0700	[diff] [blame]	11
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	12	This framework provides an interface for the CoreSight debug and
				13	trace drivers to register themselves with. It's intended to build
				14	up a topological view of the CoreSight components and configure
				15	the right series of components on user input via sysfs. It also
				16	provides status information to user space applications through
				17	sysfs interface.
Pratik Patel	2963de4	2012-05-17 12:43:40 -0700	[diff] [blame]	18
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	19	If unsure, say 'N' here to avoid potential power, performance and
				20	memory penalty.
				21
				22	if CORESIGHT
				23
				24	config HAVE_CORESIGHT_SINK
				25	bool
				26
Pratik Patel	d944cc7	2013-02-08 11:52:12 -0800	[diff] [blame]	27	config CORESIGHT_CTI
				28	bool "CoreSight Cross Trigger Interface driver"
				29	help
				30	This driver provides support for Cross Trigger Interface that is
				31	used to input or output i.e. pass cross trigger events from one
				32	hardware component to another. It can also be used to pass
				33	software generated events.
				34
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	35	config CORESIGHT_CSR
				36	bool "CoreSight Slave Register driver"
				37	help
				38	This driver provides support for CoreSight Slave Register block
				39	that hosts miscellaneous configuration registers.
				40
				41	config CORESIGHT_TMC
				42	bool "CoreSight Trace Memory Controller driver"
Pratik Patel	d944cc7	2013-02-08 11:52:12 -0800	[diff] [blame]	43	select CORESIGHT_CTI
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	44	select CORESIGHT_CSR
				45	select HAVE_CORESIGHT_SINK
				46	help
				47	This driver provides support for Trace Memory Controller which
				48	can be configured as either an ETB (Embedded Trace Buffer),
				49	ETR (Embedded Trace Router) or ETF (Embedded Trace Fifo). It acts
				50	as sink when configured as ETB, ETR or ETF in circular buffer mode
				51	whereas it is a link when configured as ETF in hardware fifo mode.
				52
				53	ETB collects trace data in a circular buffer whereas ETR can be
				54	used to route trace data to memory allocated in RAM. ETF in
				55	circular buffer mode is like an ETB whereas in hardware fifo mode
				56	it is a fifo link.
				57
				58	config CORESIGHT_TPIU
				59	bool "CoreSight Trace Port Interface Unit driver"
				60	select HAVE_CORESIGHT_SINK
				61	help
				62	This driver provides support for Trace Port Interface Unit which
				63	acts as a conduit for offchip trace collection.
				64
				65	config CORESIGHT_ETB
				66	bool "CoreSight Embedded Trace Buffer driver"
				67	select HAVE_CORESIGHT_SINK
				68	help
				69	This driver provides support for the legacy Embedded Trace Buffer
				70	which is a circular buffer.
				71
				72	if HAVE_CORESIGHT_SINK
				73
				74	config CORESIGHT_FUNNEL
				75	bool "CoreSight Funnel driver"
				76	help
				77	This driver provides support for Funnel which is a link that
				78	typically has multiple input ports and a single output port. Input
				79	trace data streams from the input ports are interleaved into a
				80	single output trace data stream coming out of the output port.
				81
				82	config CORESIGHT_REPLICATOR
				83	bool "CoreSight Replicator driver"
				84	help
				85	This driver provides support for Replicator that typically has
				86	a single input port and two output ports. Single trace data
				87	stream on the input port is replicated to produce two identical
				88	trace data output streams coming out of the two output ports.
				89
				90	config CORESIGHT_STM
				91	bool "CoreSight System Trace Macrocell driver"
				92	help
				93	This driver provides support for hardware assisted software
				94	instrumentation based tracing. This is primarily useful for
				95	logging useful software events or data.
				96
				97	config CORESIGHT_STM_DEFAULT_ENABLE
				98	bool "Turn on STM tracing by default"
				99	depends on CORESIGHT_STM
Pratik Patel	2963de4	2012-05-17 12:43:40 -0700	[diff] [blame]	100	help
				101	Turns on CoreSight STM tracing (hardware assisted software
				102	instrumentation based tracing) by default. Otherwise, tracing is
				103	disabled by default but can be enabled via sysfs.
				104
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	105	If unsure, say 'N' here to avoid potential power and performance
				106	penalty.
Pratik Patel	2963de4	2012-05-17 12:43:40 -0700	[diff] [blame]	107
Aparna Das	3b8a708	2013-04-02 13:51:13 -0700	[diff] [blame]	108	config CORESIGHT_HWEVENT
				109	bool "CoreSight Hardware Event driver"
				110	depends on CORESIGHT_STM
				111	select CORESIGHT_CSR
				112	help
				113	This driver provides support for monitoring and tracing CoreSight
				114	Hardware Event across STM interface. It configures Coresight
				115	Hardware Event mux control registers to select hardware events
				116	based on user input.
				117
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	118	config CORESIGHT_ETM
				119	bool "CoreSight Embedded Trace Macrocell driver"
				120	help
				121	This driver provides support for processor tracing which allows
				122	tracing the instructions that the processor is executing. This is
				123	primarily useful for instruction level tracing.
				124
				125	config CORESIGHT_ETM_DEFAULT_ENABLE
				126	bool "Turn on ETM tracing by default"
				127	depends on CORESIGHT_ETM
Pratik Patel	2963de4	2012-05-17 12:43:40 -0700	[diff] [blame]	128	help
				129	Turns on CoreSight ETM tracing (processor tracing) by default.
				130	Otherwise, tracing is disabled by default but can be enabled via
				131	sysfs.
				132
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	133	If unsure, say 'N' here to avoid potential power and performance
				134	penalty.
Pushkar Joshi	61af718	2012-09-12 14:29:23 -0700	[diff] [blame]	135
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	136	config CORESIGHT_ETM_PCSAVE_DEFAULT_ENABLE
Pratik Patel	938e1ff	2012-09-28 23:21:46 -0700	[diff] [blame]	137	bool "Turn on PC saving by default"
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	138	depends on CORESIGHT_ETM
Pratik Patel	938e1ff	2012-09-28 23:21:46 -0700	[diff] [blame]	139	help
				140	Turns on program counter saving on reset by default. Otherwise,
				141	PC saving is disabled by default but can be enabled via sysfs.
				142
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	143	If unsure, say 'N' here to avoid potential power penalty.
Pratik Patel	938e1ff	2012-09-28 23:21:46 -0700	[diff] [blame]	144
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	145	endif
				146
				147	config CORESIGHT_EVENT
				148	tristate "CoreSight Event driver"
Pushkar Joshi	61af718	2012-09-12 14:29:23 -0700	[diff] [blame]	149	help
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	150	This driver provides support for registering with various events
				151	and performing CoreSight actions like aborting trace on their
				152	occurrence.
Pushkar Joshi	61af718	2012-09-12 14:29:23 -0700	[diff] [blame]	153
Pratik Patel	61e9170	2013-01-27 20:30:42 -0800	[diff] [blame]	154	endif