blob: c521bf6e1bf2760f4034ac034fefe005ac5699ea [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Support for IDE interfaces on PowerMacs.
Bartlomiej Zolnierkiewicz58f189f2008-02-01 23:09:33 +01003 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * These IDE interfaces are memory-mapped and have a DBDMA channel
5 * for doing DMA.
6 *
7 * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +02008 * Copyright (C) 2007-2008 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 *
15 * Some code taken from drivers/ide/ide-dma.c:
16 *
17 * Copyright (c) 1995-1998 Mark Lord
18 *
19 * TODO: - Use pre-calculated (kauai) timing tables all the time and
20 * get rid of the "rounded" tables used previously, so we have the
21 * same table format for all controllers and can then just have one
22 * big table
23 *
24 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <linux/types.h>
26#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/ide.h>
30#include <linux/notifier.h>
31#include <linux/reboot.h>
32#include <linux/pci.h>
33#include <linux/adb.h>
34#include <linux/pmu.h>
35#include <linux/scatterlist.h>
36
37#include <asm/prom.h>
38#include <asm/io.h>
39#include <asm/dbdma.h>
40#include <asm/ide.h>
41#include <asm/pci-bridge.h>
42#include <asm/machdep.h>
43#include <asm/pmac_feature.h>
44#include <asm/sections.h>
45#include <asm/irq.h>
46
47#ifndef CONFIG_PPC64
48#include <asm/mediabay.h>
49#endif
50
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +020051#define DRV_NAME "ide-pmac"
52
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#undef IDE_PMAC_DEBUG
54
55#define DMA_WAIT_TIMEOUT 50
56
57typedef struct pmac_ide_hwif {
58 unsigned long regbase;
59 int irq;
60 int kind;
61 int aapl_bus_id;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 unsigned mediabay : 1;
63 unsigned broken_dma : 1;
64 unsigned broken_dma_warn : 1;
65 struct device_node* node;
66 struct macio_dev *mdev;
67 u32 timings[4];
68 volatile u32 __iomem * *kauai_fcr;
69#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
70 /* Those fields are duplicating what is in hwif. We currently
71 * can't use the hwif ones because of some assumptions that are
72 * beeing done by the generic code about the kind of dma controller
73 * and format of the dma table. This will have to be fixed though.
74 */
75 volatile struct dbdma_regs __iomem * dma_regs;
76 struct dbdma_cmd* dma_table_cpu;
77#endif
78
79} pmac_ide_hwif_t;
80
Linus Torvalds1da177e2005-04-16 15:20:36 -070081enum {
82 controller_ohare, /* OHare based */
83 controller_heathrow, /* Heathrow/Paddington */
84 controller_kl_ata3, /* KeyLargo ATA-3 */
85 controller_kl_ata4, /* KeyLargo ATA-4 */
86 controller_un_ata6, /* UniNorth2 ATA-6 */
87 controller_k2_ata6, /* K2 ATA-6 */
88 controller_sh_ata6, /* Shasta ATA-6 */
89};
90
91static const char* model_name[] = {
92 "OHare ATA", /* OHare based */
93 "Heathrow ATA", /* Heathrow/Paddington */
94 "KeyLargo ATA-3", /* KeyLargo ATA-3 (MDMA only) */
95 "KeyLargo ATA-4", /* KeyLargo ATA-4 (UDMA/66) */
96 "UniNorth ATA-6", /* UniNorth2 ATA-6 (UDMA/100) */
97 "K2 ATA-6", /* K2 ATA-6 (UDMA/100) */
98 "Shasta ATA-6", /* Shasta ATA-6 (UDMA/133) */
99};
100
101/*
102 * Extra registers, both 32-bit little-endian
103 */
104#define IDE_TIMING_CONFIG 0x200
105#define IDE_INTERRUPT 0x300
106
107/* Kauai (U2) ATA has different register setup */
108#define IDE_KAUAI_PIO_CONFIG 0x200
109#define IDE_KAUAI_ULTRA_CONFIG 0x210
110#define IDE_KAUAI_POLL_CONFIG 0x220
111
112/*
113 * Timing configuration register definitions
114 */
115
116/* Number of IDE_SYSCLK_NS ticks, argument is in nanoseconds */
117#define SYSCLK_TICKS(t) (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)
118#define SYSCLK_TICKS_66(t) (((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS)
119#define IDE_SYSCLK_NS 30 /* 33Mhz cell */
120#define IDE_SYSCLK_66_NS 15 /* 66Mhz cell */
121
122/* 133Mhz cell, found in shasta.
123 * See comments about 100 Mhz Uninorth 2...
124 * Note that PIO_MASK and MDMA_MASK seem to overlap
125 */
126#define TR_133_PIOREG_PIO_MASK 0xff000fff
127#define TR_133_PIOREG_MDMA_MASK 0x00fff800
128#define TR_133_UDMAREG_UDMA_MASK 0x0003ffff
129#define TR_133_UDMAREG_UDMA_EN 0x00000001
130
131/* 100Mhz cell, found in Uninorth 2. I don't have much infos about
132 * this one yet, it appears as a pci device (106b/0033) on uninorth
133 * internal PCI bus and it's clock is controlled like gem or fw. It
134 * appears to be an evolution of keylargo ATA4 with a timing register
135 * extended to 2 32bits registers and a similar DBDMA channel. Other
136 * registers seem to exist but I can't tell much about them.
137 *
138 * So far, I'm using pre-calculated tables for this extracted from
139 * the values used by the MacOS X driver.
140 *
141 * The "PIO" register controls PIO and MDMA timings, the "ULTRA"
142 * register controls the UDMA timings. At least, it seems bit 0
143 * of this one enables UDMA vs. MDMA, and bits 4..7 are the
144 * cycle time in units of 10ns. Bits 8..15 are used by I don't
145 * know their meaning yet
146 */
147#define TR_100_PIOREG_PIO_MASK 0xff000fff
148#define TR_100_PIOREG_MDMA_MASK 0x00fff000
149#define TR_100_UDMAREG_UDMA_MASK 0x0000ffff
150#define TR_100_UDMAREG_UDMA_EN 0x00000001
151
152
153/* 66Mhz cell, found in KeyLargo. Can do ultra mode 0 to 2 on
154 * 40 connector cable and to 4 on 80 connector one.
155 * Clock unit is 15ns (66Mhz)
156 *
157 * 3 Values can be programmed:
158 * - Write data setup, which appears to match the cycle time. They
159 * also call it DIOW setup.
160 * - Ready to pause time (from spec)
161 * - Address setup. That one is weird. I don't see where exactly
162 * it fits in UDMA cycles, I got it's name from an obscure piece
163 * of commented out code in Darwin. They leave it to 0, we do as
164 * well, despite a comment that would lead to think it has a
165 * min value of 45ns.
166 * Apple also add 60ns to the write data setup (or cycle time ?) on
167 * reads.
168 */
169#define TR_66_UDMA_MASK 0xfff00000
170#define TR_66_UDMA_EN 0x00100000 /* Enable Ultra mode for DMA */
171#define TR_66_UDMA_ADDRSETUP_MASK 0xe0000000 /* Address setup */
172#define TR_66_UDMA_ADDRSETUP_SHIFT 29
173#define TR_66_UDMA_RDY2PAUS_MASK 0x1e000000 /* Ready 2 pause time */
174#define TR_66_UDMA_RDY2PAUS_SHIFT 25
175#define TR_66_UDMA_WRDATASETUP_MASK 0x01e00000 /* Write data setup time */
176#define TR_66_UDMA_WRDATASETUP_SHIFT 21
177#define TR_66_MDMA_MASK 0x000ffc00
178#define TR_66_MDMA_RECOVERY_MASK 0x000f8000
179#define TR_66_MDMA_RECOVERY_SHIFT 15
180#define TR_66_MDMA_ACCESS_MASK 0x00007c00
181#define TR_66_MDMA_ACCESS_SHIFT 10
182#define TR_66_PIO_MASK 0x000003ff
183#define TR_66_PIO_RECOVERY_MASK 0x000003e0
184#define TR_66_PIO_RECOVERY_SHIFT 5
185#define TR_66_PIO_ACCESS_MASK 0x0000001f
186#define TR_66_PIO_ACCESS_SHIFT 0
187
188/* 33Mhz cell, found in OHare, Heathrow (& Paddington) and KeyLargo
189 * Can do pio & mdma modes, clock unit is 30ns (33Mhz)
190 *
191 * The access time and recovery time can be programmed. Some older
192 * Darwin code base limit OHare to 150ns cycle time. I decided to do
193 * the same here fore safety against broken old hardware ;)
194 * The HalfTick bit, when set, adds half a clock (15ns) to the access
195 * time and removes one from recovery. It's not supported on KeyLargo
196 * implementation afaik. The E bit appears to be set for PIO mode 0 and
197 * is used to reach long timings used in this mode.
198 */
199#define TR_33_MDMA_MASK 0x003ff800
200#define TR_33_MDMA_RECOVERY_MASK 0x001f0000
201#define TR_33_MDMA_RECOVERY_SHIFT 16
202#define TR_33_MDMA_ACCESS_MASK 0x0000f800
203#define TR_33_MDMA_ACCESS_SHIFT 11
204#define TR_33_MDMA_HALFTICK 0x00200000
205#define TR_33_PIO_MASK 0x000007ff
206#define TR_33_PIO_E 0x00000400
207#define TR_33_PIO_RECOVERY_MASK 0x000003e0
208#define TR_33_PIO_RECOVERY_SHIFT 5
209#define TR_33_PIO_ACCESS_MASK 0x0000001f
210#define TR_33_PIO_ACCESS_SHIFT 0
211
212/*
213 * Interrupt register definitions
214 */
215#define IDE_INTR_DMA 0x80000000
216#define IDE_INTR_DEVICE 0x40000000
217
218/*
219 * FCR Register on Kauai. Not sure what bit 0x4 is ...
220 */
221#define KAUAI_FCR_UATA_MAGIC 0x00000004
222#define KAUAI_FCR_UATA_RESET_N 0x00000002
223#define KAUAI_FCR_UATA_ENABLE 0x00000001
224
225#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
226
227/* Rounded Multiword DMA timings
228 *
229 * I gave up finding a generic formula for all controller
230 * types and instead, built tables based on timing values
231 * used by Apple in Darwin's implementation.
232 */
233struct mdma_timings_t {
234 int accessTime;
235 int recoveryTime;
236 int cycleTime;
237};
238
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500239struct mdma_timings_t mdma_timings_33[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240{
241 { 240, 240, 480 },
242 { 180, 180, 360 },
243 { 135, 135, 270 },
244 { 120, 120, 240 },
245 { 105, 105, 210 },
246 { 90, 90, 180 },
247 { 75, 75, 150 },
248 { 75, 45, 120 },
249 { 0, 0, 0 }
250};
251
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500252struct mdma_timings_t mdma_timings_33k[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253{
254 { 240, 240, 480 },
255 { 180, 180, 360 },
256 { 150, 150, 300 },
257 { 120, 120, 240 },
258 { 90, 120, 210 },
259 { 90, 90, 180 },
260 { 90, 60, 150 },
261 { 90, 30, 120 },
262 { 0, 0, 0 }
263};
264
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500265struct mdma_timings_t mdma_timings_66[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266{
267 { 240, 240, 480 },
268 { 180, 180, 360 },
269 { 135, 135, 270 },
270 { 120, 120, 240 },
271 { 105, 105, 210 },
272 { 90, 90, 180 },
273 { 90, 75, 165 },
274 { 75, 45, 120 },
275 { 0, 0, 0 }
276};
277
278/* KeyLargo ATA-4 Ultra DMA timings (rounded) */
279struct {
280 int addrSetup; /* ??? */
281 int rdy2pause;
282 int wrDataSetup;
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500283} kl66_udma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284{
285 { 0, 180, 120 }, /* Mode 0 */
286 { 0, 150, 90 }, /* 1 */
287 { 0, 120, 60 }, /* 2 */
288 { 0, 90, 45 }, /* 3 */
289 { 0, 90, 30 } /* 4 */
290};
291
292/* UniNorth 2 ATA/100 timings */
293struct kauai_timing {
294 int cycle_time;
295 u32 timing_reg;
296};
297
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500298static struct kauai_timing kauai_pio_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299{
300 { 930 , 0x08000fff },
301 { 600 , 0x08000a92 },
302 { 383 , 0x0800060f },
303 { 360 , 0x08000492 },
304 { 330 , 0x0800048f },
305 { 300 , 0x080003cf },
306 { 270 , 0x080003cc },
307 { 240 , 0x0800038b },
308 { 239 , 0x0800030c },
309 { 180 , 0x05000249 },
Bartlomiej Zolnierkiewiczc15d5d42007-10-11 23:54:01 +0200310 { 120 , 0x04000148 },
311 { 0 , 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312};
313
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500314static struct kauai_timing kauai_mdma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315{
316 { 1260 , 0x00fff000 },
317 { 480 , 0x00618000 },
318 { 360 , 0x00492000 },
319 { 270 , 0x0038e000 },
320 { 240 , 0x0030c000 },
321 { 210 , 0x002cb000 },
322 { 180 , 0x00249000 },
323 { 150 , 0x00209000 },
324 { 120 , 0x00148000 },
325 { 0 , 0 },
326};
327
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500328static struct kauai_timing kauai_udma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329{
330 { 120 , 0x000070c0 },
331 { 90 , 0x00005d80 },
332 { 60 , 0x00004a60 },
333 { 45 , 0x00003a50 },
334 { 30 , 0x00002a30 },
335 { 20 , 0x00002921 },
336 { 0 , 0 },
337};
338
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500339static struct kauai_timing shasta_pio_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340{
341 { 930 , 0x08000fff },
342 { 600 , 0x0A000c97 },
343 { 383 , 0x07000712 },
344 { 360 , 0x040003cd },
345 { 330 , 0x040003cd },
346 { 300 , 0x040003cd },
347 { 270 , 0x040003cd },
348 { 240 , 0x040003cd },
349 { 239 , 0x040003cd },
350 { 180 , 0x0400028b },
Bartlomiej Zolnierkiewiczc15d5d42007-10-11 23:54:01 +0200351 { 120 , 0x0400010a },
352 { 0 , 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353};
354
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500355static struct kauai_timing shasta_mdma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356{
357 { 1260 , 0x00fff000 },
358 { 480 , 0x00820800 },
359 { 360 , 0x00820800 },
360 { 270 , 0x00820800 },
361 { 240 , 0x00820800 },
362 { 210 , 0x00820800 },
363 { 180 , 0x00820800 },
364 { 150 , 0x0028b000 },
365 { 120 , 0x001ca000 },
366 { 0 , 0 },
367};
368
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500369static struct kauai_timing shasta_udma133_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370{
371 { 120 , 0x00035901, },
372 { 90 , 0x000348b1, },
373 { 60 , 0x00033881, },
374 { 45 , 0x00033861, },
375 { 30 , 0x00033841, },
376 { 20 , 0x00033031, },
377 { 15 , 0x00033021, },
378 { 0 , 0 },
379};
380
381
382static inline u32
383kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
384{
385 int i;
386
387 for (i=0; table[i].cycle_time; i++)
388 if (cycle_time > table[i+1].cycle_time)
389 return table[i].timing_reg;
Bartlomiej Zolnierkiewicz90a87ea2007-10-13 17:47:48 +0200390 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391 return 0;
392}
393
394/* allow up to 256 DBDMA commands per xfer */
395#define MAX_DCMDS 256
396
397/*
398 * Wait 1s for disk to answer on IDE bus after a hard reset
399 * of the device (via GPIO/FCR).
400 *
401 * Some devices seem to "pollute" the bus even after dropping
402 * the BSY bit (typically some combo drives slave on the UDMA
403 * bus) after a hard reset. Since we hard reset all drives on
404 * KeyLargo ATA66, we have to keep that delay around. I may end
405 * up not hard resetting anymore on these and keep the delay only
406 * for older interfaces instead (we have to reset when coming
407 * from MacOS...) --BenH.
408 */
409#define IDE_WAKEUP_DELAY (1*HZ)
410
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +0200411static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413static void pmac_ide_selectproc(ide_drive_t *drive);
414static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
415
416#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
417
Bartlomiej Zolnierkiewicz23579a22008-04-18 00:46:26 +0200418#define PMAC_IDE_REG(x) \
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200419 ((void __iomem *)((drive)->hwif->io_ports.data_addr + (x)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420
421/*
422 * Apply the timings of the proper unit (master/slave) to the shared
423 * timing register when selecting that unit. This version is for
424 * ASICs with a single timing register
425 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500426static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427pmac_ide_selectproc(ide_drive_t *drive)
428{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200429 ide_hwif_t *hwif = drive->hwif;
430 pmac_ide_hwif_t *pmif =
431 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432
433 if (pmif == NULL)
434 return;
435
436 if (drive->select.b.unit & 0x01)
437 writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG));
438 else
439 writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG));
440 (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
441}
442
443/*
444 * Apply the timings of the proper unit (master/slave) to the shared
445 * timing register when selecting that unit. This version is for
446 * ASICs with a dual timing register (Kauai)
447 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500448static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449pmac_ide_kauai_selectproc(ide_drive_t *drive)
450{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200451 ide_hwif_t *hwif = drive->hwif;
452 pmac_ide_hwif_t *pmif =
453 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454
455 if (pmif == NULL)
456 return;
457
458 if (drive->select.b.unit & 0x01) {
459 writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
460 writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
461 } else {
462 writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
463 writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
464 }
465 (void)readl(PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
466}
467
468/*
469 * Force an update of controller timing values for a given drive
470 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500471static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472pmac_ide_do_update_timings(ide_drive_t *drive)
473{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200474 ide_hwif_t *hwif = drive->hwif;
475 pmac_ide_hwif_t *pmif =
476 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700477
478 if (pmif == NULL)
479 return;
480
481 if (pmif->kind == controller_sh_ata6 ||
482 pmif->kind == controller_un_ata6 ||
483 pmif->kind == controller_k2_ata6)
484 pmac_ide_kauai_selectproc(drive);
485 else
486 pmac_ide_selectproc(drive);
487}
488
Bartlomiej Zolnierkiewiczc6dfa862008-07-23 19:55:51 +0200489static void pmac_exec_command(ide_hwif_t *hwif, u8 cmd)
490{
491 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
492 (void)readl((void __iomem *)(hwif->io_ports.data_addr
493 + IDE_TIMING_CONFIG));
494}
495
Bartlomiej Zolnierkiewicz6e6afb32008-07-23 19:55:52 +0200496static void pmac_set_irq(ide_hwif_t *hwif, int on)
497{
498 u8 ctl = ATA_DEVCTL_OBS;
499
500 if (on == 4) { /* hack for SRST */
501 ctl |= 4;
502 on &= ~4;
503 }
504
505 ctl |= on ? 0 : 2;
506
507 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
508 (void)readl((void __iomem *)(hwif->io_ports.data_addr
509 + IDE_TIMING_CONFIG));
510}
511
Linus Torvalds1da177e2005-04-16 15:20:36 -0700512/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 * Old tuning functions (called on hdparm -p), sets up drive PIO timings
514 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500515static void
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200516pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200518 ide_hwif_t *hwif = drive->hwif;
519 pmac_ide_hwif_t *pmif =
520 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200521 struct ide_timing *tim = ide_timing_find_mode(XFER_PIO_0 + pio);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200522 u32 *timings, t;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 unsigned accessTicks, recTicks;
524 unsigned accessTime, recTime;
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200525 unsigned int cycle_time;
526
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527 if (pmif == NULL)
528 return;
529
530 /* which drive is it ? */
531 timings = &pmif->timings[drive->select.b.unit & 0x01];
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200532 t = *timings;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200534 cycle_time = ide_pio_cycle_time(drive, pio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535
536 switch (pmif->kind) {
537 case controller_sh_ata6: {
538 /* 133Mhz cell */
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200539 u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200540 t = (t & ~TR_133_PIOREG_PIO_MASK) | tr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541 break;
542 }
543 case controller_un_ata6:
544 case controller_k2_ata6: {
545 /* 100Mhz cell */
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200546 u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200547 t = (t & ~TR_100_PIOREG_PIO_MASK) | tr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548 break;
549 }
550 case controller_kl_ata4:
551 /* 66Mhz cell */
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200552 recTime = cycle_time - tim->active - tim->setup;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 recTime = max(recTime, 150U);
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200554 accessTime = tim->active;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555 accessTime = max(accessTime, 150U);
556 accessTicks = SYSCLK_TICKS_66(accessTime);
557 accessTicks = min(accessTicks, 0x1fU);
558 recTicks = SYSCLK_TICKS_66(recTime);
559 recTicks = min(recTicks, 0x1fU);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200560 t = (t & ~TR_66_PIO_MASK) |
561 (accessTicks << TR_66_PIO_ACCESS_SHIFT) |
562 (recTicks << TR_66_PIO_RECOVERY_SHIFT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 break;
564 default: {
565 /* 33Mhz cell */
566 int ebit = 0;
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200567 recTime = cycle_time - tim->active - tim->setup;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700568 recTime = max(recTime, 150U);
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200569 accessTime = tim->active;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570 accessTime = max(accessTime, 150U);
571 accessTicks = SYSCLK_TICKS(accessTime);
572 accessTicks = min(accessTicks, 0x1fU);
573 accessTicks = max(accessTicks, 4U);
574 recTicks = SYSCLK_TICKS(recTime);
575 recTicks = min(recTicks, 0x1fU);
576 recTicks = max(recTicks, 5U) - 4;
577 if (recTicks > 9) {
578 recTicks--; /* guess, but it's only for PIO0, so... */
579 ebit = 1;
580 }
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200581 t = (t & ~TR_33_PIO_MASK) |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 (accessTicks << TR_33_PIO_ACCESS_SHIFT) |
583 (recTicks << TR_33_PIO_RECOVERY_SHIFT);
584 if (ebit)
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200585 t |= TR_33_PIO_E;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586 break;
587 }
588 }
589
590#ifdef IDE_PMAC_DEBUG
591 printk(KERN_ERR "%s: Set PIO timing for mode %d, reg: 0x%08x\n",
592 drive->name, pio, *timings);
593#endif
594
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200595 *timings = t;
Bartlomiej Zolnierkiewiczc15d5d42007-10-11 23:54:01 +0200596 pmac_ide_do_update_timings(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700597}
598
599#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
600
601/*
602 * Calculate KeyLargo ATA/66 UDMA timings
603 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500604static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605set_timings_udma_ata4(u32 *timings, u8 speed)
606{
607 unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks;
608
609 if (speed > XFER_UDMA_4)
610 return 1;
611
612 rdyToPauseTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].rdy2pause);
613 wrDataSetupTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].wrDataSetup);
614 addrTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].addrSetup);
615
616 *timings = ((*timings) & ~(TR_66_UDMA_MASK | TR_66_MDMA_MASK)) |
617 (wrDataSetupTicks << TR_66_UDMA_WRDATASETUP_SHIFT) |
618 (rdyToPauseTicks << TR_66_UDMA_RDY2PAUS_SHIFT) |
619 (addrTicks <<TR_66_UDMA_ADDRSETUP_SHIFT) |
620 TR_66_UDMA_EN;
621#ifdef IDE_PMAC_DEBUG
622 printk(KERN_ERR "ide_pmac: Set UDMA timing for mode %d, reg: 0x%08x\n",
623 speed & 0xf, *timings);
624#endif
625
626 return 0;
627}
628
629/*
630 * Calculate Kauai ATA/100 UDMA timings
631 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500632static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
634{
635 struct ide_timing *t = ide_timing_find_mode(speed);
636 u32 tr;
637
638 if (speed > XFER_UDMA_5 || t == NULL)
639 return 1;
640 tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641 *ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr;
642 *ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN;
643
644 return 0;
645}
646
647/*
648 * Calculate Shasta ATA/133 UDMA timings
649 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500650static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
652{
653 struct ide_timing *t = ide_timing_find_mode(speed);
654 u32 tr;
655
656 if (speed > XFER_UDMA_6 || t == NULL)
657 return 1;
658 tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 *ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr;
660 *ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN;
661
662 return 0;
663}
664
665/*
666 * Calculate MDMA timings for all cells
667 */
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200668static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700669set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200670 u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671{
672 int cycleTime, accessTime = 0, recTime = 0;
673 unsigned accessTicks, recTicks;
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200674 struct hd_driveid *id = drive->id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700675 struct mdma_timings_t* tm = NULL;
676 int i;
677
678 /* Get default cycle time for mode */
679 switch(speed & 0xf) {
680 case 0: cycleTime = 480; break;
681 case 1: cycleTime = 150; break;
682 case 2: cycleTime = 120; break;
683 default:
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200684 BUG();
685 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700686 }
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200687
688 /* Check if drive provides explicit DMA cycle time */
689 if ((id->field_valid & 2) && id->eide_dma_time)
690 cycleTime = max_t(int, id->eide_dma_time, cycleTime);
691
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692 /* OHare limits according to some old Apple sources */
693 if ((intf_type == controller_ohare) && (cycleTime < 150))
694 cycleTime = 150;
695 /* Get the proper timing array for this controller */
696 switch(intf_type) {
697 case controller_sh_ata6:
698 case controller_un_ata6:
699 case controller_k2_ata6:
700 break;
701 case controller_kl_ata4:
702 tm = mdma_timings_66;
703 break;
704 case controller_kl_ata3:
705 tm = mdma_timings_33k;
706 break;
707 default:
708 tm = mdma_timings_33;
709 break;
710 }
711 if (tm != NULL) {
712 /* Lookup matching access & recovery times */
713 i = -1;
714 for (;;) {
715 if (tm[i+1].cycleTime < cycleTime)
716 break;
717 i++;
718 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719 cycleTime = tm[i].cycleTime;
720 accessTime = tm[i].accessTime;
721 recTime = tm[i].recoveryTime;
722
723#ifdef IDE_PMAC_DEBUG
724 printk(KERN_ERR "%s: MDMA, cycleTime: %d, accessTime: %d, recTime: %d\n",
725 drive->name, cycleTime, accessTime, recTime);
726#endif
727 }
728 switch(intf_type) {
729 case controller_sh_ata6: {
730 /* 133Mhz cell */
731 u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732 *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;
733 *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN;
734 }
735 case controller_un_ata6:
736 case controller_k2_ata6: {
737 /* 100Mhz cell */
738 u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739 *timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr;
740 *timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN;
741 }
742 break;
743 case controller_kl_ata4:
744 /* 66Mhz cell */
745 accessTicks = SYSCLK_TICKS_66(accessTime);
746 accessTicks = min(accessTicks, 0x1fU);
747 accessTicks = max(accessTicks, 0x1U);
748 recTicks = SYSCLK_TICKS_66(recTime);
749 recTicks = min(recTicks, 0x1fU);
750 recTicks = max(recTicks, 0x3U);
751 /* Clear out mdma bits and disable udma */
752 *timings = ((*timings) & ~(TR_66_MDMA_MASK | TR_66_UDMA_MASK)) |
753 (accessTicks << TR_66_MDMA_ACCESS_SHIFT) |
754 (recTicks << TR_66_MDMA_RECOVERY_SHIFT);
755 break;
756 case controller_kl_ata3:
757 /* 33Mhz cell on KeyLargo */
758 accessTicks = SYSCLK_TICKS(accessTime);
759 accessTicks = max(accessTicks, 1U);
760 accessTicks = min(accessTicks, 0x1fU);
761 accessTime = accessTicks * IDE_SYSCLK_NS;
762 recTicks = SYSCLK_TICKS(recTime);
763 recTicks = max(recTicks, 1U);
764 recTicks = min(recTicks, 0x1fU);
765 *timings = ((*timings) & ~TR_33_MDMA_MASK) |
766 (accessTicks << TR_33_MDMA_ACCESS_SHIFT) |
767 (recTicks << TR_33_MDMA_RECOVERY_SHIFT);
768 break;
769 default: {
770 /* 33Mhz cell on others */
771 int halfTick = 0;
772 int origAccessTime = accessTime;
773 int origRecTime = recTime;
774
775 accessTicks = SYSCLK_TICKS(accessTime);
776 accessTicks = max(accessTicks, 1U);
777 accessTicks = min(accessTicks, 0x1fU);
778 accessTime = accessTicks * IDE_SYSCLK_NS;
779 recTicks = SYSCLK_TICKS(recTime);
780 recTicks = max(recTicks, 2U) - 1;
781 recTicks = min(recTicks, 0x1fU);
782 recTime = (recTicks + 1) * IDE_SYSCLK_NS;
783 if ((accessTicks > 1) &&
784 ((accessTime - IDE_SYSCLK_NS/2) >= origAccessTime) &&
785 ((recTime - IDE_SYSCLK_NS/2) >= origRecTime)) {
786 halfTick = 1;
787 accessTicks--;
788 }
789 *timings = ((*timings) & ~TR_33_MDMA_MASK) |
790 (accessTicks << TR_33_MDMA_ACCESS_SHIFT) |
791 (recTicks << TR_33_MDMA_RECOVERY_SHIFT);
792 if (halfTick)
793 *timings |= TR_33_MDMA_HALFTICK;
794 }
795 }
796#ifdef IDE_PMAC_DEBUG
797 printk(KERN_ERR "%s: Set MDMA timing for mode %d, reg: 0x%08x\n",
798 drive->name, speed & 0xf, *timings);
799#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700800}
801#endif /* #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC */
802
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200803static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200805 ide_hwif_t *hwif = drive->hwif;
806 pmac_ide_hwif_t *pmif =
807 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700808 int unit = (drive->select.b.unit & 0x01);
809 int ret = 0;
Bartlomiej Zolnierkiewicz085798b2007-10-13 17:47:48 +0200810 u32 *timings, *timings2, tl[2];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812 timings = &pmif->timings[unit];
813 timings2 = &pmif->timings[unit+2];
Bartlomiej Zolnierkiewicz085798b2007-10-13 17:47:48 +0200814
815 /* Copy timings to local image */
816 tl[0] = *timings;
817 tl[1] = *timings2;
818
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100820 if (speed >= XFER_UDMA_0) {
821 if (pmif->kind == controller_kl_ata4)
822 ret = set_timings_udma_ata4(&tl[0], speed);
823 else if (pmif->kind == controller_un_ata6
824 || pmif->kind == controller_k2_ata6)
825 ret = set_timings_udma_ata6(&tl[0], &tl[1], speed);
826 else if (pmif->kind == controller_sh_ata6)
827 ret = set_timings_udma_shasta(&tl[0], &tl[1], speed);
828 else
829 ret = -1;
830 } else
831 set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833 if (ret)
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200834 return;
Bartlomiej Zolnierkiewicz085798b2007-10-13 17:47:48 +0200835
836 /* Apply timings to controller */
837 *timings = tl[0];
838 *timings2 = tl[1];
839
Linus Torvalds1da177e2005-04-16 15:20:36 -0700840 pmac_ide_do_update_timings(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841}
842
843/*
844 * Blast some well known "safe" values to the timing registers at init or
845 * wakeup from sleep time, before we do real calculation
846 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500847static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848sanitize_timings(pmac_ide_hwif_t *pmif)
849{
850 unsigned int value, value2 = 0;
851
852 switch(pmif->kind) {
853 case controller_sh_ata6:
854 value = 0x0a820c97;
855 value2 = 0x00033031;
856 break;
857 case controller_un_ata6:
858 case controller_k2_ata6:
859 value = 0x08618a92;
860 value2 = 0x00002921;
861 break;
862 case controller_kl_ata4:
863 value = 0x0008438c;
864 break;
865 case controller_kl_ata3:
866 value = 0x00084526;
867 break;
868 case controller_heathrow:
869 case controller_ohare:
870 default:
871 value = 0x00074526;
872 break;
873 }
874 pmif->timings[0] = pmif->timings[1] = value;
875 pmif->timings[2] = pmif->timings[3] = value2;
876}
877
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878/* Suspend call back, should be called after the child devices
879 * have actually been suspended
880 */
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200881static int pmac_ide_do_suspend(pmac_ide_hwif_t *pmif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700883 /* We clear the timings */
884 pmif->timings[0] = 0;
885 pmif->timings[1] = 0;
886
Benjamin Herrenschmidt616299a2005-05-01 08:58:41 -0700887 disable_irq(pmif->irq);
888
Linus Torvalds1da177e2005-04-16 15:20:36 -0700889 /* The media bay will handle itself just fine */
890 if (pmif->mediabay)
891 return 0;
892
893 /* Kauai has bus control FCRs directly here */
894 if (pmif->kauai_fcr) {
895 u32 fcr = readl(pmif->kauai_fcr);
896 fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE);
897 writel(fcr, pmif->kauai_fcr);
898 }
899
900 /* Disable the bus on older machines and the cell on kauai */
901 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id,
902 0);
903
904 return 0;
905}
906
907/* Resume call back, should be called before the child devices
908 * are resumed
909 */
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200910static int pmac_ide_do_resume(pmac_ide_hwif_t *pmif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700912 /* Hard reset & re-enable controller (do we really need to reset ? -BenH) */
913 if (!pmif->mediabay) {
914 ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 1);
915 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id, 1);
916 msleep(10);
917 ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918
919 /* Kauai has it different */
920 if (pmif->kauai_fcr) {
921 u32 fcr = readl(pmif->kauai_fcr);
922 fcr |= KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE;
923 writel(fcr, pmif->kauai_fcr);
924 }
Benjamin Herrenschmidt616299a2005-05-01 08:58:41 -0700925
926 msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927 }
928
929 /* Sanitize drive timings */
930 sanitize_timings(pmif);
931
Benjamin Herrenschmidt616299a2005-05-01 08:58:41 -0700932 enable_irq(pmif->irq);
933
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 return 0;
935}
936
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200937static u8 pmac_ide_cable_detect(ide_hwif_t *hwif)
938{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200939 pmac_ide_hwif_t *pmif =
940 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200941 struct device_node *np = pmif->node;
942 const char *cable = of_get_property(np, "cable-type", NULL);
943
944 /* Get cable type from device-tree. */
945 if (cable && !strncmp(cable, "80-", 3))
946 return ATA_CBL_PATA80;
947
948 /*
949 * G5's seem to have incorrect cable type in device-tree.
950 * Let's assume they have a 80 conductor cable, this seem
951 * to be always the case unless the user mucked around.
952 */
953 if (of_device_is_compatible(np, "K2-UATA") ||
954 of_device_is_compatible(np, "shasta-ata"))
955 return ATA_CBL_PATA80;
956
957 return ATA_CBL_PATA40;
958}
959
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +0200960static void pmac_ide_init_dev(ide_drive_t *drive)
961{
962 ide_hwif_t *hwif = drive->hwif;
963 pmac_ide_hwif_t *pmif =
964 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
965
966 if (pmif->mediabay) {
967#ifdef CONFIG_PMAC_MEDIABAY
968 if (check_media_bay_by_base(pmif->regbase, MB_CD) == 0) {
969 drive->noprobe = 0;
970 return;
971 }
972#endif
973 drive->noprobe = 1;
974 }
975}
976
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200977static const struct ide_tp_ops pmac_tp_ops = {
978 .exec_command = pmac_exec_command,
979 .read_status = ide_read_status,
980 .read_altstatus = ide_read_altstatus,
981 .read_sff_dma_status = ide_read_sff_dma_status,
982
983 .set_irq = pmac_set_irq,
984
985 .tf_load = ide_tf_load,
986 .tf_read = ide_tf_read,
987
988 .input_data = ide_input_data,
989 .output_data = ide_output_data,
990};
991
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200992static const struct ide_port_ops pmac_ide_ata6_port_ops = {
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +0200993 .init_dev = pmac_ide_init_dev,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200994 .set_pio_mode = pmac_ide_set_pio_mode,
995 .set_dma_mode = pmac_ide_set_dma_mode,
996 .selectproc = pmac_ide_kauai_selectproc,
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200997 .cable_detect = pmac_ide_cable_detect,
998};
999
1000static const struct ide_port_ops pmac_ide_ata4_port_ops = {
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +02001001 .init_dev = pmac_ide_init_dev,
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +02001002 .set_pio_mode = pmac_ide_set_pio_mode,
1003 .set_dma_mode = pmac_ide_set_dma_mode,
1004 .selectproc = pmac_ide_selectproc,
1005 .cable_detect = pmac_ide_cable_detect,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +02001006};
1007
1008static const struct ide_port_ops pmac_ide_port_ops = {
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +02001009 .init_dev = pmac_ide_init_dev,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +02001010 .set_pio_mode = pmac_ide_set_pio_mode,
1011 .set_dma_mode = pmac_ide_set_dma_mode,
1012 .selectproc = pmac_ide_selectproc,
1013};
1014
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +02001015static const struct ide_dma_ops pmac_dma_ops;
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +02001016
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001017static const struct ide_port_info pmac_port_info = {
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001018 .name = DRV_NAME,
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +02001019 .init_dma = pmac_ide_init_dma,
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001020 .chipset = ide_pmac,
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +02001021 .tp_ops = &pmac_tp_ops,
1022 .port_ops = &pmac_ide_port_ops,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +02001023#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
1024 .dma_ops = &pmac_dma_ops,
1025#endif
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001026 .host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001027 IDE_HFLAG_POST_SET_MODE |
Bartlomiej Zolnierkiewiczc5dd43e2008-04-28 23:44:37 +02001028 IDE_HFLAG_MMIO |
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001029 IDE_HFLAG_UNMASK_IRQS,
1030 .pio_mask = ATA_PIO4,
1031 .mwdma_mask = ATA_MWDMA2,
1032};
1033
Linus Torvalds1da177e2005-04-16 15:20:36 -07001034/*
1035 * Setup, register & probe an IDE channel driven by this driver, this is
Bartlomiej Zolnierkiewicz5b164642008-06-15 21:00:23 +02001036 * called by one of the 2 probe functions (macio or PCI).
Linus Torvalds1da177e2005-04-16 15:20:36 -07001037 */
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001038static int __devinit pmac_ide_setup_device(pmac_ide_hwif_t *pmif, hw_regs_t *hw)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039{
1040 struct device_node *np = pmif->node;
Jeremy Kerr018a3d12006-07-12 15:40:29 +10001041 const int *bidp;
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +02001042 struct ide_host *host;
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001043 ide_hwif_t *hwif;
Bartlomiej Zolnierkiewiczc97c6ac2008-07-23 19:55:50 +02001044 hw_regs_t *hws[] = { hw, NULL, NULL, NULL };
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001045 struct ide_port_info d = pmac_port_info;
Bartlomiej Zolnierkiewicz6f904d02008-07-23 19:55:57 +02001046 int rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001047
Linus Torvalds1da177e2005-04-16 15:20:36 -07001048 pmif->broken_dma = pmif->broken_dma_warn = 0;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001049 if (of_device_is_compatible(np, "shasta-ata")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001050 pmif->kind = controller_sh_ata6;
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +02001051 d.port_ops = &pmac_ide_ata6_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001052 d.udma_mask = ATA_UDMA6;
1053 } else if (of_device_is_compatible(np, "kauai-ata")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001054 pmif->kind = controller_un_ata6;
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +02001055 d.port_ops = &pmac_ide_ata6_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001056 d.udma_mask = ATA_UDMA5;
1057 } else if (of_device_is_compatible(np, "K2-UATA")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001058 pmif->kind = controller_k2_ata6;
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +02001059 d.port_ops = &pmac_ide_ata6_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001060 d.udma_mask = ATA_UDMA5;
1061 } else if (of_device_is_compatible(np, "keylargo-ata")) {
1062 if (strcmp(np->name, "ata-4") == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001063 pmif->kind = controller_kl_ata4;
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +02001064 d.port_ops = &pmac_ide_ata4_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001065 d.udma_mask = ATA_UDMA4;
1066 } else
Linus Torvalds1da177e2005-04-16 15:20:36 -07001067 pmif->kind = controller_kl_ata3;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001068 } else if (of_device_is_compatible(np, "heathrow-ata")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001069 pmif->kind = controller_heathrow;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001070 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001071 pmif->kind = controller_ohare;
1072 pmif->broken_dma = 1;
1073 }
1074
Stephen Rothwell40cd3a42007-05-01 13:54:02 +10001075 bidp = of_get_property(np, "AAPL,bus-id", NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001076 pmif->aapl_bus_id = bidp ? *bidp : 0;
1077
Linus Torvalds1da177e2005-04-16 15:20:36 -07001078 /* On Kauai-type controllers, we make sure the FCR is correct */
1079 if (pmif->kauai_fcr)
1080 writel(KAUAI_FCR_UATA_MAGIC |
1081 KAUAI_FCR_UATA_RESET_N |
1082 KAUAI_FCR_UATA_ENABLE, pmif->kauai_fcr);
1083
1084 pmif->mediabay = 0;
1085
1086 /* Make sure we have sane timings */
1087 sanitize_timings(pmif);
1088
1089#ifndef CONFIG_PPC64
1090 /* XXX FIXME: Media bay stuff need re-organizing */
1091 if (np->parent && np->parent->name
1092 && strcasecmp(np->parent->name, "media-bay") == 0) {
Benjamin Herrenschmidt8c870932005-06-27 14:36:34 -07001093#ifdef CONFIG_PMAC_MEDIABAY
Bartlomiej Zolnierkiewicz2dde7862008-04-18 00:46:23 +02001094 media_bay_set_ide_infos(np->parent, pmif->regbase, pmif->irq,
1095 hwif);
Benjamin Herrenschmidt8c870932005-06-27 14:36:34 -07001096#endif /* CONFIG_PMAC_MEDIABAY */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001097 pmif->mediabay = 1;
1098 if (!bidp)
1099 pmif->aapl_bus_id = 1;
1100 } else if (pmif->kind == controller_ohare) {
1101 /* The code below is having trouble on some ohare machines
1102 * (timing related ?). Until I can put my hand on one of these
1103 * units, I keep the old way
1104 */
1105 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, 0, 1);
1106 } else
1107#endif
1108 {
1109 /* This is necessary to enable IDE when net-booting */
1110 ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 1);
1111 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, pmif->aapl_bus_id, 1);
1112 msleep(10);
1113 ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 0);
1114 msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY));
1115 }
1116
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001117 printk(KERN_INFO DRV_NAME ": Found Apple %s controller (%s), "
1118 "bus ID %d%s, irq %d\n", model_name[pmif->kind],
1119 pmif->mdev ? "macio" : "PCI", pmif->aapl_bus_id,
1120 pmif->mediabay ? " (mediabay)" : "", hw->irq);
1121
Bartlomiej Zolnierkiewicz6f904d02008-07-23 19:55:57 +02001122 rc = ide_host_add(&d, hws, &host);
1123 if (rc)
1124 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001125
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +02001126 hwif = host->ports[0];
Bartlomiej Zolnierkiewicz5cbf79c2007-05-10 00:01:11 +02001127
Linus Torvalds1da177e2005-04-16 15:20:36 -07001128 return 0;
1129}
1130
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001131static void __devinit pmac_ide_init_ports(hw_regs_t *hw, unsigned long base)
1132{
1133 int i;
1134
1135 for (i = 0; i < 8; ++i)
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +02001136 hw->io_ports_array[i] = base + i * 0x10;
1137
1138 hw->io_ports.ctl_addr = base + 0x160;
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001139}
1140
Linus Torvalds1da177e2005-04-16 15:20:36 -07001141/*
1142 * Attach to a macio probed interface
1143 */
1144static int __devinit
Jeff Mahoney5e655772005-07-06 15:44:41 -04001145pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146{
1147 void __iomem *base;
1148 unsigned long regbase;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001149 pmac_ide_hwif_t *pmif;
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001150 int irq, rc;
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001151 hw_regs_t hw;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001152
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001153 pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
1154 if (pmif == NULL)
1155 return -ENOMEM;
1156
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001157 if (macio_resource_count(mdev) == 0) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001158 printk(KERN_WARNING "ide-pmac: no address for %s\n",
1159 mdev->ofdev.node->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001160 rc = -ENXIO;
1161 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001162 }
1163
1164 /* Request memory resource for IO ports */
1165 if (macio_request_resource(mdev, 0, "ide-pmac (ports)")) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001166 printk(KERN_ERR "ide-pmac: can't request MMIO resource for "
1167 "%s!\n", mdev->ofdev.node->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001168 rc = -EBUSY;
1169 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001170 }
1171
1172 /* XXX This is bogus. Should be fixed in the registry by checking
1173 * the kind of host interrupt controller, a bit like gatwick
1174 * fixes in irq.c. That works well enough for the single case
1175 * where that happens though...
1176 */
1177 if (macio_irq_count(mdev) == 0) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001178 printk(KERN_WARNING "ide-pmac: no intrs for device %s, using "
1179 "13\n", mdev->ofdev.node->full_name);
Benjamin Herrenschmidt69917c22006-09-22 12:56:30 +10001180 irq = irq_create_mapping(NULL, 13);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181 } else
1182 irq = macio_irq(mdev, 0);
1183
1184 base = ioremap(macio_resource_start(mdev, 0), 0x400);
1185 regbase = (unsigned long) base;
1186
Linus Torvalds1da177e2005-04-16 15:20:36 -07001187 pmif->mdev = mdev;
1188 pmif->node = mdev->ofdev.node;
1189 pmif->regbase = regbase;
1190 pmif->irq = irq;
1191 pmif->kauai_fcr = NULL;
1192#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
1193 if (macio_resource_count(mdev) >= 2) {
1194 if (macio_request_resource(mdev, 1, "ide-pmac (dma)"))
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001195 printk(KERN_WARNING "ide-pmac: can't request DMA "
1196 "resource for %s!\n",
1197 mdev->ofdev.node->full_name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001198 else
1199 pmif->dma_regs = ioremap(macio_resource_start(mdev, 1), 0x1000);
1200 } else
1201 pmif->dma_regs = NULL;
1202#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001203 dev_set_drvdata(&mdev->ofdev.dev, pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001204
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001205 memset(&hw, 0, sizeof(hw));
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001206 pmac_ide_init_ports(&hw, pmif->regbase);
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001207 hw.irq = irq;
Bartlomiej Zolnierkiewiczc56c5642008-07-16 20:33:40 +02001208 hw.dev = &mdev->bus->pdev->dev;
1209 hw.parent = &mdev->ofdev.dev;
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001210
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001211 rc = pmac_ide_setup_device(pmif, &hw);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212 if (rc != 0) {
1213 /* The inteface is released to the common IDE layer */
1214 dev_set_drvdata(&mdev->ofdev.dev, NULL);
1215 iounmap(base);
Bartlomiej Zolnierkiewiczed908fa2008-02-01 23:09:32 +01001216 if (pmif->dma_regs) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001217 iounmap(pmif->dma_regs);
Bartlomiej Zolnierkiewiczed908fa2008-02-01 23:09:32 +01001218 macio_release_resource(mdev, 1);
1219 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001220 macio_release_resource(mdev, 0);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001221 kfree(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001222 }
1223
1224 return rc;
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001225
1226out_free_pmif:
1227 kfree(pmif);
1228 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001229}
1230
1231static int
David Brownell8b4b8a22006-08-14 23:11:03 -07001232pmac_ide_macio_suspend(struct macio_dev *mdev, pm_message_t mesg)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001233{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001234 pmac_ide_hwif_t *pmif =
1235 (pmac_ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
1236 int rc = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001237
David Brownell8b4b8a22006-08-14 23:11:03 -07001238 if (mesg.event != mdev->ofdev.dev.power.power_state.event
Rafael J. Wysocki3a2d5b72008-02-23 19:13:25 +01001239 && (mesg.event & PM_EVENT_SLEEP)) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001240 rc = pmac_ide_do_suspend(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001241 if (rc == 0)
David Brownell8b4b8a22006-08-14 23:11:03 -07001242 mdev->ofdev.dev.power.power_state = mesg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001243 }
1244
1245 return rc;
1246}
1247
1248static int
1249pmac_ide_macio_resume(struct macio_dev *mdev)
1250{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001251 pmac_ide_hwif_t *pmif =
1252 (pmac_ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
1253 int rc = 0;
1254
Pavel Machekca078ba2005-09-03 15:56:57 -07001255 if (mdev->ofdev.dev.power.power_state.event != PM_EVENT_ON) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001256 rc = pmac_ide_do_resume(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257 if (rc == 0)
Pavel Machek829ca9a2005-09-03 15:56:56 -07001258 mdev->ofdev.dev.power.power_state = PMSG_ON;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259 }
1260
1261 return rc;
1262}
1263
1264/*
1265 * Attach to a PCI probed interface
1266 */
1267static int __devinit
1268pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1269{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001270 struct device_node *np;
1271 pmac_ide_hwif_t *pmif;
1272 void __iomem *base;
1273 unsigned long rbase, rlen;
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001274 int rc;
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001275 hw_regs_t hw;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001276
1277 np = pci_device_to_OF_node(pdev);
1278 if (np == NULL) {
1279 printk(KERN_ERR "ide-pmac: cannot find MacIO node for Kauai ATA interface\n");
1280 return -ENODEV;
1281 }
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001282
1283 pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
1284 if (pmif == NULL)
1285 return -ENOMEM;
1286
Linus Torvalds1da177e2005-04-16 15:20:36 -07001287 if (pci_enable_device(pdev)) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001288 printk(KERN_WARNING "ide-pmac: Can't enable PCI device for "
1289 "%s\n", np->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001290 rc = -ENXIO;
1291 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001292 }
1293 pci_set_master(pdev);
1294
1295 if (pci_request_regions(pdev, "Kauai ATA")) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001296 printk(KERN_ERR "ide-pmac: Cannot obtain PCI resources for "
1297 "%s\n", np->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001298 rc = -ENXIO;
1299 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001300 }
1301
Linus Torvalds1da177e2005-04-16 15:20:36 -07001302 pmif->mdev = NULL;
1303 pmif->node = np;
1304
1305 rbase = pci_resource_start(pdev, 0);
1306 rlen = pci_resource_len(pdev, 0);
1307
1308 base = ioremap(rbase, rlen);
1309 pmif->regbase = (unsigned long) base + 0x2000;
1310#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
1311 pmif->dma_regs = base + 0x1000;
1312#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
1313 pmif->kauai_fcr = base;
1314 pmif->irq = pdev->irq;
1315
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001316 pci_set_drvdata(pdev, pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001317
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001318 memset(&hw, 0, sizeof(hw));
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001319 pmac_ide_init_ports(&hw, pmif->regbase);
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001320 hw.irq = pdev->irq;
1321 hw.dev = &pdev->dev;
1322
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001323 rc = pmac_ide_setup_device(pmif, &hw);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001324 if (rc != 0) {
1325 /* The inteface is released to the common IDE layer */
1326 pci_set_drvdata(pdev, NULL);
1327 iounmap(base);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001328 pci_release_regions(pdev);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001329 kfree(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001330 }
1331
1332 return rc;
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001333
1334out_free_pmif:
1335 kfree(pmif);
1336 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001337}
1338
1339static int
David Brownell8b4b8a22006-08-14 23:11:03 -07001340pmac_ide_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001341{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001342 pmac_ide_hwif_t *pmif = (pmac_ide_hwif_t *)pci_get_drvdata(pdev);
1343 int rc = 0;
1344
David Brownell8b4b8a22006-08-14 23:11:03 -07001345 if (mesg.event != pdev->dev.power.power_state.event
Rafael J. Wysocki3a2d5b72008-02-23 19:13:25 +01001346 && (mesg.event & PM_EVENT_SLEEP)) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001347 rc = pmac_ide_do_suspend(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001348 if (rc == 0)
David Brownell8b4b8a22006-08-14 23:11:03 -07001349 pdev->dev.power.power_state = mesg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001350 }
1351
1352 return rc;
1353}
1354
1355static int
1356pmac_ide_pci_resume(struct pci_dev *pdev)
1357{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001358 pmac_ide_hwif_t *pmif = (pmac_ide_hwif_t *)pci_get_drvdata(pdev);
1359 int rc = 0;
1360
Pavel Machekca078ba2005-09-03 15:56:57 -07001361 if (pdev->dev.power.power_state.event != PM_EVENT_ON) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001362 rc = pmac_ide_do_resume(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001363 if (rc == 0)
Pavel Machek829ca9a2005-09-03 15:56:56 -07001364 pdev->dev.power.power_state = PMSG_ON;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001365 }
1366
1367 return rc;
1368}
1369
Jeff Mahoney5e655772005-07-06 15:44:41 -04001370static struct of_device_id pmac_ide_macio_match[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001371{
1372 {
1373 .name = "IDE",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001374 },
1375 {
1376 .name = "ATA",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001377 },
1378 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001379 .type = "ide",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001380 },
1381 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001382 .type = "ata",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001383 },
1384 {},
1385};
1386
1387static struct macio_driver pmac_ide_macio_driver =
1388{
1389 .name = "ide-pmac",
1390 .match_table = pmac_ide_macio_match,
1391 .probe = pmac_ide_macio_attach,
1392 .suspend = pmac_ide_macio_suspend,
1393 .resume = pmac_ide_macio_resume,
1394};
1395
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +02001396static const struct pci_device_id pmac_ide_pci_match[] = {
1397 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA), 0 },
1398 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100), 0 },
1399 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100), 0 },
1400 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_SH_ATA), 0 },
1401 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID2_ATA), 0 },
Benjamin Herrenschmidt71e4eda2007-10-06 18:52:27 +10001402 {},
Linus Torvalds1da177e2005-04-16 15:20:36 -07001403};
1404
1405static struct pci_driver pmac_ide_pci_driver = {
1406 .name = "ide-pmac",
1407 .id_table = pmac_ide_pci_match,
1408 .probe = pmac_ide_pci_attach,
1409 .suspend = pmac_ide_pci_suspend,
1410 .resume = pmac_ide_pci_resume,
1411};
1412MODULE_DEVICE_TABLE(pci, pmac_ide_pci_match);
1413
Andrew Morton9e5755b2007-03-03 17:48:54 +01001414int __init pmac_ide_probe(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001415{
Andrew Morton9e5755b2007-03-03 17:48:54 +01001416 int error;
1417
Benjamin Herrenschmidte8222502006-03-28 23:15:54 +11001418 if (!machine_is(powermac))
Andrew Morton9e5755b2007-03-03 17:48:54 +01001419 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001420
1421#ifdef CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST
Andrew Morton9e5755b2007-03-03 17:48:54 +01001422 error = pci_register_driver(&pmac_ide_pci_driver);
1423 if (error)
1424 goto out;
1425 error = macio_register_driver(&pmac_ide_macio_driver);
1426 if (error) {
1427 pci_unregister_driver(&pmac_ide_pci_driver);
1428 goto out;
1429 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001430#else
Andrew Morton9e5755b2007-03-03 17:48:54 +01001431 error = macio_register_driver(&pmac_ide_macio_driver);
1432 if (error)
1433 goto out;
1434 error = pci_register_driver(&pmac_ide_pci_driver);
1435 if (error) {
1436 macio_unregister_driver(&pmac_ide_macio_driver);
1437 goto out;
1438 }
Benjamin Herrenschmidt1beb6a72005-12-14 13:10:10 +11001439#endif
Andrew Morton9e5755b2007-03-03 17:48:54 +01001440out:
1441 return error;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001442}
1443
1444#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
1445
1446/*
1447 * pmac_ide_build_dmatable builds the DBDMA command list
1448 * for a transfer and sets the DBDMA channel to point to it.
1449 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001450static int
Linus Torvalds1da177e2005-04-16 15:20:36 -07001451pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
1452{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001453 ide_hwif_t *hwif = drive->hwif;
1454 pmac_ide_hwif_t *pmif =
1455 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001456 struct dbdma_cmd *table;
1457 int i, count = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001458 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
1459 struct scatterlist *sg;
1460 int wr = (rq_data_dir(rq) == WRITE);
1461
1462 /* DMA table is already aligned */
1463 table = (struct dbdma_cmd *) pmif->dma_table_cpu;
1464
1465 /* Make sure DMA controller is stopped (necessary ?) */
1466 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control);
1467 while (readl(&dma->status) & RUN)
1468 udelay(1);
1469
1470 hwif->sg_nents = i = ide_build_sglist(drive, rq);
1471
1472 if (!i)
1473 return 0;
1474
1475 /* Build DBDMA commands list */
1476 sg = hwif->sg_table;
1477 while (i && sg_dma_len(sg)) {
1478 u32 cur_addr;
1479 u32 cur_len;
1480
1481 cur_addr = sg_dma_address(sg);
1482 cur_len = sg_dma_len(sg);
1483
1484 if (pmif->broken_dma && cur_addr & (L1_CACHE_BYTES - 1)) {
1485 if (pmif->broken_dma_warn == 0) {
Joe Perchesaca38a52007-11-27 21:35:55 +01001486 printk(KERN_WARNING "%s: DMA on non aligned address, "
Linus Torvalds1da177e2005-04-16 15:20:36 -07001487 "switching to PIO on Ohare chipset\n", drive->name);
1488 pmif->broken_dma_warn = 1;
1489 }
1490 goto use_pio_instead;
1491 }
1492 while (cur_len) {
1493 unsigned int tc = (cur_len < 0xfe00)? cur_len: 0xfe00;
1494
1495 if (count++ >= MAX_DCMDS) {
1496 printk(KERN_WARNING "%s: DMA table too small\n",
1497 drive->name);
1498 goto use_pio_instead;
1499 }
1500 st_le16(&table->command, wr? OUTPUT_MORE: INPUT_MORE);
1501 st_le16(&table->req_count, tc);
1502 st_le32(&table->phy_addr, cur_addr);
1503 table->cmd_dep = 0;
1504 table->xfer_status = 0;
1505 table->res_count = 0;
1506 cur_addr += tc;
1507 cur_len -= tc;
1508 ++table;
1509 }
Jens Axboe55c16a72007-07-25 08:13:56 +02001510 sg = sg_next(sg);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001511 i--;
1512 }
1513
1514 /* convert the last command to an input/output last command */
1515 if (count) {
1516 st_le16(&table[-1].command, wr? OUTPUT_LAST: INPUT_LAST);
1517 /* add the stop command to the end of the list */
1518 memset(table, 0, sizeof(struct dbdma_cmd));
1519 st_le16(&table->command, DBDMA_STOP);
1520 mb();
1521 writel(hwif->dmatable_dma, &dma->cmdptr);
1522 return 1;
1523 }
1524
1525 printk(KERN_DEBUG "%s: empty DMA table?\n", drive->name);
Bartlomiej Zolnierkiewiczf6fb7862008-02-01 23:09:31 +01001526
1527use_pio_instead:
1528 ide_destroy_dmatable(drive);
1529
Linus Torvalds1da177e2005-04-16 15:20:36 -07001530 return 0; /* revert to PIO for this request */
1531}
1532
1533/* Teardown mappings after DMA has completed. */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001534static void
Linus Torvalds1da177e2005-04-16 15:20:36 -07001535pmac_ide_destroy_dmatable (ide_drive_t *drive)
1536{
1537 ide_hwif_t *hwif = drive->hwif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001538
Bartlomiej Zolnierkiewiczf6fb7862008-02-01 23:09:31 +01001539 if (hwif->sg_nents) {
1540 ide_destroy_dmatable(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001541 hwif->sg_nents = 0;
1542 }
1543}
1544
1545/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001546 * Prepare a DMA transfer. We build the DMA table, adjust the timings for
1547 * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
1548 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001549static int
Linus Torvalds1da177e2005-04-16 15:20:36 -07001550pmac_ide_dma_setup(ide_drive_t *drive)
1551{
1552 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001553 pmac_ide_hwif_t *pmif =
1554 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001555 struct request *rq = HWGROUP(drive)->rq;
1556 u8 unit = (drive->select.b.unit & 0x01);
1557 u8 ata4;
1558
1559 if (pmif == NULL)
1560 return 1;
1561 ata4 = (pmif->kind == controller_kl_ata4);
1562
1563 if (!pmac_ide_build_dmatable(drive, rq)) {
1564 ide_map_sg(drive, rq);
1565 return 1;
1566 }
1567
1568 /* Apple adds 60ns to wrDataSetup on reads */
1569 if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) {
1570 writel(pmif->timings[unit] + (!rq_data_dir(rq) ? 0x00800000UL : 0),
1571 PMAC_IDE_REG(IDE_TIMING_CONFIG));
1572 (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
1573 }
1574
1575 drive->waiting_for_dma = 1;
1576
1577 return 0;
1578}
1579
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001580static void
Linus Torvalds1da177e2005-04-16 15:20:36 -07001581pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
1582{
1583 /* issue cmd to drive */
1584 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, NULL);
1585}
1586
1587/*
1588 * Kick the DMA controller into life after the DMA command has been issued
1589 * to the drive.
1590 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001591static void
Linus Torvalds1da177e2005-04-16 15:20:36 -07001592pmac_ide_dma_start(ide_drive_t *drive)
1593{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001594 ide_hwif_t *hwif = drive->hwif;
1595 pmac_ide_hwif_t *pmif =
1596 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001597 volatile struct dbdma_regs __iomem *dma;
1598
1599 dma = pmif->dma_regs;
1600
1601 writel((RUN << 16) | RUN, &dma->control);
1602 /* Make sure it gets to the controller right now */
1603 (void)readl(&dma->control);
1604}
1605
1606/*
1607 * After a DMA transfer, make sure the controller is stopped
1608 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001609static int
Linus Torvalds1da177e2005-04-16 15:20:36 -07001610pmac_ide_dma_end (ide_drive_t *drive)
1611{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001612 ide_hwif_t *hwif = drive->hwif;
1613 pmac_ide_hwif_t *pmif =
1614 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001615 volatile struct dbdma_regs __iomem *dma;
1616 u32 dstat;
1617
1618 if (pmif == NULL)
1619 return 0;
1620 dma = pmif->dma_regs;
1621
1622 drive->waiting_for_dma = 0;
1623 dstat = readl(&dma->status);
1624 writel(((RUN|WAKE|DEAD) << 16), &dma->control);
1625 pmac_ide_destroy_dmatable(drive);
1626 /* verify good dma status. we don't check for ACTIVE beeing 0. We should...
1627 * in theory, but with ATAPI decices doing buffer underruns, that would
1628 * cause us to disable DMA, which isn't what we want
1629 */
1630 return (dstat & (RUN|DEAD)) != RUN;
1631}
1632
1633/*
1634 * Check out that the interrupt we got was for us. We can't always know this
1635 * for sure with those Apple interfaces (well, we could on the recent ones but
1636 * that's not implemented yet), on the other hand, we don't have shared interrupts
1637 * so it's not really a problem
1638 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001639static int
Linus Torvalds1da177e2005-04-16 15:20:36 -07001640pmac_ide_dma_test_irq (ide_drive_t *drive)
1641{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001642 ide_hwif_t *hwif = drive->hwif;
1643 pmac_ide_hwif_t *pmif =
1644 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001645 volatile struct dbdma_regs __iomem *dma;
1646 unsigned long status, timeout;
1647
1648 if (pmif == NULL)
1649 return 0;
1650 dma = pmif->dma_regs;
1651
1652 /* We have to things to deal with here:
1653 *
1654 * - The dbdma won't stop if the command was started
1655 * but completed with an error without transferring all
1656 * datas. This happens when bad blocks are met during
1657 * a multi-block transfer.
1658 *
1659 * - The dbdma fifo hasn't yet finished flushing to
1660 * to system memory when the disk interrupt occurs.
1661 *
1662 */
1663
1664 /* If ACTIVE is cleared, the STOP command have passed and
1665 * transfer is complete.
1666 */
1667 status = readl(&dma->status);
1668 if (!(status & ACTIVE))
1669 return 1;
1670 if (!drive->waiting_for_dma)
1671 printk(KERN_WARNING "ide%d, ide_dma_test_irq \
1672 called while not waiting\n", HWIF(drive)->index);
1673
1674 /* If dbdma didn't execute the STOP command yet, the
1675 * active bit is still set. We consider that we aren't
1676 * sharing interrupts (which is hopefully the case with
1677 * those controllers) and so we just try to flush the
1678 * channel for pending data in the fifo
1679 */
1680 udelay(1);
1681 writel((FLUSH << 16) | FLUSH, &dma->control);
1682 timeout = 0;
1683 for (;;) {
1684 udelay(1);
1685 status = readl(&dma->status);
1686 if ((status & FLUSH) == 0)
1687 break;
1688 if (++timeout > 100) {
1689 printk(KERN_WARNING "ide%d, ide_dma_test_irq \
1690 timeout flushing channel\n", HWIF(drive)->index);
1691 break;
1692 }
1693 }
1694 return 1;
1695}
1696
Bartlomiej Zolnierkiewicz15ce9262008-01-26 20:13:03 +01001697static void pmac_ide_dma_host_set(ide_drive_t *drive, int on)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001698{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001699}
1700
Sergei Shtylyov841d2a92007-07-09 23:17:54 +02001701static void
1702pmac_ide_dma_lost_irq (ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001703{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001704 ide_hwif_t *hwif = drive->hwif;
1705 pmac_ide_hwif_t *pmif =
1706 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001707 volatile struct dbdma_regs __iomem *dma;
1708 unsigned long status;
1709
1710 if (pmif == NULL)
Sergei Shtylyov841d2a92007-07-09 23:17:54 +02001711 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001712 dma = pmif->dma_regs;
1713
1714 status = readl(&dma->status);
1715 printk(KERN_ERR "ide-pmac lost interrupt, dma status: %lx\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001716}
1717
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +02001718static const struct ide_dma_ops pmac_dma_ops = {
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +02001719 .dma_host_set = pmac_ide_dma_host_set,
1720 .dma_setup = pmac_ide_dma_setup,
1721 .dma_exec_cmd = pmac_ide_dma_exec_cmd,
1722 .dma_start = pmac_ide_dma_start,
1723 .dma_end = pmac_ide_dma_end,
1724 .dma_test_irq = pmac_ide_dma_test_irq,
1725 .dma_timeout = ide_dma_timeout,
1726 .dma_lost_irq = pmac_ide_dma_lost_irq,
1727};
1728
Linus Torvalds1da177e2005-04-16 15:20:36 -07001729/*
1730 * Allocate the data structures needed for using DMA with an interface
1731 * and fill the proper list of functions pointers
1732 */
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +02001733static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
1734 const struct ide_port_info *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001735{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001736 pmac_ide_hwif_t *pmif =
1737 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +01001738 struct pci_dev *dev = to_pci_dev(hwif->dev);
1739
Linus Torvalds1da177e2005-04-16 15:20:36 -07001740 /* We won't need pci_dev if we switch to generic consistent
1741 * DMA routines ...
1742 */
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +02001743 if (dev == NULL || pmif->dma_regs == 0)
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001744 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001745 /*
1746 * Allocate space for the DBDMA commands.
1747 * The +2 is +1 for the stop command and +1 to allow for
1748 * aligning the start address to a multiple of 16 bytes.
1749 */
1750 pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent(
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +01001751 dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001752 (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd),
1753 &hwif->dmatable_dma);
1754 if (pmif->dma_table_cpu == NULL) {
1755 printk(KERN_ERR "%s: unable to allocate DMA command list\n",
1756 hwif->name);
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001757 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001758 }
1759
Bartlomiej Zolnierkiewicz4f52a322008-01-26 20:13:08 +01001760 hwif->sg_max_nents = MAX_DCMDS;
1761
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001762 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001763}
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +02001764#else
1765static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
1766 const struct ide_port_info *d)
1767{
1768 return -EOPNOTSUPP;
1769}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001770#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
Bartlomiej Zolnierkiewiczade2daf2008-01-26 20:13:07 +01001771
1772module_init(pmac_ide_probe);
Adrian Bunkde9facb2008-04-02 21:22:03 +02001773
1774MODULE_LICENSE("GPL");