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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* arch/arm/mach-msm/pm.h
2 *
3 * Copyright (C) 2007 Google, Inc.
Mahesh Sivasubramanian1b8601b2012-12-20 14:11:23 -07004 * Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005 * Author: San Mehat <san@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#ifndef __ARCH_ARM_MACH_MSM_PM_H
19#define __ARCH_ARM_MACH_MSM_PM_H
20
21#include <linux/types.h>
22#include <linux/cpuidle.h>
23
24#ifdef CONFIG_SMP
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025extern void msm_secondary_startup(void);
26#else
27#define msm_secondary_startup NULL
28#endif
29
Murali Nalajalad1def3a2012-11-19 17:11:22 +053030DECLARE_PER_CPU(int, power_collapsed);
Taniya Dase30a6b22012-03-20 11:37:45 +053031
Murali Nalajala2a0bbda2012-03-28 12:12:54 +053032struct msm_pm_irq_calls {
33 unsigned int (*irq_pending)(void);
34 int (*idle_sleep_allowed)(void);
35 void (*enter_sleep1)(bool modem_wake, int from_idle, uint32_t
36 *irq_mask);
37 int (*enter_sleep2)(bool modem_wake, int from_idle);
38 void (*exit_sleep1)(uint32_t irq_mask, uint32_t wakeup_reason,
39 uint32_t pending_irqs);
40 void (*exit_sleep2)(uint32_t irq_mask, uint32_t wakeup_reason,
41 uint32_t pending_irqs);
42 void (*exit_sleep3)(uint32_t irq_mask, uint32_t wakeup_reason,
43 uint32_t pending_irqs);
44};
45
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070046enum msm_pm_sleep_mode {
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060047 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT = 0,
48 MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT = 1,
49 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE = 2,
50 MSM_PM_SLEEP_MODE_POWER_COLLAPSE = 3,
51 MSM_PM_SLEEP_MODE_APPS_SLEEP = 4,
52 MSM_PM_SLEEP_MODE_RETENTION = MSM_PM_SLEEP_MODE_APPS_SLEEP,
53 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_SUSPEND = 5,
54 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN = 6,
Priyanka Mathur848bb4c2012-11-30 18:04:57 -080055 MSM_PM_SLEEP_MODE_NR = 7,
56 MSM_PM_SLEEP_MODE_NOT_SELECTED,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057};
58
59#define MSM_PM_MODE(cpu, mode_nr) ((cpu) * MSM_PM_SLEEP_MODE_NR + (mode_nr))
60
Girish Mahadevandc318fd2012-08-17 16:48:05 -060061struct msm_pm_time_params {
62 uint32_t latency_us;
63 uint32_t sleep_us;
64 uint32_t next_event_us;
65 uint32_t modified_time_us;
66};
67
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070068struct msm_pm_platform_data {
69 u8 idle_supported; /* Allow device to enter mode during idle */
70 u8 suspend_supported; /* Allow device to enter mode during suspend */
71 u8 suspend_enabled; /* enabled for suspend */
72 u8 idle_enabled; /* enabled for idle low power */
73 u32 latency; /* interrupt latency in microseconds when entering
74 and exiting the low power mode */
75 u32 residency; /* time threshold in microseconds beyond which
76 staying in the low power mode saves power */
77};
78
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060079extern struct msm_pm_platform_data msm_pm_sleep_modes[];
80
Mahesh Sivasubramanian6d06e3a2012-05-16 13:41:07 -060081struct msm_pm_sleep_ops {
82 void *(*lowest_limits)(bool from_idle,
Girish Mahadevandc318fd2012-08-17 16:48:05 -060083 enum msm_pm_sleep_mode sleep_mode,
84 struct msm_pm_time_params *time_param, uint32_t *power);
Mahesh Sivasubramanian6d06e3a2012-05-16 13:41:07 -060085 int (*enter_sleep)(uint32_t sclk_count, void *limits,
86 bool from_idle, bool notify_rpm);
87 void (*exit_sleep)(void *limits, bool from_idle,
88 bool notify_rpm, bool collapsed);
89};
90
Girish Mahadevan55944992012-10-26 11:03:07 -060091enum msm_pm_pc_mode_type {
92 MSM_PM_PC_TZ_L2_INT = 0, /*Power collapse terminates in TZ;
93 integrated L2 cache controller */
94 MSM_PM_PC_NOTZ_L2_EXT = 1, /* Power collapse doesn't terminate in
95 TZ; external L2 cache controller */
96 MSM_PM_PC_TZ_L2_EXT = 2, /* Power collapse terminates in TZ;
97 external L2 cache controller */
98};
99
100struct msm_pm_init_data_type {
101 enum msm_pm_pc_mode_type pc_mode;
102 bool use_sync_timer;
103};
104
Murali Nalajalaff723ec2012-07-13 16:54:40 +0530105struct msm_pm_cpr_ops {
106 void (*cpr_suspend)(void);
107 void (*cpr_resume)(void);
108};
109
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700110void msm_pm_set_platform_data(struct msm_pm_platform_data *data, int count);
Mahesh Sivasubramanian95a48e72013-02-15 14:23:26 -0700111int msm_pm_idle_prepare(struct cpuidle_device *dev,
Steve Mucklef132c6c2012-06-06 18:30:57 -0700112 struct cpuidle_driver *drv, int index);
Murali Nalajala2a0bbda2012-03-28 12:12:54 +0530113void msm_pm_set_irq_extns(struct msm_pm_irq_calls *irq_calls);
Mahesh Sivasubramanian95a48e72013-02-15 14:23:26 -0700114int msm_pm_idle_enter(enum msm_pm_sleep_mode sleep_mode);
Mahesh Sivasubramaniand23add12011-11-18 14:30:11 -0700115void msm_pm_cpu_enter_lowpower(unsigned int cpu);
Girish Mahadevand27ca4a2012-08-15 09:21:23 -0600116void __init msm_pm_set_tz_retention_flag(unsigned int flag);
Mahesh Sivasubramanian1b8601b2012-12-20 14:11:23 -0700117void msm_pm_enable_retention(bool enable);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700118
Matt Wagantall8c327c52012-02-01 16:51:03 -0800119#ifdef CONFIG_MSM_PM8X60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120void msm_pm_set_rpm_wakeup_irq(unsigned int irq);
Mahesh Sivasubramanian6d06e3a2012-05-16 13:41:07 -0600121void msm_pm_set_sleep_ops(struct msm_pm_sleep_ops *ops);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700122#else
123static inline void msm_pm_set_rpm_wakeup_irq(unsigned int irq) {}
Mahesh Sivasubramanian6d06e3a2012-05-16 13:41:07 -0600124static inline void msm_pm_set_sleep_ops(struct msm_pm_sleep_ops *ops) {}
Mahesh Sivasubramaniand23add12011-11-18 14:30:11 -0700125#endif
Mahesh Sivasubramaniand23add12011-11-18 14:30:11 -0700126#ifdef CONFIG_HOTPLUG_CPU
127int msm_platform_secondary_init(unsigned int cpu);
128#else
129static inline int msm_platform_secondary_init(unsigned int cpu) { return 0; }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700130#endif
Praveen Chidambaram3895bde2012-05-14 19:42:40 +0530131
132enum msm_pm_time_stats_id {
133 MSM_PM_STAT_REQUESTED_IDLE = 0,
134 MSM_PM_STAT_IDLE_SPIN,
135 MSM_PM_STAT_IDLE_WFI,
136 MSM_PM_STAT_RETENTION,
137 MSM_PM_STAT_IDLE_STANDALONE_POWER_COLLAPSE,
138 MSM_PM_STAT_IDLE_FAILED_STANDALONE_POWER_COLLAPSE,
139 MSM_PM_STAT_IDLE_POWER_COLLAPSE,
140 MSM_PM_STAT_IDLE_FAILED_POWER_COLLAPSE,
141 MSM_PM_STAT_SUSPEND,
142 MSM_PM_STAT_FAILED_SUSPEND,
143 MSM_PM_STAT_NOT_IDLE,
144 MSM_PM_STAT_COUNT
145};
146
147#ifdef CONFIG_MSM_IDLE_STATS
148void msm_pm_add_stats(enum msm_pm_time_stats_id *enable_stats, int size);
149void msm_pm_add_stat(enum msm_pm_time_stats_id id, int64_t t);
150#else
151static inline void msm_pm_add_stats(enum msm_pm_time_stats_id *enable_stats,
152 int size) {}
153static inline void msm_pm_add_stat(enum msm_pm_time_stats_id id, int64_t t) {}
154#endif
155
Murali Nalajalaff723ec2012-07-13 16:54:40 +0530156void msm_pm_set_cpr_ops(struct msm_pm_cpr_ops *ops);
Mahesh Sivasubramaniancb396622012-03-14 14:50:37 -0600157extern void *msm_pc_debug_counters;
158extern unsigned long msm_pc_debug_counters_phys;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700159#endif /* __ARCH_ARM_MACH_MSM_PM_H */