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gerrit-public.fairphone.software / kernel / msm / 74b1dda7b81f1fe32b696e5fd283201f150aa993 / . / arch / arm / boot / dts / msm8226.dtsi
blob: 64e8fc5e9e25d81ebae3ca29a097dbeb9dea184c [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
52 };
53
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]54 memory {
55 secure_mem: secure_region {
56 linux,contiguous-region;
57 reg = <0 0x3800000>;
58 label = "secure_mem";
59 };
60 };
61
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]62 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]63 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]64 interrupts = <1 2 0 1 3 0>;
65 clock-frequency = <19200000>;
66 };
67
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]68 qcom,vidc@fdc00000 {
69 compatible = "qcom,msm-vidc";
70 reg = <0xfdc00000 0xff000>;
71 interrupts = <0 44 0>;
72 qcom,load-freq-tbl = <352800 160000000>,
73 <244800 133330000>,
74 <108000 66700000>;
75 qcom,hfi = "venus";
76 qcom,bus-ports = <1>;
77 qcom,reg-presets = <0xE0024 0x0>,
78 <0x80124 0x3>,
79 <0xE0020 0x5555556>,
80 <0x800B0 0x10101001>,
81 <0x800B4 0x00101010>,
82 <0x800C0 0x1010100f>,
83 <0x800C4 0x00101010>,
84 <0x800D0 0x00000010>,
85 <0x800D4 0x00000010>,
86 <0x800D8 0x00000707>;
87 qcom,enc-ddr-ab-ib = <0 0>,
88 <129000 142000>,
89 <384000 422000>,
90 <866000 953000>;
91 qcom,dec-ddr-ab-ib = <0 0>,
92 <103000 134000>,
93 <268000 348000>,
94 <505000 657000>;
95 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
96 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
97 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
98 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame^]99 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]100 };
101
102 qcom,wfd {
103 compatible = "qcom,msm-wfd";
104 };
105
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]106 serial@f991f000 {
107 compatible = "qcom,msm-lsuart-v14";
108 reg = <0xf991f000 0x1000>;
109 interrupts = <0 109 0>;
110 status = "disabled";
111 };
112
113 serial@f995e000 {
114 compatible = "qcom,msm-lsuart-v14";
115 reg = <0xf995e000 0x1000>;
116 interrupts = <0 114 0>;
117 status = "disabled";
118 };
119
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]120 qcom,msm-imem@fe805000 {
121 compatible = "qcom,msm-imem";
122 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
123 };
124
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]125 qcom,sps@f9984000 {
126 compatible = "qcom,msm_sps";
127 reg = <0xf9984000 0x15000>,
128 <0xf9999000 0xb000>;
129 interrupts = <0 94 0>;
130 };
131
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]132 usb@f9a55000 {
133 compatible = "qcom,hsusb-otg";
134 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]135 interrupts = <0 134 0>, <0 140 0>;
136 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]137 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]138 HSUSB_1p8-supply = <&pm8226_l10>;
139 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]140 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]141
142 qcom,hsusb-otg-phy-type = <2>;
143 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]144 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]145 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]146 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]147
148 qcom,msm-bus,name = "usb2";
149 qcom,msm-bus,num-cases = <2>;
150 qcom,msm-bus,active-only = <0>;
151 qcom,msm-bus,num-paths = <1>;
152 qcom,msm-bus,vectors-KBps =
153 <87 512 0 0>,
154 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]155 };
156
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]157 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]158 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]159 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]160 };
161
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]162 wcd9xxx_intc: wcd9xxx-irq {
163 compatible = "qcom,wcd9xxx-irq";
164 interrupt-controller;
165 #interrupt-cells = <1>;
166 interrupt-parent = <&msmgpio>;
167 interrupts = <68 0>;
168 interrupt-names = "cdc-int";
169 };
170
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]171 slim@fe12f000 {
172 cell-index = <1>;
173 compatible = "qcom,slim-ngd";
174 reg = <0xfe12f000 0x35000>,
175 <0xfe104000 0x20000>;
176 reg-names = "slimbus_physical", "slimbus_bam_physical";
177 interrupts = <0 163 0>, <0 164 0>;
178 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]179
180 tapan_codec {
181 compatible = "qcom,tapan-slim-pgd";
182 elemental-addr = [00 01 E0 00 17 02];
183
184 interrupt-parent = <&wcd9xxx_intc>;
185 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
186 17 18 19 20 21 22 23 24 25 26 27 28>;
187 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
188
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]189 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]190 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
191 qcom,cdc-vdd-buck-current = <650000>;
192
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]193 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]194 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
195 qcom,cdc-vdd-h-current = <25000>;
196
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]197 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]198 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
199 qcom,cdc-vdd-px-current = <25000>;
200
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]201 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]202 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
203 qcom,cdc-vdd-a-1p2v-current = <10000>;
204
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]205 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]206 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
207 qcom,cdc-vdd-cx-current = <10000>;
208
209 qcom,cdc-micbias-ldoh-v = <0x3>;
210 qcom,cdc-micbias-cfilt1-mv = <1800>;
211 qcom,cdc-micbias-cfilt2-mv = <1800>;
212 qcom,cdc-micbias-cfilt3-mv = <1800>;
213
214 qcom,cdc-micbias1-cfilt-sel = <0x0>;
215 qcom,cdc-micbias2-cfilt-sel = <0x1>;
216 qcom,cdc-micbias3-cfilt-sel = <0x2>;
217
218 qcom,cdc-mclk-clk-rate = <9600000>;
219 qcom,cdc-slim-ifd = "tapan-slim-ifd";
220 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
221 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]222 };
223
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]224 qcom,msm-adsp-loader {
225 compatible = "qcom,adsp-loader";
226 qcom,adsp-state = <0>;
227 };
228
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]229 sound {
230 compatible = "qcom,msm8226-audio-tapan";
231 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]232 qcom,tapan-mclk-clk-freq = <9600000>;
233 };
234
235 qcom,msm-pcm {
236 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]237 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]238 };
239
240 qcom,msm-pcm-routing {
241 compatible = "qcom,msm-pcm-routing";
242 };
243
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]244 qcom,msm-pcm-low-latency {
245 compatible = "qcom,msm-pcm-dsp";
246 qcom,msm-pcm-dsp-id = <1>;
247 qcom,msm-pcm-low-latency;
248 };
249
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]250 qcom,msm-pcm-lpa {
251 compatible = "qcom,msm-pcm-lpa";
252 };
253
254 qcom,msm-compr-dsp {
255 compatible = "qcom,msm-compr-dsp";
256 };
257
258 qcom,msm-voip-dsp {
259 compatible = "qcom,msm-voip-dsp";
260 };
261
262 qcom,msm-pcm-voice {
263 compatible = "qcom,msm-pcm-voice";
264 };
265
266 qcom,msm-stub-codec {
267 compatible = "qcom,msm-stub-codec";
268 };
269
270 qcom,msm-dai-fe {
271 compatible = "qcom,msm-dai-fe";
272 };
273
274 qcom,msm-pcm-afe {
275 compatible = "qcom,msm-pcm-afe";
276 };
277
278 qcom,msm-dai-q6-hdmi {
279 compatible = "qcom,msm-dai-q6-hdmi";
280 qcom,msm-dai-q6-dev-id = <8>;
281 };
282
283 qcom,msm-dai-q6 {
284 compatible = "qcom,msm-dai-q6";
285 qcom,msm-dai-q6-sb-0-rx {
286 compatible = "qcom,msm-dai-q6-dev";
287 qcom,msm-dai-q6-dev-id = <16384>;
288 };
289
290 qcom,msm-dai-q6-sb-0-tx {
291 compatible = "qcom,msm-dai-q6-dev";
292 qcom,msm-dai-q6-dev-id = <16385>;
293 };
294
295 qcom,msm-dai-q6-sb-1-rx {
296 compatible = "qcom,msm-dai-q6-dev";
297 qcom,msm-dai-q6-dev-id = <16386>;
298 };
299
300 qcom,msm-dai-q6-sb-1-tx {
301 compatible = "qcom,msm-dai-q6-dev";
302 qcom,msm-dai-q6-dev-id = <16387>;
303 };
304
305 qcom,msm-dai-q6-sb-3-rx {
306 compatible = "qcom,msm-dai-q6-dev";
307 qcom,msm-dai-q6-dev-id = <16390>;
308 };
309
310 qcom,msm-dai-q6-sb-3-tx {
311 compatible = "qcom,msm-dai-q6-dev";
312 qcom,msm-dai-q6-dev-id = <16391>;
313 };
314
315 qcom,msm-dai-q6-sb-4-rx {
316 compatible = "qcom,msm-dai-q6-dev";
317 qcom,msm-dai-q6-dev-id = <16392>;
318 };
319
320 qcom,msm-dai-q6-sb-4-tx {
321 compatible = "qcom,msm-dai-q6-dev";
322 qcom,msm-dai-q6-dev-id = <16393>;
323 };
324
325 qcom,msm-dai-q6-bt-sco-rx {
326 compatible = "qcom,msm-dai-q6-dev";
327 qcom,msm-dai-q6-dev-id = <12288>;
328 };
329
330 qcom,msm-dai-q6-bt-sco-tx {
331 compatible = "qcom,msm-dai-q6-dev";
332 qcom,msm-dai-q6-dev-id = <12289>;
333 };
334
335 qcom,msm-dai-q6-int-fm-rx {
336 compatible = "qcom,msm-dai-q6-dev";
337 qcom,msm-dai-q6-dev-id = <12292>;
338 };
339
340 qcom,msm-dai-q6-int-fm-tx {
341 compatible = "qcom,msm-dai-q6-dev";
342 qcom,msm-dai-q6-dev-id = <12293>;
343 };
344
345 qcom,msm-dai-q6-be-afe-pcm-rx {
346 compatible = "qcom,msm-dai-q6-dev";
347 qcom,msm-dai-q6-dev-id = <224>;
348 };
349
350 qcom,msm-dai-q6-be-afe-pcm-tx {
351 compatible = "qcom,msm-dai-q6-dev";
352 qcom,msm-dai-q6-dev-id = <225>;
353 };
354
355 qcom,msm-dai-q6-afe-proxy-rx {
356 compatible = "qcom,msm-dai-q6-dev";
357 qcom,msm-dai-q6-dev-id = <241>;
358 };
359
360 qcom,msm-dai-q6-afe-proxy-tx {
361 compatible = "qcom,msm-dai-q6-dev";
362 qcom,msm-dai-q6-dev-id = <240>;
363 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]364
365 qcom,msm-dai-q6-incall-record-rx {
366 compatible = "qcom,msm-dai-q6-dev";
367 qcom,msm-dai-q6-dev-id = <32771>;
368 };
369
370 qcom,msm-dai-q6-incall-record-tx {
371 compatible = "qcom,msm-dai-q6-dev";
372 qcom,msm-dai-q6-dev-id = <32772>;
373 };
374
375 qcom,msm-dai-q6-incall-music-rx {
376 compatible = "qcom,msm-dai-q6-dev";
377 qcom,msm-dai-q6-dev-id = <32773>;
378 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]379 };
380
381 qcom,msm-pcm-hostless {
382 compatible = "qcom,msm-pcm-hostless";
383 };
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]384 qcom,pronto@fb21b000 {
385 compatible = "qcom,pil-pronto";
386 reg = <0xfb21b000 0x3000>,
387 <0xfc401700 0x4>,
388 <0xfd485300 0xc>;
389 reg-names = "pmu_base", "clk_base", "halt_base";
390 interrupts = <0 149 1>;
391 vdd_pronto_pll-supply = <&pm8226_l12>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]392
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]393 qcom,firmware-name = "wcnss";
394 };
395 qcom,wcnss-wlan@fb000000 {
396 compatible = "qcom,wcnss_wlan";
397 reg = <0xfb000000 0x280000>;
398 reg-names = "wcnss_mmio";
399 interrupts = <0 145 0 0 146 0>;
400 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
401
402 qcom,pronto-vddmx-supply = <&pm8226_l3>;
403 qcom,pronto-vddcx-supply = <&pm8226_s1>;
404 qcom,pronto-vddpx-supply = <&pm8226_l6>;
405 qcom,iris-vddxo-supply = <&pm8226_l10>;
406 qcom,iris-vddrfa-supply = <&pm8226_l24>;
407 qcom,iris-vddpa-supply = <&pm8226_l16>;
408 qcom,iris-vdddig-supply = <&pm8226_l24>;
409
410 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
411 qcom,has_pronto_hw;
412 };
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]413 qcom,wdt@f9017000 {
414 compatible = "qcom,msm-watchdog";
415 reg = <0xf9017000 0x1000>;
416 interrupts = <0 3 0>, <0 4 0>;
417 qcom,bark-time = <11000>;
418 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]419 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]420 };
421
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]422 qcom,smem@fa00000 {
423 compatible = "qcom,smem";
424 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]425 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]426 <0xfc428000 0x4000>;
427 reg-names = "smem", "irq-reg-base", "aux-mem1";
428
429 qcom,smd-modem {
430 compatible = "qcom,smd";
431 qcom,smd-edge = <0>;
432 qcom,smd-irq-offset = <0x8>;
433 qcom,smd-irq-bitmask = <0x1000>;
434 qcom,pil-string = "modem";
435 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]436 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]437
438 qcom,smsm-modem {
439 compatible = "qcom,smsm";
440 qcom,smsm-edge = <0>;
441 qcom,smsm-irq-offset = <0x8>;
442 qcom,smsm-irq-bitmask = <0x2000>;
443 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]444 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]445
446 qcom,smd-adsp {
447 compatible = "qcom,smd";
448 qcom,smd-edge = <1>;
449 qcom,smd-irq-offset = <0x8>;
450 qcom,smd-irq-bitmask = <0x100>;
451 qcom,pil-string = "adsp";
452 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]453 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]454
455 qcom,smsm-adsp {
456 compatible = "qcom,smsm";
457 qcom,smsm-edge = <1>;
458 qcom,smsm-irq-offset = <0x8>;
459 qcom,smsm-irq-bitmask = <0x200>;
460 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]461 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]462
463 qcom,smd-wcnss {
464 compatible = "qcom,smd";
465 qcom,smd-edge = <6>;
466 qcom,smd-irq-offset = <0x8>;
467 qcom,smd-irq-bitmask = <0x20000>;
468 qcom,pil-string = "wcnss";
469 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]470 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]471
472 qcom,smsm-wcnss {
473 compatible = "qcom,smsm";
474 qcom,smsm-edge = <6>;
475 qcom,smsm-irq-offset = <0x8>;
476 qcom,smsm-irq-bitmask = <0x80000>;
477 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]478 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]479
480 qcom,smd-rpm {
481 compatible = "qcom,smd";
482 qcom,smd-edge = <15>;
483 qcom,smd-irq-offset = <0x8>;
484 qcom,smd-irq-bitmask = <0x1>;
485 interrupts = <0 168 1>;
486 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]487 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]488 };
489
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]490 rpm_bus: qcom,rpm-smd {
491 compatible = "qcom,rpm-smd";
492 rpm-channel-name = "rpm_requests";
493 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]494 };
495
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]496 sdcc1: qcom,sdcc@f9824000 {
497 cell-index = <1>; /* SDC1 eMMC slot */
498 compatible = "qcom,msm-sdcc";
499
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]500 reg = <0xf9824000 0x800>,
501 <0xf9824800 0x100>,
502 <0xf9804000 0x7000>;
503 reg-names = "core_mem", "dml_mem", "bam_mem";
504 interrupts = <0 123 0>, <0 137 0>;
505 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]506
507 qcom,bus-width = <8>;
508 status = "disabled";
509 };
510
511 sdcc2: qcom,sdcc@f98a4000 {
512 cell-index = <2>; /* SDC2 SD card slot */
513 compatible = "qcom,msm-sdcc";
514
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]515 reg = <0xf98a4000 0x800>,
516 <0xf98a4800 0x100>,
517 <0xf9884000 0x7000>;
518 reg-names = "core_mem", "dml_mem", "bam_mem";
519 interrupts = <0 125 0>, <0 220 0>;
520 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]521
522 qcom,bus-width = <4>;
523 status = "disabled";
524 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]525
526 spmi_bus: qcom,spmi@fc4c0000 {
527 cell-index = <0>;
528 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]529 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]530 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]531 <0Xfc4cb000 0x1000>,
532 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]533 /* 190,ee0_krait_hlos_spmi_periph_irq */
534 /* 187,channel_0_krait_hlos_trans_done_irq */
535 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]536 qcom,pmic-arb-ee = <0>;
537 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]538 };
539
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]540 i2c@f9926000 { /* BLSP-1 QUP-4 */
541 cell-index = <0>;
542 compatible = "qcom,i2c-qup";
543 reg = <0xf9926000 0x1000>;
544 #address-cells = <1>;
545 #size-cells = <0>;
546 reg-names = "qup_phys_addr";
547 interrupts = <0 98 0>;
548 interrupt-names = "qup_err_intr";
549 qcom,i2c-bus-freq = <100000>;
550 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]551
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]552 i2c@f9927000 { /* BLSP1 QUP5 */
553 cell-index = <5>;
554 compatible = "qcom,i2c-qup";
555 #address-cells = <1>;
556 #size-cells = <0>;
557 reg-names = "qup_phys_addr";
558 reg = <0xf9927000 0x1000>;
559 interrupt-names = "qup_err_intr";
560 interrupts = <0 99 0>;
561 qcom,i2c-bus-freq = <100000>;
562 qcom,i2c-src-freq = <19200000>;
563 };
564
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]565 qcom,acpuclk@f9011050 {
566 compatible = "qcom,acpuclk-a7";
567 reg = <0xf9011050 0x8>;
568 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]569 a7_cpu-supply = <&pm8226_s2>;
570 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]571 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]572
573 qcom,ocmem@fdd00000 {
574 compatible = "qcom,msm-ocmem";
575 reg = <0xfdd00000 0x2000>,
576 <0xfdd02000 0x2000>,
577 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]578 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]579 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
580 interrupts = <0 76 0 0 77 0>;
581 interrupt-names = "ocmem_irq", "dm_irq";
582 qcom,ocmem-num-regions = <0x1>;
583 qcom,ocmem-num-macros = <0x2>;
584 qcom,resource-type = <0x706d636f>;
585 #address-cells = <1>;
586 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]587 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]588
589 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]590 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]591 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]592 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]593 };
594 };
595
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]596 qcom,venus@fdce0000 {
597 compatible = "qcom,pil-venus";
598 reg = <0xfdce0000 0x4000>,
599 <0xfdc80000 0x400>;
600 reg-names = "wrapper_base", "vbif_base";
601 vdd-supply = <&gdsc_venus>;
602
603 qcom,firmware-name = "venus";
604 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]605
606 qcom,pronto@fb21b000 {
607 compatible = "qcom,pil-pronto";
608 reg = <0xfb21b000 0x3000>,
609 <0xfc401700 0x4>,
610 <0xfd485300 0xc>;
611 reg-names = "pmu_base", "clk_base", "halt_base";
612 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]613 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]614
615 qcom,firmware-name = "wcnss";
616 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]617
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]618 qcom,iris-fm {
619 compatible = "qcom,iris_fm";
620 };
621
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]622 qcom,lpass@fe200000 {
623 compatible = "qcom,pil-q6v5-lpass";
624 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]625 <0xfd485100 0x00010>,
626 <0xfc4016c0 0x00004>;
627 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]628 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]629 interrupts = <0 162 1>;
630
631 qcom,firmware-name = "adsp";
632 };
633
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]634 qcom,mss@fc880000 {
635 compatible = "qcom,pil-q6v5-mss";
636 reg = <0xfc880000 0x100>,
637 <0xfd485000 0x400>,
638 <0xfc820000 0x020>,
639 <0xfc401680 0x004>,
640 <0x0d1fc000 0x4000>,
641 <0xfd485194 0x4>;
642 reg-names = "qdsp6_base", "halt_base", "rmb_base",
643 "restart_reg", "metadata_base", "cxrail_bhs_reg";
644
645 interrupts = <0 24 1>;
646 vdd_mss-supply = <&pm8226_s1>;
647 vdd_cx-supply = <&pm8226_s1_corner>;
648 vdd_mx-supply = <&pm8226_l3>;
649 vdd_pll-supply = <&pm8226_l8>;
650 qcom,vdd_pll = <1800000>;
651
652 qcom,is-loadable;
653 qcom,firmware-name = "mba";
654 qcom,pil-self-auth;
655 };
656
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]657 qcom,msm-mem-hole {
658 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]659 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]660 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]661
662 tsens: tsens@fc4a8000 {
663 compatible = "qcom,msm-tsens";
664 reg = <0xfc4a8000 0x2000>,
665 <0xfc4b8000 0x1000>;
666 reg-names = "tsens_physical", "tsens_eeprom_physical";
667 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]668 qcom,sensors = <4>;
669 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]670 qcom,calib-mode = "fuse_map2";
671 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]672
673 qcom,msm-thermal {
674 compatible = "qcom,msm-thermal";
675 qcom,sensor-id = <0>;
676 qcom,poll-ms = <250>;
677 qcom,limit-temp = <60>;
678 qcom,temp-hysteresis = <10>;
679 qcom,freq-step = <2>;
680 };
681
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]682 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
683 compatible = "qcom,spi-qup-v2";
684 #address-cells = <1>;
685 #size-cells = <0>;
686 reg-names = "spi_physical", "spi_bam_physical";
687 reg = <0xf9923000 0x1000>,
688 <0xf9904000 0xF000>;
689 interrupt-names = "spi_irq", "spi_bam_irq";
690 interrupts = <0 95 0>, <0 238 0>;
691 spi-max-frequency = <19200000>;
692
693 gpios = <&msmgpio 3 0>, /* CLK */
694 <&msmgpio 1 0>, /* MISO */
695 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]696 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]697
698 qcom,infinite-mode = <0>;
699 qcom,use-bam;
700 qcom,ver-reg-exists;
701 qcom,bam-consumer-pipe-index = <12>;
702 qcom,bam-producer-pipe-index = <13>;
703 };
704
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]705 qcom,bam_dmux@fc834000 {
706 compatible = "qcom,bam_dmux";
707 reg = <0xfc834000 0x7000>;
708 interrupts = <0 29 1>;
709 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]710
711 qcom,msm-rtb {
712 compatible = "qcom,msm-rtb";
713 qcom,memory-reservation-type = "EBI1";
714 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
715 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]716
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]717 qcom,msm-rng@f9bff000 {
718 compatible = "qcom,msm-rng";
719 reg = <0xf9bff000 0x200>;
720 qcom,msm-rng-iface-clk;
721 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]722
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]723 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]724 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]725 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]726 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]727
728 jtag_mm0: jtagmm@fc33c000 {
729 compatible = "qcom,jtag-mm";
730 reg = <0xfc33c000 0x1000>,
731 <0xfc330000 0x1000>;
732 reg-names = "etm-base","debug-base";
733 };
734
735 jtag_mm1: jtagmm@fc33d000 {
736 compatible = "qcom,jtag-mm";
737 reg = <0xfc33d000 0x1000>,
738 <0xfc332000 0x1000>;
739 reg-names = "etm-base","debug-base";
740 };
741
742 jtag_mm2: jtagmm@fc33e000 {
743 compatible = "qcom,jtag-mm";
744 reg = <0xfc33e000 0x1000>,
745 <0xfc334000 0x1000>;
746 reg-names = "etm-base","debug-base";
747 };
748
749 jtag_mm3: jtagmm@fc33f000 {
750 compatible = "qcom,jtag-mm";
751 reg = <0xfc33f000 0x1000>,
752 <0xfc336000 0x1000>;
753 reg-names = "etm-base","debug-base";
754 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]755
756 qcom,ipc-spinlock@fd484000 {
757 compatible = "qcom,ipc-spinlock-sfpb";
758 reg = <0xfd484000 0x400>;
759 qcom,num-locks = <8>;
760 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]761};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]762
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]763&gdsc_venus {
764 status = "ok";
765};
766
767&gdsc_mdss {
768 status = "ok";
769};
770
771&gdsc_jpeg {
772 status = "ok";
773};
774
775&gdsc_vfe {
776 status = "ok";
777};
778
779&gdsc_oxili_cx {
780 status = "ok";
781};
782
783&gdsc_usb_hsic {
784 status = "ok";
785};
786
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]787/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]788/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]789/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]790
791&pm8226_vadc {
792 chan@0 {
793 label = "usb_in";
794 reg = <0>;
795 qcom,decimation = <0>;
796 qcom,pre-div-channel-scaling = <4>;
797 qcom,calibration-type = "absolute";
798 qcom,scale-function = <0>;
799 qcom,hw-settle-time = <0>;
800 qcom,fast-avg-setup = <0>;
801 };
802
803 chan@2 {
804 label = "vchg_sns";
805 reg = <2>;
806 qcom,decimation = <0>;
807 qcom,pre-div-channel-scaling = <3>;
808 qcom,calibration-type = "absolute";
809 qcom,scale-function = <0>;
810 qcom,hw-settle-time = <0>;
811 qcom,fast-avg-setup = <0>;
812 };
813
814 chan@5 {
815 label = "vcoin";
816 reg = <5>;
817 qcom,decimation = <0>;
818 qcom,pre-div-channel-scaling = <1>;
819 qcom,calibration-type = "absolute";
820 qcom,scale-function = <0>;
821 qcom,hw-settle-time = <0>;
822 qcom,fast-avg-setup = <0>;
823 };
824
825 chan@6 {
826 label = "vbat_sns";
827 reg = <6>;
828 qcom,decimation = <0>;
829 qcom,pre-div-channel-scaling = <1>;
830 qcom,calibration-type = "absolute";
831 qcom,scale-function = <0>;
832 qcom,hw-settle-time = <0>;
833 qcom,fast-avg-setup = <0>;
834 };
835
836 chan@7 {
837 label = "vph_pwr";
838 reg = <7>;
839 qcom,decimation = <0>;
840 qcom,pre-div-channel-scaling = <1>;
841 qcom,calibration-type = "absolute";
842 qcom,scale-function = <0>;
843 qcom,hw-settle-time = <0>;
844 qcom,fast-avg-setup = <0>;
845 };
846
847 chan@30 {
848 label = "batt_therm";
849 reg = <0x30>;
850 qcom,decimation = <0>;
851 qcom,pre-div-channel-scaling = <0>;
852 qcom,calibration-type = "ratiometric";
853 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]854 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]855 qcom,fast-avg-setup = <0>;
856 };
857
858 chan@31 {
859 label = "batt_id";
860 reg = <0x31>;
861 qcom,decimation = <0>;
862 qcom,pre-div-channel-scaling = <0>;
863 qcom,calibration-type = "ratiometric";
864 qcom,scale-function = <0>;
865 qcom,hw-settle-time = <2>;
866 qcom,fast-avg-setup = <0>;
867 };
868
869 chan@b2 {
870 label = "xo_therm_pu2";
871 reg = <0xb2>;
872 qcom,decimation = <0>;
873 qcom,pre-div-channel-scaling = <0>;
874 qcom,calibration-type = "ratiometric";
875 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]876 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]877 qcom,fast-avg-setup = <0>;
878 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]879
880};
881
882&pm8226_chg {
883 status = "ok";
884
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]885 qcom,chg-chgr@1000 {
886 status = "ok";
887 };
888
889 qcom,chg-buck@1100 {
890 status = "ok";
891 };
892
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]893 qcom,chg-bat-if@1200 {
894 status = "ok";
895 };
896
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]897 qcom,chg-usb-chgpth@1300 {
898 status = "ok";
899 };
900
901 qcom,chg-boost@1500 {
902 status = "ok";
903 };
904
905 qcom,chg-misc@1600 {
906 status = "ok";
907 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]908};