Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/mfd/ucb1x00-core.c |
| 3 | * |
| 4 | * Copyright (C) 2001 Russell King, All Rights Reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License. |
| 9 | * |
| 10 | * The UCB1x00 core driver provides basic services for handling IO, |
| 11 | * the ADC, interrupts, and accessing registers. It is designed |
| 12 | * such that everything goes through this layer, thereby providing |
| 13 | * a consistent locking methodology, as well as allowing the drivers |
| 14 | * to be used on other non-MCP-enabled hardware platforms. |
| 15 | * |
| 16 | * Note that all locks are private to this file. Nothing else may |
| 17 | * touch them. |
| 18 | */ |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 19 | #include <linux/module.h> |
| 20 | #include <linux/kernel.h> |
Alexey Dobriyan | d43c36d | 2009-10-07 17:09:06 +0400 | [diff] [blame] | 21 | #include <linux/sched.h> |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 22 | #include <linux/slab.h> |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/errno.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/device.h> |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 27 | #include <linux/mutex.h> |
Thomas Kunze | c8602ed | 2009-02-10 14:54:57 +0100 | [diff] [blame] | 28 | #include <linux/mfd/ucb1x00.h> |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 29 | #include <linux/gpio.h> |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 30 | |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 31 | static DEFINE_MUTEX(ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 32 | static LIST_HEAD(ucb1x00_drivers); |
| 33 | static LIST_HEAD(ucb1x00_devices); |
| 34 | |
| 35 | /** |
| 36 | * ucb1x00_io_set_dir - set IO direction |
| 37 | * @ucb: UCB1x00 structure describing chip |
| 38 | * @in: bitfield of IO pins to be set as inputs |
| 39 | * @out: bitfield of IO pins to be set as outputs |
| 40 | * |
| 41 | * Set the IO direction of the ten general purpose IO pins on |
| 42 | * the UCB1x00 chip. The @in bitfield has priority over the |
| 43 | * @out bitfield, in that if you specify a pin as both input |
| 44 | * and output, it will end up as an input. |
| 45 | * |
| 46 | * ucb1x00_enable must have been called to enable the comms |
| 47 | * before using this function. |
| 48 | * |
| 49 | * This function takes a spinlock, disabling interrupts. |
| 50 | */ |
| 51 | void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out) |
| 52 | { |
| 53 | unsigned long flags; |
| 54 | |
| 55 | spin_lock_irqsave(&ucb->io_lock, flags); |
| 56 | ucb->io_dir |= out; |
| 57 | ucb->io_dir &= ~in; |
| 58 | |
| 59 | ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); |
| 60 | spin_unlock_irqrestore(&ucb->io_lock, flags); |
| 61 | } |
| 62 | |
| 63 | /** |
| 64 | * ucb1x00_io_write - set or clear IO outputs |
| 65 | * @ucb: UCB1x00 structure describing chip |
| 66 | * @set: bitfield of IO pins to set to logic '1' |
| 67 | * @clear: bitfield of IO pins to set to logic '0' |
| 68 | * |
| 69 | * Set the IO output state of the specified IO pins. The value |
| 70 | * is retained if the pins are subsequently configured as inputs. |
| 71 | * The @clear bitfield has priority over the @set bitfield - |
| 72 | * outputs will be cleared. |
| 73 | * |
| 74 | * ucb1x00_enable must have been called to enable the comms |
| 75 | * before using this function. |
| 76 | * |
| 77 | * This function takes a spinlock, disabling interrupts. |
| 78 | */ |
| 79 | void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear) |
| 80 | { |
| 81 | unsigned long flags; |
| 82 | |
| 83 | spin_lock_irqsave(&ucb->io_lock, flags); |
| 84 | ucb->io_out |= set; |
| 85 | ucb->io_out &= ~clear; |
| 86 | |
| 87 | ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); |
| 88 | spin_unlock_irqrestore(&ucb->io_lock, flags); |
| 89 | } |
| 90 | |
| 91 | /** |
| 92 | * ucb1x00_io_read - read the current state of the IO pins |
| 93 | * @ucb: UCB1x00 structure describing chip |
| 94 | * |
| 95 | * Return a bitfield describing the logic state of the ten |
| 96 | * general purpose IO pins. |
| 97 | * |
| 98 | * ucb1x00_enable must have been called to enable the comms |
| 99 | * before using this function. |
| 100 | * |
Russell King | cae1547 | 2012-01-21 09:33:38 +0000 | [diff] [blame] | 101 | * This function does not take any mutexes or spinlocks. |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 102 | */ |
| 103 | unsigned int ucb1x00_io_read(struct ucb1x00 *ucb) |
| 104 | { |
| 105 | return ucb1x00_reg_read(ucb, UCB_IO_DATA); |
| 106 | } |
| 107 | |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 108 | static void ucb1x00_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 109 | { |
| 110 | struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); |
| 111 | unsigned long flags; |
| 112 | |
| 113 | spin_lock_irqsave(&ucb->io_lock, flags); |
| 114 | if (value) |
| 115 | ucb->io_out |= 1 << offset; |
| 116 | else |
| 117 | ucb->io_out &= ~(1 << offset); |
| 118 | |
| 119 | ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); |
| 120 | spin_unlock_irqrestore(&ucb->io_lock, flags); |
| 121 | } |
| 122 | |
| 123 | static int ucb1x00_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 124 | { |
| 125 | struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); |
| 126 | return ucb1x00_reg_read(ucb, UCB_IO_DATA) & (1 << offset); |
| 127 | } |
| 128 | |
| 129 | static int ucb1x00_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
| 130 | { |
| 131 | struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); |
| 132 | unsigned long flags; |
| 133 | |
| 134 | spin_lock_irqsave(&ucb->io_lock, flags); |
| 135 | ucb->io_dir &= ~(1 << offset); |
| 136 | ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); |
| 137 | spin_unlock_irqrestore(&ucb->io_lock, flags); |
| 138 | |
| 139 | return 0; |
| 140 | } |
| 141 | |
| 142 | static int ucb1x00_gpio_direction_output(struct gpio_chip *chip, unsigned offset |
| 143 | , int value) |
| 144 | { |
| 145 | struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); |
| 146 | unsigned long flags; |
Russell King | c23bb60 | 2012-01-21 18:21:50 +0000 | [diff] [blame] | 147 | unsigned old, mask = 1 << offset; |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 148 | |
| 149 | spin_lock_irqsave(&ucb->io_lock, flags); |
Russell King | c23bb60 | 2012-01-21 18:21:50 +0000 | [diff] [blame] | 150 | old = ucb->io_out; |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 151 | if (value) |
Russell King | c23bb60 | 2012-01-21 18:21:50 +0000 | [diff] [blame] | 152 | ucb->io_out |= mask; |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 153 | else |
Russell King | c23bb60 | 2012-01-21 18:21:50 +0000 | [diff] [blame] | 154 | ucb->io_out &= ~mask; |
| 155 | |
| 156 | if (old != ucb->io_out) |
| 157 | ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); |
| 158 | |
| 159 | if (!(ucb->io_dir & mask)) { |
| 160 | ucb->io_dir |= mask; |
| 161 | ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); |
| 162 | } |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 163 | spin_unlock_irqrestore(&ucb->io_lock, flags); |
| 164 | |
| 165 | return 0; |
| 166 | } |
| 167 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 168 | /* |
| 169 | * UCB1300 data sheet says we must: |
| 170 | * 1. enable ADC => 5us (including reference startup time) |
| 171 | * 2. select input => 51*tsibclk => 4.3us |
| 172 | * 3. start conversion => 102*tsibclk => 8.5us |
| 173 | * (tsibclk = 1/11981000) |
| 174 | * Period between SIB 128-bit frames = 10.7us |
| 175 | */ |
| 176 | |
| 177 | /** |
| 178 | * ucb1x00_adc_enable - enable the ADC converter |
| 179 | * @ucb: UCB1x00 structure describing chip |
| 180 | * |
| 181 | * Enable the ucb1x00 and ADC converter on the UCB1x00 for use. |
| 182 | * Any code wishing to use the ADC converter must call this |
| 183 | * function prior to using it. |
| 184 | * |
Russell King | cae1547 | 2012-01-21 09:33:38 +0000 | [diff] [blame] | 185 | * This function takes the ADC mutex to prevent two or more |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 186 | * concurrent uses, and therefore may sleep. As a result, it |
| 187 | * can only be called from process context, not interrupt |
| 188 | * context. |
| 189 | * |
| 190 | * You should release the ADC as soon as possible using |
| 191 | * ucb1x00_adc_disable. |
| 192 | */ |
| 193 | void ucb1x00_adc_enable(struct ucb1x00 *ucb) |
| 194 | { |
Russell King | cae1547 | 2012-01-21 09:33:38 +0000 | [diff] [blame] | 195 | mutex_lock(&ucb->adc_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 196 | |
| 197 | ucb->adc_cr |= UCB_ADC_ENA; |
| 198 | |
| 199 | ucb1x00_enable(ucb); |
| 200 | ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr); |
| 201 | } |
| 202 | |
| 203 | /** |
| 204 | * ucb1x00_adc_read - read the specified ADC channel |
| 205 | * @ucb: UCB1x00 structure describing chip |
| 206 | * @adc_channel: ADC channel mask |
| 207 | * @sync: wait for syncronisation pulse. |
| 208 | * |
| 209 | * Start an ADC conversion and wait for the result. Note that |
| 210 | * synchronised ADC conversions (via the ADCSYNC pin) must wait |
| 211 | * until the trigger is asserted and the conversion is finished. |
| 212 | * |
| 213 | * This function currently spins waiting for the conversion to |
| 214 | * complete (2 frames max without sync). |
| 215 | * |
| 216 | * If called for a synchronised ADC conversion, it may sleep |
Russell King | cae1547 | 2012-01-21 09:33:38 +0000 | [diff] [blame] | 217 | * with the ADC mutex held. |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 218 | */ |
| 219 | unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync) |
| 220 | { |
| 221 | unsigned int val; |
| 222 | |
| 223 | if (sync) |
| 224 | adc_channel |= UCB_ADC_SYNC_ENA; |
| 225 | |
| 226 | ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel); |
| 227 | ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START); |
| 228 | |
| 229 | for (;;) { |
| 230 | val = ucb1x00_reg_read(ucb, UCB_ADC_DATA); |
| 231 | if (val & UCB_ADC_DAT_VAL) |
| 232 | break; |
| 233 | /* yield to other processes */ |
| 234 | set_current_state(TASK_INTERRUPTIBLE); |
| 235 | schedule_timeout(1); |
| 236 | } |
| 237 | |
| 238 | return UCB_ADC_DAT(val); |
| 239 | } |
| 240 | |
| 241 | /** |
| 242 | * ucb1x00_adc_disable - disable the ADC converter |
| 243 | * @ucb: UCB1x00 structure describing chip |
| 244 | * |
Russell King | cae1547 | 2012-01-21 09:33:38 +0000 | [diff] [blame] | 245 | * Disable the ADC converter and release the ADC mutex. |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 246 | */ |
| 247 | void ucb1x00_adc_disable(struct ucb1x00 *ucb) |
| 248 | { |
| 249 | ucb->adc_cr &= ~UCB_ADC_ENA; |
| 250 | ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr); |
| 251 | ucb1x00_disable(ucb); |
| 252 | |
Russell King | cae1547 | 2012-01-21 09:33:38 +0000 | [diff] [blame] | 253 | mutex_unlock(&ucb->adc_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 254 | } |
| 255 | |
| 256 | /* |
| 257 | * UCB1x00 Interrupt handling. |
| 258 | * |
| 259 | * The UCB1x00 can generate interrupts when the SIBCLK is stopped. |
| 260 | * Since we need to read an internal register, we must re-enable |
| 261 | * SIBCLK to talk to the chip. We leave the clock running until |
| 262 | * we have finished processing all interrupts from the chip. |
| 263 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 264 | static irqreturn_t ucb1x00_irq(int irqnr, void *devid) |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 265 | { |
| 266 | struct ucb1x00 *ucb = devid; |
| 267 | struct ucb1x00_irq *irq; |
| 268 | unsigned int isr, i; |
| 269 | |
| 270 | ucb1x00_enable(ucb); |
| 271 | isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS); |
| 272 | ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr); |
| 273 | ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0); |
| 274 | |
| 275 | for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++) |
| 276 | if (isr & 1 && irq->fn) |
| 277 | irq->fn(i, irq->devid); |
| 278 | ucb1x00_disable(ucb); |
| 279 | |
| 280 | return IRQ_HANDLED; |
| 281 | } |
| 282 | |
| 283 | /** |
| 284 | * ucb1x00_hook_irq - hook a UCB1x00 interrupt |
| 285 | * @ucb: UCB1x00 structure describing chip |
| 286 | * @idx: interrupt index |
| 287 | * @fn: function to call when interrupt is triggered |
| 288 | * @devid: device id to pass to interrupt handler |
| 289 | * |
| 290 | * Hook the specified interrupt. You can only register one handler |
| 291 | * for each interrupt source. The interrupt source is not enabled |
| 292 | * by this function; use ucb1x00_enable_irq instead. |
| 293 | * |
| 294 | * Interrupt handlers will be called with other interrupts enabled. |
| 295 | * |
| 296 | * Returns zero on success, or one of the following errors: |
| 297 | * -EINVAL if the interrupt index is invalid |
| 298 | * -EBUSY if the interrupt has already been hooked |
| 299 | */ |
| 300 | int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid) |
| 301 | { |
| 302 | struct ucb1x00_irq *irq; |
| 303 | int ret = -EINVAL; |
| 304 | |
| 305 | if (idx < 16) { |
| 306 | irq = ucb->irq_handler + idx; |
| 307 | ret = -EBUSY; |
| 308 | |
| 309 | spin_lock_irq(&ucb->lock); |
| 310 | if (irq->fn == NULL) { |
| 311 | irq->devid = devid; |
| 312 | irq->fn = fn; |
| 313 | ret = 0; |
| 314 | } |
| 315 | spin_unlock_irq(&ucb->lock); |
| 316 | } |
| 317 | return ret; |
| 318 | } |
| 319 | |
| 320 | /** |
| 321 | * ucb1x00_enable_irq - enable an UCB1x00 interrupt source |
| 322 | * @ucb: UCB1x00 structure describing chip |
| 323 | * @idx: interrupt index |
| 324 | * @edges: interrupt edges to enable |
| 325 | * |
| 326 | * Enable the specified interrupt to trigger on %UCB_RISING, |
| 327 | * %UCB_FALLING or both edges. The interrupt should have been |
| 328 | * hooked by ucb1x00_hook_irq. |
| 329 | */ |
| 330 | void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges) |
| 331 | { |
| 332 | unsigned long flags; |
| 333 | |
| 334 | if (idx < 16) { |
| 335 | spin_lock_irqsave(&ucb->lock, flags); |
| 336 | |
| 337 | ucb1x00_enable(ucb); |
| 338 | if (edges & UCB_RISING) { |
| 339 | ucb->irq_ris_enbl |= 1 << idx; |
| 340 | ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl); |
| 341 | } |
| 342 | if (edges & UCB_FALLING) { |
| 343 | ucb->irq_fal_enbl |= 1 << idx; |
| 344 | ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl); |
| 345 | } |
| 346 | ucb1x00_disable(ucb); |
| 347 | spin_unlock_irqrestore(&ucb->lock, flags); |
| 348 | } |
| 349 | } |
| 350 | |
| 351 | /** |
| 352 | * ucb1x00_disable_irq - disable an UCB1x00 interrupt source |
| 353 | * @ucb: UCB1x00 structure describing chip |
| 354 | * @edges: interrupt edges to disable |
| 355 | * |
| 356 | * Disable the specified interrupt triggering on the specified |
| 357 | * (%UCB_RISING, %UCB_FALLING or both) edges. |
| 358 | */ |
| 359 | void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges) |
| 360 | { |
| 361 | unsigned long flags; |
| 362 | |
| 363 | if (idx < 16) { |
| 364 | spin_lock_irqsave(&ucb->lock, flags); |
| 365 | |
| 366 | ucb1x00_enable(ucb); |
| 367 | if (edges & UCB_RISING) { |
| 368 | ucb->irq_ris_enbl &= ~(1 << idx); |
| 369 | ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl); |
| 370 | } |
| 371 | if (edges & UCB_FALLING) { |
| 372 | ucb->irq_fal_enbl &= ~(1 << idx); |
| 373 | ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl); |
| 374 | } |
| 375 | ucb1x00_disable(ucb); |
| 376 | spin_unlock_irqrestore(&ucb->lock, flags); |
| 377 | } |
| 378 | } |
| 379 | |
| 380 | /** |
| 381 | * ucb1x00_free_irq - disable and free the specified UCB1x00 interrupt |
| 382 | * @ucb: UCB1x00 structure describing chip |
| 383 | * @idx: interrupt index |
| 384 | * @devid: device id. |
| 385 | * |
| 386 | * Disable the interrupt source and remove the handler. devid must |
| 387 | * match the devid passed when hooking the interrupt. |
| 388 | * |
| 389 | * Returns zero on success, or one of the following errors: |
| 390 | * -EINVAL if the interrupt index is invalid |
| 391 | * -ENOENT if devid does not match |
| 392 | */ |
| 393 | int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid) |
| 394 | { |
| 395 | struct ucb1x00_irq *irq; |
| 396 | int ret; |
| 397 | |
| 398 | if (idx >= 16) |
| 399 | goto bad; |
| 400 | |
| 401 | irq = ucb->irq_handler + idx; |
| 402 | ret = -ENOENT; |
| 403 | |
| 404 | spin_lock_irq(&ucb->lock); |
| 405 | if (irq->devid == devid) { |
| 406 | ucb->irq_ris_enbl &= ~(1 << idx); |
| 407 | ucb->irq_fal_enbl &= ~(1 << idx); |
| 408 | |
| 409 | ucb1x00_enable(ucb); |
| 410 | ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl); |
| 411 | ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl); |
| 412 | ucb1x00_disable(ucb); |
| 413 | |
| 414 | irq->fn = NULL; |
| 415 | irq->devid = NULL; |
| 416 | ret = 0; |
| 417 | } |
| 418 | spin_unlock_irq(&ucb->lock); |
| 419 | return ret; |
| 420 | |
| 421 | bad: |
| 422 | printk(KERN_ERR "Freeing bad UCB1x00 irq %d\n", idx); |
| 423 | return -EINVAL; |
| 424 | } |
| 425 | |
| 426 | static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv) |
| 427 | { |
| 428 | struct ucb1x00_dev *dev; |
| 429 | int ret = -ENOMEM; |
| 430 | |
| 431 | dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL); |
| 432 | if (dev) { |
| 433 | dev->ucb = ucb; |
| 434 | dev->drv = drv; |
| 435 | |
| 436 | ret = drv->add(dev); |
| 437 | |
| 438 | if (ret == 0) { |
| 439 | list_add(&dev->dev_node, &ucb->devs); |
| 440 | list_add(&dev->drv_node, &drv->devs); |
| 441 | } else { |
| 442 | kfree(dev); |
| 443 | } |
| 444 | } |
| 445 | return ret; |
| 446 | } |
| 447 | |
| 448 | static void ucb1x00_remove_dev(struct ucb1x00_dev *dev) |
| 449 | { |
| 450 | dev->drv->remove(dev); |
| 451 | list_del(&dev->dev_node); |
| 452 | list_del(&dev->drv_node); |
| 453 | kfree(dev); |
| 454 | } |
| 455 | |
| 456 | /* |
| 457 | * Try to probe our interrupt, rather than relying on lots of |
| 458 | * hard-coded machine dependencies. For reference, the expected |
| 459 | * IRQ mappings are: |
| 460 | * |
| 461 | * Machine Default IRQ |
| 462 | * adsbitsy IRQ_GPCIN4 |
| 463 | * cerf IRQ_GPIO_UCB1200_IRQ |
| 464 | * flexanet IRQ_GPIO_GUI |
| 465 | * freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ |
| 466 | * graphicsclient ADS_EXT_IRQ(8) |
| 467 | * graphicsmaster ADS_EXT_IRQ(8) |
| 468 | * lart LART_IRQ_UCB1200 |
| 469 | * omnimeter IRQ_GPIO23 |
| 470 | * pfs168 IRQ_GPIO_UCB1300_IRQ |
| 471 | * simpad IRQ_GPIO_UCB1300_IRQ |
| 472 | * shannon SHANNON_IRQ_GPIO_IRQ_CODEC |
| 473 | * yopy IRQ_GPIO_UCB1200_IRQ |
| 474 | */ |
| 475 | static int ucb1x00_detect_irq(struct ucb1x00 *ucb) |
| 476 | { |
| 477 | unsigned long mask; |
| 478 | |
| 479 | mask = probe_irq_on(); |
Ingo Molnar | cfc7365 | 2006-06-26 15:26:13 +0100 | [diff] [blame] | 480 | if (!mask) { |
| 481 | probe_irq_off(mask); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 482 | return NO_IRQ; |
Ingo Molnar | cfc7365 | 2006-06-26 15:26:13 +0100 | [diff] [blame] | 483 | } |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 484 | |
| 485 | /* |
| 486 | * Enable the ADC interrupt. |
| 487 | */ |
| 488 | ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC); |
| 489 | ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC); |
| 490 | ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff); |
| 491 | ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0); |
| 492 | |
| 493 | /* |
| 494 | * Cause an ADC interrupt. |
| 495 | */ |
| 496 | ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); |
| 497 | ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); |
| 498 | |
| 499 | /* |
| 500 | * Wait for the conversion to complete. |
| 501 | */ |
| 502 | while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0); |
| 503 | ucb1x00_reg_write(ucb, UCB_ADC_CR, 0); |
| 504 | |
| 505 | /* |
| 506 | * Disable and clear interrupt. |
| 507 | */ |
| 508 | ucb1x00_reg_write(ucb, UCB_IE_RIS, 0); |
| 509 | ucb1x00_reg_write(ucb, UCB_IE_FAL, 0); |
| 510 | ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff); |
| 511 | ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0); |
| 512 | |
| 513 | /* |
| 514 | * Read triggered interrupt. |
| 515 | */ |
| 516 | return probe_irq_off(mask); |
| 517 | } |
| 518 | |
Tony Jones | 0c55445 | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 519 | static void ucb1x00_release(struct device *dev) |
Nicolas Pitre | 585f545 | 2005-10-10 18:22:17 +0100 | [diff] [blame] | 520 | { |
| 521 | struct ucb1x00 *ucb = classdev_to_ucb1x00(dev); |
| 522 | kfree(ucb); |
| 523 | } |
| 524 | |
| 525 | static struct class ucb1x00_class = { |
| 526 | .name = "ucb1x00", |
Tony Jones | 0c55445 | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 527 | .dev_release = ucb1x00_release, |
Nicolas Pitre | 585f545 | 2005-10-10 18:22:17 +0100 | [diff] [blame] | 528 | }; |
| 529 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 530 | static int ucb1x00_probe(struct mcp *mcp) |
| 531 | { |
Russell King | 2f7510c | 2012-01-22 19:02:25 +0000 | [diff] [blame] | 532 | struct ucb1x00_plat_data *pdata = mcp->attached_device.platform_data; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 533 | struct ucb1x00_driver *drv; |
Russell King | 2f7510c | 2012-01-22 19:02:25 +0000 | [diff] [blame] | 534 | struct ucb1x00 *ucb; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 535 | unsigned int id; |
| 536 | int ret = -ENODEV; |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 537 | int temp; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 538 | |
Russell King | 2f7510c | 2012-01-22 19:02:25 +0000 | [diff] [blame] | 539 | /* Tell the platform to deassert the UCB1x00 reset */ |
| 540 | if (pdata && pdata->reset) |
| 541 | pdata->reset(UCB_RST_PROBE); |
| 542 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 543 | mcp_enable(mcp); |
| 544 | id = mcp_reg_read(mcp, UCB_ID); |
| 545 | |
Russell King | 65f2e75 | 2012-01-20 17:38:58 +0000 | [diff] [blame] | 546 | if (id != UCB_ID_1200 && id != UCB_ID_1300 && id != UCB_ID_TC35143) { |
| 547 | printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 548 | goto err_disable; |
| 549 | } |
| 550 | |
Yoann Padioleau | dd00cc4 | 2007-07-19 01:49:03 -0700 | [diff] [blame] | 551 | ucb = kzalloc(sizeof(struct ucb1x00), GFP_KERNEL); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 552 | ret = -ENOMEM; |
| 553 | if (!ucb) |
| 554 | goto err_disable; |
| 555 | |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 556 | device_initialize(&ucb->dev); |
Tony Jones | 0c55445 | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 557 | ucb->dev.class = &ucb1x00_class; |
| 558 | ucb->dev.parent = &mcp->attached_device; |
Russell King | 65f2e75 | 2012-01-20 17:38:58 +0000 | [diff] [blame] | 559 | dev_set_name(&ucb->dev, "ucb1x00"); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 560 | |
| 561 | spin_lock_init(&ucb->lock); |
| 562 | spin_lock_init(&ucb->io_lock); |
Russell King | cae1547 | 2012-01-21 09:33:38 +0000 | [diff] [blame] | 563 | mutex_init(&ucb->adc_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 564 | |
Russell King | 65f2e75 | 2012-01-20 17:38:58 +0000 | [diff] [blame] | 565 | ucb->id = id; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 566 | ucb->mcp = mcp; |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 567 | |
| 568 | ret = device_add(&ucb->dev); |
| 569 | if (ret) |
| 570 | goto err_dev_add; |
| 571 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 572 | ucb->irq = ucb1x00_detect_irq(ucb); |
| 573 | if (ucb->irq == NO_IRQ) { |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 574 | dev_err(&ucb->dev, "IRQ probe failed\n"); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 575 | ret = -ENODEV; |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 576 | goto err_no_irq; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 577 | } |
| 578 | |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 579 | ucb->gpio.base = -1; |
Russell King | abe0608 | 2012-01-20 22:13:52 +0000 | [diff] [blame] | 580 | if (pdata && pdata->gpio_base) { |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 581 | ucb->gpio.label = dev_name(&ucb->dev); |
Russell King | 7655b2a | 2012-01-21 14:47:00 +0000 | [diff] [blame^] | 582 | ucb->gpio.dev = &ucb->dev; |
| 583 | ucb->gpio.owner = THIS_MODULE; |
Russell King | abe0608 | 2012-01-20 22:13:52 +0000 | [diff] [blame] | 584 | ucb->gpio.base = pdata->gpio_base; |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 585 | ucb->gpio.ngpio = 10; |
| 586 | ucb->gpio.set = ucb1x00_gpio_set; |
| 587 | ucb->gpio.get = ucb1x00_gpio_get; |
| 588 | ucb->gpio.direction_input = ucb1x00_gpio_direction_input; |
| 589 | ucb->gpio.direction_output = ucb1x00_gpio_direction_output; |
| 590 | ret = gpiochip_add(&ucb->gpio); |
| 591 | if (ret) |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 592 | goto err_gpio_add; |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 593 | } else |
| 594 | dev_info(&ucb->dev, "gpio_base not set so no gpiolib support"); |
| 595 | |
Thomas Gleixner | dace145 | 2006-07-01 19:29:38 -0700 | [diff] [blame] | 596 | ret = request_irq(ucb->irq, ucb1x00_irq, IRQF_TRIGGER_RISING, |
Russell King | 65f2e75 | 2012-01-20 17:38:58 +0000 | [diff] [blame] | 597 | "UCB1x00", ucb); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 598 | if (ret) { |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 599 | dev_err(&ucb->dev, "ucb1x00: unable to grab irq%d: %d\n", |
Russell King | 65f2e75 | 2012-01-20 17:38:58 +0000 | [diff] [blame] | 600 | ucb->irq, ret); |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 601 | goto err_irq; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 602 | } |
| 603 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 604 | mcp_set_drvdata(mcp, ucb); |
| 605 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 606 | INIT_LIST_HEAD(&ucb->devs); |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 607 | mutex_lock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 608 | list_add(&ucb->node, &ucb1x00_devices); |
| 609 | list_for_each_entry(drv, &ucb1x00_drivers, node) { |
| 610 | ucb1x00_add_dev(ucb, drv); |
| 611 | } |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 612 | mutex_unlock(&ucb1x00_mutex); |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 613 | |
Russell King | 2f7510c | 2012-01-22 19:02:25 +0000 | [diff] [blame] | 614 | return ret; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 615 | |
| 616 | err_irq: |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 617 | if (ucb->gpio.base != -1) |
| 618 | temp = gpiochip_remove(&ucb->gpio); |
Russell King | f5ae587 | 2012-01-21 14:45:17 +0000 | [diff] [blame] | 619 | err_gpio_add: |
| 620 | err_no_irq: |
| 621 | device_del(&ucb->dev); |
| 622 | err_dev_add: |
| 623 | put_device(&ucb->dev); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 624 | err_disable: |
| 625 | mcp_disable(mcp); |
| 626 | out: |
Russell King | 2f7510c | 2012-01-22 19:02:25 +0000 | [diff] [blame] | 627 | if (pdata && pdata->reset) |
| 628 | pdata->reset(UCB_RST_PROBE_FAIL); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 629 | return ret; |
| 630 | } |
| 631 | |
| 632 | static void ucb1x00_remove(struct mcp *mcp) |
| 633 | { |
Russell King | 2f7510c | 2012-01-22 19:02:25 +0000 | [diff] [blame] | 634 | struct ucb1x00_plat_data *pdata = mcp->attached_device.platform_data; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 635 | struct ucb1x00 *ucb = mcp_get_drvdata(mcp); |
| 636 | struct list_head *l, *n; |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 637 | int ret; |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 638 | |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 639 | mutex_lock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 640 | list_del(&ucb->node); |
| 641 | list_for_each_safe(l, n, &ucb->devs) { |
| 642 | struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node); |
| 643 | ucb1x00_remove_dev(dev); |
| 644 | } |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 645 | mutex_unlock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 646 | |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 647 | if (ucb->gpio.base != -1) { |
| 648 | ret = gpiochip_remove(&ucb->gpio); |
| 649 | if (ret) |
| 650 | dev_err(&ucb->dev, "Can't remove gpio chip: %d\n", ret); |
| 651 | } |
| 652 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 653 | free_irq(ucb->irq, ucb); |
Tony Jones | 0c55445 | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 654 | device_unregister(&ucb->dev); |
Russell King | 2f7510c | 2012-01-22 19:02:25 +0000 | [diff] [blame] | 655 | |
| 656 | if (pdata && pdata->reset) |
| 657 | pdata->reset(UCB_RST_REMOVE); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 658 | } |
| 659 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 660 | int ucb1x00_register_driver(struct ucb1x00_driver *drv) |
| 661 | { |
| 662 | struct ucb1x00 *ucb; |
| 663 | |
| 664 | INIT_LIST_HEAD(&drv->devs); |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 665 | mutex_lock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 666 | list_add(&drv->node, &ucb1x00_drivers); |
| 667 | list_for_each_entry(ucb, &ucb1x00_devices, node) { |
| 668 | ucb1x00_add_dev(ucb, drv); |
| 669 | } |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 670 | mutex_unlock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 671 | return 0; |
| 672 | } |
| 673 | |
| 674 | void ucb1x00_unregister_driver(struct ucb1x00_driver *drv) |
| 675 | { |
| 676 | struct list_head *n, *l; |
| 677 | |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 678 | mutex_lock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 679 | list_del(&drv->node); |
| 680 | list_for_each_safe(l, n, &drv->devs) { |
| 681 | struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node); |
| 682 | ucb1x00_remove_dev(dev); |
| 683 | } |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 684 | mutex_unlock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 685 | } |
| 686 | |
| 687 | static int ucb1x00_suspend(struct mcp *mcp, pm_message_t state) |
| 688 | { |
| 689 | struct ucb1x00 *ucb = mcp_get_drvdata(mcp); |
| 690 | struct ucb1x00_dev *dev; |
| 691 | |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 692 | mutex_lock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 693 | list_for_each_entry(dev, &ucb->devs, dev_node) { |
| 694 | if (dev->drv->suspend) |
| 695 | dev->drv->suspend(dev, state); |
| 696 | } |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 697 | mutex_unlock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 698 | return 0; |
| 699 | } |
| 700 | |
| 701 | static int ucb1x00_resume(struct mcp *mcp) |
| 702 | { |
| 703 | struct ucb1x00 *ucb = mcp_get_drvdata(mcp); |
| 704 | struct ucb1x00_dev *dev; |
| 705 | |
Russell King | 2e95e51 | 2012-01-21 18:15:24 +0000 | [diff] [blame] | 706 | ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); |
Thomas Kunze | 9ca3dc8 | 2009-02-10 14:50:56 +0100 | [diff] [blame] | 707 | ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 708 | mutex_lock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 709 | list_for_each_entry(dev, &ucb->devs, dev_node) { |
| 710 | if (dev->drv->resume) |
| 711 | dev->drv->resume(dev); |
| 712 | } |
Arjan van de Ven | a621aae | 2006-01-12 18:43:35 +0000 | [diff] [blame] | 713 | mutex_unlock(&ucb1x00_mutex); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 714 | return 0; |
| 715 | } |
| 716 | |
| 717 | static struct mcp_driver ucb1x00_driver = { |
| 718 | .drv = { |
| 719 | .name = "ucb1x00", |
Russell King | ddb1e04 | 2012-01-21 16:33:38 +0000 | [diff] [blame] | 720 | .owner = THIS_MODULE, |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 721 | }, |
| 722 | .probe = ucb1x00_probe, |
| 723 | .remove = ucb1x00_remove, |
| 724 | .suspend = ucb1x00_suspend, |
| 725 | .resume = ucb1x00_resume, |
| 726 | }; |
| 727 | |
| 728 | static int __init ucb1x00_init(void) |
| 729 | { |
| 730 | int ret = class_register(&ucb1x00_class); |
| 731 | if (ret == 0) { |
| 732 | ret = mcp_driver_register(&ucb1x00_driver); |
| 733 | if (ret) |
| 734 | class_unregister(&ucb1x00_class); |
| 735 | } |
| 736 | return ret; |
| 737 | } |
| 738 | |
| 739 | static void __exit ucb1x00_exit(void) |
| 740 | { |
| 741 | mcp_driver_unregister(&ucb1x00_driver); |
| 742 | class_unregister(&ucb1x00_class); |
| 743 | } |
| 744 | |
| 745 | module_init(ucb1x00_init); |
| 746 | module_exit(ucb1x00_exit); |
| 747 | |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 748 | EXPORT_SYMBOL(ucb1x00_io_set_dir); |
| 749 | EXPORT_SYMBOL(ucb1x00_io_write); |
| 750 | EXPORT_SYMBOL(ucb1x00_io_read); |
| 751 | |
| 752 | EXPORT_SYMBOL(ucb1x00_adc_enable); |
| 753 | EXPORT_SYMBOL(ucb1x00_adc_read); |
| 754 | EXPORT_SYMBOL(ucb1x00_adc_disable); |
| 755 | |
| 756 | EXPORT_SYMBOL(ucb1x00_hook_irq); |
| 757 | EXPORT_SYMBOL(ucb1x00_free_irq); |
| 758 | EXPORT_SYMBOL(ucb1x00_enable_irq); |
| 759 | EXPORT_SYMBOL(ucb1x00_disable_irq); |
| 760 | |
| 761 | EXPORT_SYMBOL(ucb1x00_register_driver); |
| 762 | EXPORT_SYMBOL(ucb1x00_unregister_driver); |
| 763 | |
Russell King | ddb1e04 | 2012-01-21 16:33:38 +0000 | [diff] [blame] | 764 | MODULE_ALIAS("mcp:ucb1x00"); |
Russell King | 05c45ca | 2005-09-11 10:26:31 +0100 | [diff] [blame] | 765 | MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); |
| 766 | MODULE_DESCRIPTION("UCB1x00 core driver"); |
| 767 | MODULE_LICENSE("GPL"); |