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gerrit-public.fairphone.software / kernel / msm / 7657e20e46e26b198b24e2aefc696410bbe889c9 / . / include / asm-ppc / open_pic.h
blob: 7848aa610c05676ee8bb4f769718bdc1a852ffb4 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * include/asm-ppc/open_pic.h -- OpenPIC Interrupt Handling
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 *
10 */
11
12#ifndef _PPC_KERNEL_OPEN_PIC_H
13#define _PPC_KERNEL_OPEN_PIC_H
14
15#include <linux/config.h>
16#include <linux/irq.h>
17
18#define OPENPIC_SIZE 0x40000
19
20/*
21 * Non-offset'ed vector numbers
22 */
23
24#define OPENPIC_VEC_TIMER 110 /* and up */
25#define OPENPIC_VEC_IPI 118 /* and up */
26#define OPENPIC_VEC_SPURIOUS 255
27
Benjamin Herrenschmidte4ee69c2005-06-27 14:36:32 -0700[diff] [blame]28/* Priorities */
29#define OPENPIC_PRIORITY_IPI_BASE 10
30#define OPENPIC_PRIORITY_DEFAULT 4
31#define OPENPIC_PRIORITY_NMI 9
32
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]33/* OpenPIC IRQ controller structure */
34extern struct hw_interrupt_type open_pic;
35
36/* OpenPIC IPI controller structure */
37#ifdef CONFIG_SMP
38extern struct hw_interrupt_type open_pic_ipi;
39#endif /* CONFIG_SMP */
40
41extern u_int OpenPIC_NumInitSenses;
42extern u_char *OpenPIC_InitSenses;
43extern void __iomem * OpenPIC_Addr;
44extern int epic_serial_mode;
45
46/* Exported functions */
47extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr);
48extern void openpic_init(int linux_irq_offset);
49extern void openpic_init_nmi_irq(u_int irq);
Benjamin Herrenschmidte4ee69c2005-06-27 14:36:32 -0700[diff] [blame]50extern void openpic_set_irq_priority(u_int irq, u_int pri);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]51extern void openpic_hookup_cascade(u_int irq, char *name,
52 int (*cascade_fn)(struct pt_regs *));
53extern u_int openpic_irq(void);
54extern void openpic_eoi(void);
55extern void openpic_request_IPIs(void);
56extern void do_openpic_setup_cpu(void);
57extern int openpic_get_irq(struct pt_regs *regs);
58extern void openpic_reset_processor_phys(u_int cpumask);
59extern void openpic_setup_ISU(int isu_num, unsigned long addr);
60extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
61extern void smp_openpic_message_pass(int target, int msg, unsigned long data,
62 int wait);
63extern void openpic_set_k2_cascade(int irq);
64extern void openpic_set_priority(u_int pri);
Benjamin Herrenschmidt7a648b92005-04-16 15:24:18 -0700[diff] [blame]65extern u_int openpic_get_priority(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]66
67extern inline int openpic_to_irq(int irq)
68{
69 /* IRQ 0 usually means 'disabled'.. don't mess with it
70 * exceptions to this (sandpoint maybe?)
71 * shouldn't use openpic_to_irq
72 */
73 if (irq != 0){
74 return irq += NUM_8259_INTERRUPTS;
75 } else {
76 return 0;
77 }
78}
79/* Support for second openpic on G5 macs */
80
81// FIXME: To be replaced by sane cascaded controller management */
82
83#define PMAC_OPENPIC2_OFFSET 128
84
85#define OPENPIC2_VEC_TIMER 110 /* and up */
86#define OPENPIC2_VEC_IPI 118 /* and up */
87#define OPENPIC2_VEC_SPURIOUS 127
88
89
90extern void* OpenPIC2_Addr;
91
92/* Exported functions */
93extern void openpic2_set_sources(int first_irq, int num_irqs, void *isr);
94extern void openpic2_init(int linux_irq_offset);
95extern void openpic2_init_nmi_irq(u_int irq);
96extern u_int openpic2_irq(void);
97extern void openpic2_eoi(void);
98extern int openpic2_get_irq(struct pt_regs *regs);
99extern void openpic2_setup_ISU(int isu_num, unsigned long addr);
100#endif /* _PPC_KERNEL_OPEN_PIC_H */