Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 1 | /* |
Divy Le Ray | 1d68e93 | 2007-01-30 19:44:35 -0800 | [diff] [blame] | 2 | * Copyright (c) 2005-2007 Chelsio, Inc. All rights reserved. |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 3 | * |
Divy Le Ray | 1d68e93 | 2007-01-30 19:44:35 -0800 | [diff] [blame] | 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 9 | * |
Divy Le Ray | 1d68e93 | 2007-01-30 19:44:35 -0800 | [diff] [blame] | 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 31 | */ |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 32 | #include "common.h" |
| 33 | #include "regs.h" |
| 34 | |
| 35 | enum { |
| 36 | AEL100X_TX_DISABLE = 9, |
| 37 | AEL100X_TX_CONFIG1 = 0xc002, |
| 38 | AEL1002_PWR_DOWN_HI = 0xc011, |
| 39 | AEL1002_PWR_DOWN_LO = 0xc012, |
| 40 | AEL1002_XFI_EQL = 0xc015, |
| 41 | AEL1002_LB_EN = 0xc017, |
| 42 | |
| 43 | LASI_CTRL = 0x9002, |
| 44 | LASI_STAT = 0x9005 |
| 45 | }; |
| 46 | |
| 47 | static void ael100x_txon(struct cphy *phy) |
| 48 | { |
| 49 | int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; |
| 50 | |
| 51 | msleep(100); |
| 52 | t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); |
| 53 | msleep(30); |
| 54 | } |
| 55 | |
| 56 | static int ael1002_power_down(struct cphy *phy, int enable) |
| 57 | { |
| 58 | int err; |
| 59 | |
| 60 | err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable); |
| 61 | if (!err) |
| 62 | err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, |
| 63 | BMCR_PDOWN, enable ? BMCR_PDOWN : 0); |
| 64 | return err; |
| 65 | } |
| 66 | |
| 67 | static int ael1002_reset(struct cphy *phy, int wait) |
| 68 | { |
| 69 | int err; |
| 70 | |
| 71 | if ((err = ael1002_power_down(phy, 0)) || |
| 72 | (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) || |
| 73 | (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) || |
| 74 | (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) || |
| 75 | (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) || |
| 76 | (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN, |
| 77 | 0, 1 << 5))) |
| 78 | return err; |
| 79 | return 0; |
| 80 | } |
| 81 | |
| 82 | static int ael1002_intr_noop(struct cphy *phy) |
| 83 | { |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | static int ael100x_get_link_status(struct cphy *phy, int *link_ok, |
| 88 | int *speed, int *duplex, int *fc) |
| 89 | { |
| 90 | if (link_ok) { |
| 91 | unsigned int status; |
| 92 | int err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &status); |
| 93 | |
| 94 | /* |
| 95 | * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it |
| 96 | * once more to get the current link state. |
| 97 | */ |
| 98 | if (!err && !(status & BMSR_LSTATUS)) |
| 99 | err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, |
| 100 | &status); |
| 101 | if (err) |
| 102 | return err; |
| 103 | *link_ok = !!(status & BMSR_LSTATUS); |
| 104 | } |
| 105 | if (speed) |
| 106 | *speed = SPEED_10000; |
| 107 | if (duplex) |
| 108 | *duplex = DUPLEX_FULL; |
| 109 | return 0; |
| 110 | } |
| 111 | |
| 112 | static struct cphy_ops ael1002_ops = { |
| 113 | .reset = ael1002_reset, |
| 114 | .intr_enable = ael1002_intr_noop, |
| 115 | .intr_disable = ael1002_intr_noop, |
| 116 | .intr_clear = ael1002_intr_noop, |
| 117 | .intr_handler = ael1002_intr_noop, |
| 118 | .get_link_status = ael100x_get_link_status, |
| 119 | .power_down = ael1002_power_down, |
| 120 | }; |
| 121 | |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 122 | int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter, |
| 123 | int phy_addr, const struct mdio_ops *mdio_ops) |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 124 | { |
| 125 | cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops); |
| 126 | ael100x_txon(phy); |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 127 | return 0; |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | static int ael1006_reset(struct cphy *phy, int wait) |
| 131 | { |
| 132 | return t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait); |
| 133 | } |
| 134 | |
| 135 | static int ael1006_intr_enable(struct cphy *phy) |
| 136 | { |
| 137 | return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1); |
| 138 | } |
| 139 | |
| 140 | static int ael1006_intr_disable(struct cphy *phy) |
| 141 | { |
| 142 | return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0); |
| 143 | } |
| 144 | |
| 145 | static int ael1006_intr_clear(struct cphy *phy) |
| 146 | { |
| 147 | u32 val; |
| 148 | |
| 149 | return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val); |
| 150 | } |
| 151 | |
| 152 | static int ael1006_intr_handler(struct cphy *phy) |
| 153 | { |
| 154 | unsigned int status; |
| 155 | int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status); |
| 156 | |
| 157 | if (err) |
| 158 | return err; |
| 159 | return (status & 1) ? cphy_cause_link_change : 0; |
| 160 | } |
| 161 | |
| 162 | static int ael1006_power_down(struct cphy *phy, int enable) |
| 163 | { |
| 164 | return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, |
| 165 | BMCR_PDOWN, enable ? BMCR_PDOWN : 0); |
| 166 | } |
| 167 | |
| 168 | static struct cphy_ops ael1006_ops = { |
| 169 | .reset = ael1006_reset, |
| 170 | .intr_enable = ael1006_intr_enable, |
| 171 | .intr_disable = ael1006_intr_disable, |
| 172 | .intr_clear = ael1006_intr_clear, |
| 173 | .intr_handler = ael1006_intr_handler, |
| 174 | .get_link_status = ael100x_get_link_status, |
| 175 | .power_down = ael1006_power_down, |
| 176 | }; |
| 177 | |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 178 | int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter, |
| 179 | int phy_addr, const struct mdio_ops *mdio_ops) |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 180 | { |
| 181 | cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops); |
| 182 | ael100x_txon(phy); |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 183 | return 0; |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | static struct cphy_ops qt2045_ops = { |
| 187 | .reset = ael1006_reset, |
| 188 | .intr_enable = ael1006_intr_enable, |
| 189 | .intr_disable = ael1006_intr_disable, |
| 190 | .intr_clear = ael1006_intr_clear, |
| 191 | .intr_handler = ael1006_intr_handler, |
| 192 | .get_link_status = ael100x_get_link_status, |
| 193 | .power_down = ael1006_power_down, |
| 194 | }; |
| 195 | |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 196 | int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, |
| 197 | int phy_addr, const struct mdio_ops *mdio_ops) |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 198 | { |
| 199 | unsigned int stat; |
| 200 | |
| 201 | cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops); |
| 202 | |
| 203 | /* |
| 204 | * Some cards where the PHY is supposed to be at address 0 actually |
| 205 | * have it at 1. |
| 206 | */ |
| 207 | if (!phy_addr && !mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &stat) && |
| 208 | stat == 0xffff) |
| 209 | phy->addr = 1; |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 210 | return 0; |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | static int xaui_direct_reset(struct cphy *phy, int wait) |
| 214 | { |
| 215 | return 0; |
| 216 | } |
| 217 | |
| 218 | static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok, |
| 219 | int *speed, int *duplex, int *fc) |
| 220 | { |
| 221 | if (link_ok) { |
| 222 | unsigned int status; |
| 223 | |
| 224 | status = t3_read_reg(phy->adapter, |
Divy Le Ray | c706bfb | 2007-05-30 10:01:39 -0700 | [diff] [blame] | 225 | XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) | |
| 226 | t3_read_reg(phy->adapter, |
| 227 | XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) | |
| 228 | t3_read_reg(phy->adapter, |
| 229 | XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) | |
| 230 | t3_read_reg(phy->adapter, |
| 231 | XGM_REG(A_XGM_SERDES_STAT3, phy->addr)); |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 232 | *link_ok = !(status & F_LOWSIG0); |
| 233 | } |
| 234 | if (speed) |
| 235 | *speed = SPEED_10000; |
| 236 | if (duplex) |
| 237 | *duplex = DUPLEX_FULL; |
| 238 | return 0; |
| 239 | } |
| 240 | |
| 241 | static int xaui_direct_power_down(struct cphy *phy, int enable) |
| 242 | { |
| 243 | return 0; |
| 244 | } |
| 245 | |
| 246 | static struct cphy_ops xaui_direct_ops = { |
| 247 | .reset = xaui_direct_reset, |
| 248 | .intr_enable = ael1002_intr_noop, |
| 249 | .intr_disable = ael1002_intr_noop, |
| 250 | .intr_clear = ael1002_intr_noop, |
| 251 | .intr_handler = ael1002_intr_noop, |
| 252 | .get_link_status = xaui_direct_get_link_status, |
| 253 | .power_down = xaui_direct_power_down, |
| 254 | }; |
| 255 | |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 256 | int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, |
| 257 | int phy_addr, const struct mdio_ops *mdio_ops) |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 258 | { |
Divy Le Ray | c706bfb | 2007-05-30 10:01:39 -0700 | [diff] [blame] | 259 | cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops); |
Divy Le Ray | 78e4689 | 2008-10-08 17:38:01 -0700 | [diff] [blame^] | 260 | return 0; |
Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame] | 261 | } |