Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/include/asm/outercache.h |
| 3 | * |
| 4 | * Copyright (C) 2010 ARM Ltd. |
| 5 | * Written by Catalin Marinas <catalin.marinas@arm.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #ifndef __ASM_OUTERCACHE_H |
| 22 | #define __ASM_OUTERCACHE_H |
| 23 | |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 24 | #include <linux/types.h> |
| 25 | |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 26 | struct outer_cache_fns { |
| 27 | void (*inv_range)(unsigned long, unsigned long); |
| 28 | void (*clean_range)(unsigned long, unsigned long); |
| 29 | void (*flush_range)(unsigned long, unsigned long); |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 30 | void (*flush_all)(void); |
| 31 | void (*inv_all)(void); |
| 32 | void (*disable)(void); |
Catalin Marinas | 319f551 | 2010-03-24 16:47:53 +0100 | [diff] [blame] | 33 | #ifdef CONFIG_OUTER_CACHE_SYNC |
| 34 | void (*sync)(void); |
| 35 | #endif |
Santosh Shilimkar | 2839e06 | 2011-03-08 06:59:54 +0100 | [diff] [blame] | 36 | void (*set_debug)(unsigned long); |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 37 | }; |
| 38 | |
| 39 | #ifdef CONFIG_OUTER_CACHE |
| 40 | |
| 41 | extern struct outer_cache_fns outer_cache; |
| 42 | |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 43 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 44 | { |
| 45 | if (outer_cache.inv_range) |
| 46 | outer_cache.inv_range(start, end); |
| 47 | } |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 48 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 49 | { |
| 50 | if (outer_cache.clean_range) |
| 51 | outer_cache.clean_range(start, end); |
| 52 | } |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 53 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 54 | { |
| 55 | if (outer_cache.flush_range) |
| 56 | outer_cache.flush_range(start, end); |
| 57 | } |
| 58 | |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 59 | static inline void outer_flush_all(void) |
| 60 | { |
| 61 | if (outer_cache.flush_all) |
| 62 | outer_cache.flush_all(); |
| 63 | } |
| 64 | |
| 65 | static inline void outer_inv_all(void) |
| 66 | { |
| 67 | if (outer_cache.inv_all) |
| 68 | outer_cache.inv_all(); |
| 69 | } |
| 70 | |
| 71 | static inline void outer_disable(void) |
| 72 | { |
| 73 | if (outer_cache.disable) |
| 74 | outer_cache.disable(); |
| 75 | } |
| 76 | |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 77 | #else |
| 78 | |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 79 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 80 | { } |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 81 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 82 | { } |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 83 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 84 | { } |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 85 | static inline void outer_flush_all(void) { } |
| 86 | static inline void outer_inv_all(void) { } |
| 87 | static inline void outer_disable(void) { } |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 88 | |
| 89 | #endif |
| 90 | |
Catalin Marinas | 319f551 | 2010-03-24 16:47:53 +0100 | [diff] [blame] | 91 | #ifdef CONFIG_OUTER_CACHE_SYNC |
| 92 | static inline void outer_sync(void) |
| 93 | { |
| 94 | if (outer_cache.sync) |
| 95 | outer_cache.sync(); |
| 96 | } |
| 97 | #else |
| 98 | static inline void outer_sync(void) |
| 99 | { } |
| 100 | #endif |
| 101 | |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 102 | #endif /* __ASM_OUTERCACHE_H */ |