Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | #ifndef _MSM_VIDC_DEC_H_ |
| 2 | #define _MSM_VIDC_DEC_H_ |
| 3 | |
| 4 | #include <linux/types.h> |
| 5 | #include <linux/ioctl.h> |
| 6 | |
| 7 | /* STATUS CODES */ |
| 8 | /* Base value for status codes */ |
| 9 | #define VDEC_S_BASE 0x40000000 |
| 10 | /* Success */ |
| 11 | #define VDEC_S_SUCCESS (VDEC_S_BASE) |
| 12 | /* General failure */ |
| 13 | #define VDEC_S_EFAIL (VDEC_S_BASE + 1) |
| 14 | /* Fatal irrecoverable failure. Need to tear down session. */ |
| 15 | #define VDEC_S_EFATAL (VDEC_S_BASE + 2) |
| 16 | /* Error detected in the passed parameters */ |
| 17 | #define VDEC_S_EBADPARAM (VDEC_S_BASE + 3) |
| 18 | /* Command called in invalid state. */ |
| 19 | #define VDEC_S_EINVALSTATE (VDEC_S_BASE + 4) |
| 20 | /* Insufficient OS resources - thread, memory etc. */ |
| 21 | #define VDEC_S_ENOSWRES (VDEC_S_BASE + 5) |
| 22 | /* Insufficient HW resources - core capacity maxed out. */ |
| 23 | #define VDEC_S_ENOHWRES (VDEC_S_BASE + 6) |
| 24 | /* Invalid command called */ |
| 25 | #define VDEC_S_EINVALCMD (VDEC_S_BASE + 7) |
| 26 | /* Command timeout. */ |
| 27 | #define VDEC_S_ETIMEOUT (VDEC_S_BASE + 8) |
| 28 | /* Pre-requirement is not met for API. */ |
| 29 | #define VDEC_S_ENOPREREQ (VDEC_S_BASE + 9) |
| 30 | /* Command queue is full. */ |
| 31 | #define VDEC_S_ECMDQFULL (VDEC_S_BASE + 10) |
| 32 | /* Command is not supported by this driver */ |
| 33 | #define VDEC_S_ENOTSUPP (VDEC_S_BASE + 11) |
| 34 | /* Command is not implemented by thedriver. */ |
| 35 | #define VDEC_S_ENOTIMPL (VDEC_S_BASE + 12) |
| 36 | /* Command is not implemented by the driver. */ |
| 37 | #define VDEC_S_BUSY (VDEC_S_BASE + 13) |
Gopikrishnaiah Anandan | 746d9ab | 2011-07-07 11:55:13 -0700 | [diff] [blame] | 38 | #define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 39 | |
| 40 | #define VDEC_INTF_VER 1 |
| 41 | #define VDEC_MSG_BASE 0x0000000 |
| 42 | /* Codes to identify asynchronous message responses and events that driver |
| 43 | wants to communicate to the app.*/ |
| 44 | #define VDEC_MSG_INVALID (VDEC_MSG_BASE + 0) |
| 45 | #define VDEC_MSG_RESP_INPUT_BUFFER_DONE (VDEC_MSG_BASE + 1) |
| 46 | #define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE (VDEC_MSG_BASE + 2) |
| 47 | #define VDEC_MSG_RESP_INPUT_FLUSHED (VDEC_MSG_BASE + 3) |
| 48 | #define VDEC_MSG_RESP_OUTPUT_FLUSHED (VDEC_MSG_BASE + 4) |
| 49 | #define VDEC_MSG_RESP_FLUSH_INPUT_DONE (VDEC_MSG_BASE + 5) |
| 50 | #define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE (VDEC_MSG_BASE + 6) |
| 51 | #define VDEC_MSG_RESP_START_DONE (VDEC_MSG_BASE + 7) |
| 52 | #define VDEC_MSG_RESP_STOP_DONE (VDEC_MSG_BASE + 8) |
| 53 | #define VDEC_MSG_RESP_PAUSE_DONE (VDEC_MSG_BASE + 9) |
| 54 | #define VDEC_MSG_RESP_RESUME_DONE (VDEC_MSG_BASE + 10) |
| 55 | #define VDEC_MSG_RESP_RESOURCE_LOADED (VDEC_MSG_BASE + 11) |
| 56 | #define VDEC_EVT_RESOURCES_LOST (VDEC_MSG_BASE + 12) |
| 57 | #define VDEC_MSG_EVT_CONFIG_CHANGED (VDEC_MSG_BASE + 13) |
| 58 | #define VDEC_MSG_EVT_HW_ERROR (VDEC_MSG_BASE + 14) |
| 59 | #define VDEC_MSG_EVT_INFO_CONFIG_CHANGED (VDEC_MSG_BASE + 15) |
Gopikrishnaiah Anandan | 248eac2 | 2011-07-12 14:24:14 -0700 | [diff] [blame] | 60 | #define VDEC_MSG_EVT_INFO_FIELD_DROPPED (VDEC_MSG_BASE + 16) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 61 | |
| 62 | /*Buffer flags bits masks.*/ |
| 63 | #define VDEC_BUFFERFLAG_EOS 0x00000001 |
| 64 | #define VDEC_BUFFERFLAG_DECODEONLY 0x00000004 |
| 65 | #define VDEC_BUFFERFLAG_DATACORRUPT 0x00000008 |
| 66 | #define VDEC_BUFFERFLAG_ENDOFFRAME 0x00000010 |
| 67 | #define VDEC_BUFFERFLAG_SYNCFRAME 0x00000020 |
| 68 | #define VDEC_BUFFERFLAG_EXTRADATA 0x00000040 |
| 69 | #define VDEC_BUFFERFLAG_CODECCONFIG 0x00000080 |
| 70 | |
| 71 | /*Post processing flags bit masks*/ |
| 72 | #define VDEC_EXTRADATA_NONE 0x001 |
| 73 | #define VDEC_EXTRADATA_QP 0x004 |
| 74 | #define VDEC_EXTRADATA_MB_ERROR_MAP 0x008 |
| 75 | #define VDEC_EXTRADATA_SEI 0x010 |
| 76 | #define VDEC_EXTRADATA_VUI 0x020 |
| 77 | #define VDEC_EXTRADATA_VC1 0x040 |
| 78 | |
Shobhit Pandey | 4a60799 | 2012-08-01 14:02:20 +0530 | [diff] [blame] | 79 | #define VDEC_EXTRADATA_EXT_DATA 0x0800 |
| 80 | #define VDEC_EXTRADATA_USER_DATA 0x1000 |
Deepak Verma | 827990a | 2012-12-05 12:55:01 +0530 | [diff] [blame^] | 81 | #define VDEC_EXTRADATA_EXT_BUFFER 0x2000 |
Shobhit Pandey | 4a60799 | 2012-08-01 14:02:20 +0530 | [diff] [blame] | 82 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 83 | #define VDEC_CMDBASE 0x800 |
| 84 | #define VDEC_CMD_SET_INTF_VERSION (VDEC_CMDBASE) |
| 85 | |
| 86 | #define VDEC_IOCTL_MAGIC 'v' |
| 87 | |
| 88 | struct vdec_ioctl_msg { |
| 89 | void __user *in; |
| 90 | void __user *out; |
| 91 | }; |
| 92 | |
| 93 | /* CMD params: InputParam:enum vdec_codec |
| 94 | OutputParam: struct vdec_profile_level*/ |
| 95 | #define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \ |
| 96 | _IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg) |
| 97 | |
| 98 | /*CMD params:InputParam: NULL |
| 99 | OutputParam: uint32_t(bitmask)*/ |
| 100 | #define VDEC_IOCTL_GET_INTERLACE_FORMAT \ |
| 101 | _IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg) |
| 102 | |
| 103 | /* CMD params: InputParam: enum vdec_codec |
| 104 | OutputParam: struct vdec_profile_level*/ |
| 105 | #define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \ |
| 106 | _IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg) |
| 107 | |
| 108 | /*CMD params: SET: InputParam: enum vdec_output_fromat OutputParam: NULL |
| 109 | GET: InputParam: NULL OutputParam: enum vdec_output_fromat*/ |
| 110 | #define VDEC_IOCTL_SET_OUTPUT_FORMAT \ |
| 111 | _IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg) |
| 112 | #define VDEC_IOCTL_GET_OUTPUT_FORMAT \ |
| 113 | _IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg) |
| 114 | |
| 115 | /*CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL |
| 116 | GET: InputParam: NULL OutputParam: enum vdec_codec*/ |
| 117 | #define VDEC_IOCTL_SET_CODEC \ |
| 118 | _IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg) |
| 119 | #define VDEC_IOCTL_GET_CODEC \ |
| 120 | _IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg) |
| 121 | |
| 122 | /*CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL |
| 123 | GET: InputParam: NULL outputparam: struct vdec_picsize*/ |
| 124 | #define VDEC_IOCTL_SET_PICRES \ |
| 125 | _IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg) |
| 126 | #define VDEC_IOCTL_GET_PICRES \ |
| 127 | _IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg) |
| 128 | |
| 129 | #define VDEC_IOCTL_SET_EXTRADATA \ |
| 130 | _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg) |
| 131 | #define VDEC_IOCTL_GET_EXTRADATA \ |
| 132 | _IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg) |
| 133 | |
| 134 | #define VDEC_IOCTL_SET_SEQUENCE_HEADER \ |
| 135 | _IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg) |
| 136 | |
| 137 | /* CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL |
| 138 | GET: InputParam - NULL, OutputParam - vdec_allocatorproperty*/ |
| 139 | #define VDEC_IOCTL_SET_BUFFER_REQ \ |
| 140 | _IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg) |
| 141 | #define VDEC_IOCTL_GET_BUFFER_REQ \ |
| 142 | _IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg) |
| 143 | /* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */ |
| 144 | #define VDEC_IOCTL_ALLOCATE_BUFFER \ |
| 145 | _IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg) |
| 146 | /* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/ |
| 147 | #define VDEC_IOCTL_FREE_BUFFER \ |
| 148 | _IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg) |
| 149 | |
| 150 | /*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/ |
| 151 | #define VDEC_IOCTL_SET_BUFFER \ |
| 152 | _IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg) |
| 153 | |
| 154 | /* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/ |
| 155 | #define VDEC_IOCTL_FILL_OUTPUT_BUFFER \ |
| 156 | _IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg) |
| 157 | |
| 158 | /*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/ |
| 159 | #define VDEC_IOCTL_DECODE_FRAME \ |
| 160 | _IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg) |
| 161 | |
| 162 | #define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19) |
| 163 | #define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20) |
| 164 | #define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21) |
| 165 | #define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22) |
| 166 | #define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23) |
| 167 | |
| 168 | /*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */ |
| 169 | #define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg) |
| 170 | |
| 171 | /* ======================================================== |
| 172 | * IOCTL for getting asynchronous notification from driver |
| 173 | * ========================================================*/ |
| 174 | |
| 175 | /*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/ |
| 176 | #define VDEC_IOCTL_GET_NEXT_MSG \ |
| 177 | _IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg) |
| 178 | |
| 179 | #define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26) |
| 180 | |
| 181 | #define VDEC_IOCTL_GET_NUMBER_INSTANCES \ |
| 182 | _IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg) |
| 183 | |
| 184 | #define VDEC_IOCTL_SET_PICTURE_ORDER \ |
| 185 | _IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg) |
| 186 | |
| 187 | #define VDEC_IOCTL_SET_FRAME_RATE \ |
| 188 | _IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg) |
| 189 | |
| 190 | #define VDEC_IOCTL_SET_H264_MV_BUFFER \ |
| 191 | _IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg) |
| 192 | |
| 193 | #define VDEC_IOCTL_FREE_H264_MV_BUFFER \ |
| 194 | _IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg) |
| 195 | |
| 196 | #define VDEC_IOCTL_GET_MV_BUFFER_SIZE \ |
| 197 | _IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg) |
| 198 | |
| 199 | #define VDEC_IOCTL_SET_IDR_ONLY_DECODING \ |
| 200 | _IO(VDEC_IOCTL_MAGIC, 33) |
| 201 | |
| 202 | #define VDEC_IOCTL_SET_CONT_ON_RECONFIG \ |
| 203 | _IO(VDEC_IOCTL_MAGIC, 34) |
| 204 | |
Deepika Pepakayala | a5ede60 | 2011-12-02 11:33:26 -0800 | [diff] [blame] | 205 | #define VDEC_IOCTL_SET_DISABLE_DMX \ |
| 206 | _IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg) |
| 207 | |
| 208 | #define VDEC_IOCTL_GET_DISABLE_DMX \ |
| 209 | _IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg) |
| 210 | |
| 211 | #define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT \ |
| 212 | _IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg) |
| 213 | |
Arun Menon | 152c3c7 | 2012-06-20 11:50:08 -0700 | [diff] [blame] | 214 | #define VDEC_IOCTL_SET_PERF_CLK \ |
| 215 | _IOR(VDEC_IOCTL_MAGIC, 38, struct vdec_ioctl_msg) |
| 216 | |
Deepak Verma | 827990a | 2012-12-05 12:55:01 +0530 | [diff] [blame^] | 217 | #define VDEC_IOCTL_SET_META_BUFFERS \ |
| 218 | _IOW(VDEC_IOCTL_MAGIC, 39, struct vdec_ioctl_msg) |
| 219 | |
| 220 | #define VDEC_IOCTL_FREE_META_BUFFERS \ |
| 221 | _IO(VDEC_IOCTL_MAGIC, 40) |
| 222 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 223 | enum vdec_picture { |
| 224 | PICTURE_TYPE_I, |
| 225 | PICTURE_TYPE_P, |
| 226 | PICTURE_TYPE_B, |
| 227 | PICTURE_TYPE_BI, |
| 228 | PICTURE_TYPE_SKIP, |
Maheshwar Ajja | 1d053f8 | 2011-07-20 20:45:11 +0530 | [diff] [blame] | 229 | PICTURE_TYPE_IDR, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 230 | PICTURE_TYPE_UNKNOWN |
| 231 | }; |
| 232 | |
| 233 | enum vdec_buffer { |
| 234 | VDEC_BUFFER_TYPE_INPUT, |
| 235 | VDEC_BUFFER_TYPE_OUTPUT |
| 236 | }; |
| 237 | |
| 238 | struct vdec_allocatorproperty { |
| 239 | enum vdec_buffer buffer_type; |
| 240 | uint32_t mincount; |
| 241 | uint32_t maxcount; |
| 242 | uint32_t actualcount; |
| 243 | size_t buffer_size; |
| 244 | uint32_t alignment; |
| 245 | uint32_t buf_poolid; |
Deepak Verma | 827990a | 2012-12-05 12:55:01 +0530 | [diff] [blame^] | 246 | size_t meta_buffer_size; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 247 | }; |
| 248 | |
| 249 | struct vdec_bufferpayload { |
| 250 | void __user *bufferaddr; |
| 251 | size_t buffer_len; |
| 252 | int pmem_fd; |
| 253 | size_t offset; |
| 254 | size_t mmaped_size; |
| 255 | }; |
| 256 | |
| 257 | struct vdec_setbuffer_cmd { |
| 258 | enum vdec_buffer buffer_type; |
| 259 | struct vdec_bufferpayload buffer; |
| 260 | }; |
| 261 | |
| 262 | struct vdec_fillbuffer_cmd { |
| 263 | struct vdec_bufferpayload buffer; |
| 264 | void *client_data; |
| 265 | }; |
| 266 | |
| 267 | enum vdec_bufferflush { |
| 268 | VDEC_FLUSH_TYPE_INPUT, |
| 269 | VDEC_FLUSH_TYPE_OUTPUT, |
| 270 | VDEC_FLUSH_TYPE_ALL |
| 271 | }; |
| 272 | |
| 273 | enum vdec_codec { |
| 274 | VDEC_CODECTYPE_H264 = 0x1, |
| 275 | VDEC_CODECTYPE_H263 = 0x2, |
| 276 | VDEC_CODECTYPE_MPEG4 = 0x3, |
| 277 | VDEC_CODECTYPE_DIVX_3 = 0x4, |
| 278 | VDEC_CODECTYPE_DIVX_4 = 0x5, |
| 279 | VDEC_CODECTYPE_DIVX_5 = 0x6, |
| 280 | VDEC_CODECTYPE_DIVX_6 = 0x7, |
| 281 | VDEC_CODECTYPE_XVID = 0x8, |
| 282 | VDEC_CODECTYPE_MPEG1 = 0x9, |
| 283 | VDEC_CODECTYPE_MPEG2 = 0xa, |
| 284 | VDEC_CODECTYPE_VC1 = 0xb, |
| 285 | VDEC_CODECTYPE_VC1_RCV = 0xc |
| 286 | }; |
| 287 | |
| 288 | enum vdec_mpeg2_profile { |
| 289 | VDEC_MPEG2ProfileSimple = 0x1, |
| 290 | VDEC_MPEG2ProfileMain = 0x2, |
| 291 | VDEC_MPEG2Profile422 = 0x4, |
| 292 | VDEC_MPEG2ProfileSNR = 0x8, |
| 293 | VDEC_MPEG2ProfileSpatial = 0x10, |
| 294 | VDEC_MPEG2ProfileHigh = 0x20, |
| 295 | VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000, |
| 296 | VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000, |
| 297 | VDEC_MPEG2ProfileMax = 0x7FFFFFFF |
| 298 | }; |
| 299 | |
| 300 | enum vdec_mpeg2_level { |
| 301 | |
| 302 | VDEC_MPEG2LevelLL = 0x1, |
| 303 | VDEC_MPEG2LevelML = 0x2, |
| 304 | VDEC_MPEG2LevelH14 = 0x4, |
| 305 | VDEC_MPEG2LevelHL = 0x8, |
| 306 | VDEC_MPEG2LevelKhronosExtensions = 0x6F000000, |
| 307 | VDEC_MPEG2LevelVendorStartUnused = 0x7F000000, |
| 308 | VDEC_MPEG2LevelMax = 0x7FFFFFFF |
| 309 | }; |
| 310 | |
| 311 | enum vdec_mpeg4_profile { |
| 312 | VDEC_MPEG4ProfileSimple = 0x01, |
| 313 | VDEC_MPEG4ProfileSimpleScalable = 0x02, |
| 314 | VDEC_MPEG4ProfileCore = 0x04, |
| 315 | VDEC_MPEG4ProfileMain = 0x08, |
| 316 | VDEC_MPEG4ProfileNbit = 0x10, |
| 317 | VDEC_MPEG4ProfileScalableTexture = 0x20, |
| 318 | VDEC_MPEG4ProfileSimpleFace = 0x40, |
| 319 | VDEC_MPEG4ProfileSimpleFBA = 0x80, |
| 320 | VDEC_MPEG4ProfileBasicAnimated = 0x100, |
| 321 | VDEC_MPEG4ProfileHybrid = 0x200, |
| 322 | VDEC_MPEG4ProfileAdvancedRealTime = 0x400, |
| 323 | VDEC_MPEG4ProfileCoreScalable = 0x800, |
| 324 | VDEC_MPEG4ProfileAdvancedCoding = 0x1000, |
| 325 | VDEC_MPEG4ProfileAdvancedCore = 0x2000, |
| 326 | VDEC_MPEG4ProfileAdvancedScalable = 0x4000, |
| 327 | VDEC_MPEG4ProfileAdvancedSimple = 0x8000, |
| 328 | VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000, |
| 329 | VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000, |
| 330 | VDEC_MPEG4ProfileMax = 0x7FFFFFFF |
| 331 | }; |
| 332 | |
| 333 | enum vdec_mpeg4_level { |
| 334 | VDEC_MPEG4Level0 = 0x01, |
| 335 | VDEC_MPEG4Level0b = 0x02, |
| 336 | VDEC_MPEG4Level1 = 0x04, |
| 337 | VDEC_MPEG4Level2 = 0x08, |
| 338 | VDEC_MPEG4Level3 = 0x10, |
| 339 | VDEC_MPEG4Level4 = 0x20, |
| 340 | VDEC_MPEG4Level4a = 0x40, |
| 341 | VDEC_MPEG4Level5 = 0x80, |
| 342 | VDEC_MPEG4LevelKhronosExtensions = 0x6F000000, |
| 343 | VDEC_MPEG4LevelVendorStartUnused = 0x7F000000, |
| 344 | VDEC_MPEG4LevelMax = 0x7FFFFFFF |
| 345 | }; |
| 346 | |
| 347 | enum vdec_avc_profile { |
| 348 | VDEC_AVCProfileBaseline = 0x01, |
| 349 | VDEC_AVCProfileMain = 0x02, |
| 350 | VDEC_AVCProfileExtended = 0x04, |
| 351 | VDEC_AVCProfileHigh = 0x08, |
| 352 | VDEC_AVCProfileHigh10 = 0x10, |
| 353 | VDEC_AVCProfileHigh422 = 0x20, |
| 354 | VDEC_AVCProfileHigh444 = 0x40, |
| 355 | VDEC_AVCProfileKhronosExtensions = 0x6F000000, |
| 356 | VDEC_AVCProfileVendorStartUnused = 0x7F000000, |
| 357 | VDEC_AVCProfileMax = 0x7FFFFFFF |
| 358 | }; |
| 359 | |
| 360 | enum vdec_avc_level { |
| 361 | VDEC_AVCLevel1 = 0x01, |
| 362 | VDEC_AVCLevel1b = 0x02, |
| 363 | VDEC_AVCLevel11 = 0x04, |
| 364 | VDEC_AVCLevel12 = 0x08, |
| 365 | VDEC_AVCLevel13 = 0x10, |
| 366 | VDEC_AVCLevel2 = 0x20, |
| 367 | VDEC_AVCLevel21 = 0x40, |
| 368 | VDEC_AVCLevel22 = 0x80, |
| 369 | VDEC_AVCLevel3 = 0x100, |
| 370 | VDEC_AVCLevel31 = 0x200, |
| 371 | VDEC_AVCLevel32 = 0x400, |
| 372 | VDEC_AVCLevel4 = 0x800, |
| 373 | VDEC_AVCLevel41 = 0x1000, |
| 374 | VDEC_AVCLevel42 = 0x2000, |
| 375 | VDEC_AVCLevel5 = 0x4000, |
| 376 | VDEC_AVCLevel51 = 0x8000, |
| 377 | VDEC_AVCLevelKhronosExtensions = 0x6F000000, |
| 378 | VDEC_AVCLevelVendorStartUnused = 0x7F000000, |
| 379 | VDEC_AVCLevelMax = 0x7FFFFFFF |
| 380 | }; |
| 381 | |
| 382 | enum vdec_divx_profile { |
| 383 | VDEC_DIVXProfile_qMobile = 0x01, |
| 384 | VDEC_DIVXProfile_Mobile = 0x02, |
| 385 | VDEC_DIVXProfile_HD = 0x04, |
| 386 | VDEC_DIVXProfile_Handheld = 0x08, |
| 387 | VDEC_DIVXProfile_Portable = 0x10, |
| 388 | VDEC_DIVXProfile_HomeTheater = 0x20 |
| 389 | }; |
| 390 | |
| 391 | enum vdec_xvid_profile { |
| 392 | VDEC_XVIDProfile_Simple = 0x1, |
| 393 | VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2, |
| 394 | VDEC_XVIDProfile_Advanced_Simple = 0x4 |
| 395 | }; |
| 396 | |
| 397 | enum vdec_xvid_level { |
| 398 | VDEC_XVID_LEVEL_S_L0 = 0x1, |
| 399 | VDEC_XVID_LEVEL_S_L1 = 0x2, |
| 400 | VDEC_XVID_LEVEL_S_L2 = 0x4, |
| 401 | VDEC_XVID_LEVEL_S_L3 = 0x8, |
| 402 | VDEC_XVID_LEVEL_ARTS_L1 = 0x10, |
| 403 | VDEC_XVID_LEVEL_ARTS_L2 = 0x20, |
| 404 | VDEC_XVID_LEVEL_ARTS_L3 = 0x40, |
| 405 | VDEC_XVID_LEVEL_ARTS_L4 = 0x80, |
| 406 | VDEC_XVID_LEVEL_AS_L0 = 0x100, |
| 407 | VDEC_XVID_LEVEL_AS_L1 = 0x200, |
| 408 | VDEC_XVID_LEVEL_AS_L2 = 0x400, |
| 409 | VDEC_XVID_LEVEL_AS_L3 = 0x800, |
| 410 | VDEC_XVID_LEVEL_AS_L4 = 0x1000 |
| 411 | }; |
| 412 | |
| 413 | enum vdec_h263profile { |
| 414 | VDEC_H263ProfileBaseline = 0x01, |
| 415 | VDEC_H263ProfileH320Coding = 0x02, |
| 416 | VDEC_H263ProfileBackwardCompatible = 0x04, |
| 417 | VDEC_H263ProfileISWV2 = 0x08, |
| 418 | VDEC_H263ProfileISWV3 = 0x10, |
| 419 | VDEC_H263ProfileHighCompression = 0x20, |
| 420 | VDEC_H263ProfileInternet = 0x40, |
| 421 | VDEC_H263ProfileInterlace = 0x80, |
| 422 | VDEC_H263ProfileHighLatency = 0x100, |
| 423 | VDEC_H263ProfileKhronosExtensions = 0x6F000000, |
| 424 | VDEC_H263ProfileVendorStartUnused = 0x7F000000, |
| 425 | VDEC_H263ProfileMax = 0x7FFFFFFF |
| 426 | }; |
| 427 | |
| 428 | enum vdec_h263level { |
| 429 | VDEC_H263Level10 = 0x01, |
| 430 | VDEC_H263Level20 = 0x02, |
| 431 | VDEC_H263Level30 = 0x04, |
| 432 | VDEC_H263Level40 = 0x08, |
| 433 | VDEC_H263Level45 = 0x10, |
| 434 | VDEC_H263Level50 = 0x20, |
| 435 | VDEC_H263Level60 = 0x40, |
| 436 | VDEC_H263Level70 = 0x80, |
| 437 | VDEC_H263LevelKhronosExtensions = 0x6F000000, |
| 438 | VDEC_H263LevelVendorStartUnused = 0x7F000000, |
| 439 | VDEC_H263LevelMax = 0x7FFFFFFF |
| 440 | }; |
| 441 | |
| 442 | enum vdec_wmv_format { |
| 443 | VDEC_WMVFormatUnused = 0x01, |
| 444 | VDEC_WMVFormat7 = 0x02, |
| 445 | VDEC_WMVFormat8 = 0x04, |
| 446 | VDEC_WMVFormat9 = 0x08, |
| 447 | VDEC_WMFFormatKhronosExtensions = 0x6F000000, |
| 448 | VDEC_WMFFormatVendorStartUnused = 0x7F000000, |
| 449 | VDEC_WMVFormatMax = 0x7FFFFFFF |
| 450 | }; |
| 451 | |
| 452 | enum vdec_vc1_profile { |
| 453 | VDEC_VC1ProfileSimple = 0x1, |
| 454 | VDEC_VC1ProfileMain = 0x2, |
| 455 | VDEC_VC1ProfileAdvanced = 0x4 |
| 456 | }; |
| 457 | |
| 458 | enum vdec_vc1_level { |
| 459 | VDEC_VC1_LEVEL_S_Low = 0x1, |
| 460 | VDEC_VC1_LEVEL_S_Medium = 0x2, |
| 461 | VDEC_VC1_LEVEL_M_Low = 0x4, |
| 462 | VDEC_VC1_LEVEL_M_Medium = 0x8, |
| 463 | VDEC_VC1_LEVEL_M_High = 0x10, |
| 464 | VDEC_VC1_LEVEL_A_L0 = 0x20, |
| 465 | VDEC_VC1_LEVEL_A_L1 = 0x40, |
| 466 | VDEC_VC1_LEVEL_A_L2 = 0x80, |
| 467 | VDEC_VC1_LEVEL_A_L3 = 0x100, |
| 468 | VDEC_VC1_LEVEL_A_L4 = 0x200 |
| 469 | }; |
| 470 | |
| 471 | struct vdec_profile_level { |
| 472 | uint32_t profiles; |
| 473 | uint32_t levels; |
| 474 | }; |
| 475 | |
| 476 | enum vdec_interlaced_format { |
| 477 | VDEC_InterlaceFrameProgressive = 0x1, |
| 478 | VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2, |
| 479 | VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4 |
| 480 | }; |
| 481 | |
| 482 | enum vdec_output_fromat { |
| 483 | VDEC_YUV_FORMAT_NV12 = 0x1, |
| 484 | VDEC_YUV_FORMAT_TILE_4x2 = 0x2 |
| 485 | }; |
| 486 | |
| 487 | enum vdec_output_order { |
| 488 | VDEC_ORDER_DISPLAY = 0x1, |
| 489 | VDEC_ORDER_DECODE = 0x2 |
| 490 | }; |
| 491 | |
| 492 | struct vdec_picsize { |
| 493 | uint32_t frame_width; |
| 494 | uint32_t frame_height; |
| 495 | uint32_t stride; |
| 496 | uint32_t scan_lines; |
| 497 | }; |
| 498 | |
| 499 | struct vdec_seqheader { |
| 500 | void __user *ptr_seqheader; |
| 501 | size_t seq_header_len; |
| 502 | int pmem_fd; |
| 503 | size_t pmem_offset; |
| 504 | }; |
| 505 | |
| 506 | struct vdec_mberror { |
| 507 | void __user *ptr_errormap; |
| 508 | size_t err_mapsize; |
| 509 | }; |
| 510 | |
| 511 | struct vdec_input_frameinfo { |
| 512 | void __user *bufferaddr; |
| 513 | size_t offset; |
| 514 | size_t datalen; |
| 515 | uint32_t flags; |
| 516 | int64_t timestamp; |
| 517 | void *client_data; |
| 518 | int pmem_fd; |
| 519 | size_t pmem_offset; |
Deepika Pepakayala | a5ede60 | 2011-12-02 11:33:26 -0800 | [diff] [blame] | 520 | void __user *desc_addr; |
| 521 | uint32_t desc_size; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 522 | }; |
| 523 | |
| 524 | struct vdec_framesize { |
| 525 | uint32_t left; |
| 526 | uint32_t top; |
| 527 | uint32_t right; |
| 528 | uint32_t bottom; |
| 529 | }; |
| 530 | |
Arun Menon | d5a0297 | 2012-03-01 10:51:06 -0800 | [diff] [blame] | 531 | struct vdec_aspectratioinfo { |
| 532 | uint32_t aspect_ratio; |
| 533 | uint32_t par_width; |
| 534 | uint32_t par_height; |
| 535 | }; |
| 536 | |
Deepak Verma | 827990a | 2012-12-05 12:55:01 +0530 | [diff] [blame^] | 537 | struct vdec_sep_metadatainfo { |
| 538 | void __user *metabufaddr; |
| 539 | uint32_t size; |
| 540 | }; |
| 541 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 542 | struct vdec_output_frameinfo { |
| 543 | void __user *bufferaddr; |
| 544 | size_t offset; |
| 545 | size_t len; |
| 546 | uint32_t flags; |
| 547 | int64_t time_stamp; |
| 548 | enum vdec_picture pic_type; |
| 549 | void *client_data; |
| 550 | void *input_frame_clientdata; |
| 551 | struct vdec_framesize framesize; |
| 552 | enum vdec_interlaced_format interlaced_format; |
Arun Menon | d5a0297 | 2012-03-01 10:51:06 -0800 | [diff] [blame] | 553 | struct vdec_aspectratioinfo aspect_ratio_info; |
Deepak Verma | 827990a | 2012-12-05 12:55:01 +0530 | [diff] [blame^] | 554 | struct vdec_sep_metadatainfo metadata_info; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 555 | }; |
| 556 | |
| 557 | union vdec_msgdata { |
| 558 | struct vdec_output_frameinfo output_frame; |
| 559 | void *input_frame_clientdata; |
| 560 | }; |
| 561 | |
| 562 | struct vdec_msginfo { |
| 563 | uint32_t status_code; |
| 564 | uint32_t msgcode; |
| 565 | union vdec_msgdata msgdata; |
| 566 | size_t msgdatasize; |
| 567 | }; |
| 568 | |
| 569 | struct vdec_framerate { |
| 570 | unsigned long fps_denominator; |
| 571 | unsigned long fps_numerator; |
| 572 | }; |
| 573 | |
| 574 | struct vdec_h264_mv{ |
| 575 | size_t size; |
| 576 | int count; |
| 577 | int pmem_fd; |
| 578 | int offset; |
| 579 | }; |
| 580 | |
| 581 | struct vdec_mv_buff_size{ |
| 582 | int width; |
| 583 | int height; |
| 584 | int size; |
| 585 | int alignment; |
| 586 | }; |
| 587 | |
Deepak Verma | 827990a | 2012-12-05 12:55:01 +0530 | [diff] [blame^] | 588 | struct vdec_meta_buffers { |
| 589 | size_t size; |
| 590 | int count; |
| 591 | int pmem_fd; |
| 592 | int pmem_fd_iommu; |
| 593 | int offset; |
| 594 | }; |
| 595 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 596 | #endif /* end of macro _VDECDECODER_H_ */ |