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gerrit-public.fairphone.software / kernel / msm / 840835bfe99438b9ab533dd7c9bef0e3960e987b / . / arch / arm / boot / dts / msm8226.dtsi
blob: fc3730c6f05960ea8cff06320946d052cd3c46bb [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
52 };
53
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]54 memory {
55 secure_mem: secure_region {
56 linux,contiguous-region;
57 reg = <0 0x3800000>;
58 label = "secure_mem";
59 };
60 };
61
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]62 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]63 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]64 interrupts = <1 2 0 1 3 0>;
65 clock-frequency = <19200000>;
66 };
67
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]68 qcom,vidc@fdc00000 {
69 compatible = "qcom,msm-vidc";
70 reg = <0xfdc00000 0xff000>;
71 interrupts = <0 44 0>;
72 qcom,load-freq-tbl = <352800 160000000>,
73 <244800 133330000>,
74 <108000 66700000>;
75 qcom,hfi = "venus";
76 qcom,bus-ports = <1>;
77 qcom,reg-presets = <0xE0024 0x0>,
78 <0x80124 0x3>,
79 <0xE0020 0x5555556>,
80 <0x800B0 0x10101001>,
81 <0x800B4 0x00101010>,
82 <0x800C0 0x1010100f>,
83 <0x800C4 0x00101010>,
84 <0x800D0 0x00000010>,
85 <0x800D4 0x00000010>,
86 <0x800D8 0x00000707>;
87 qcom,enc-ddr-ab-ib = <0 0>,
88 <129000 142000>,
89 <384000 422000>,
90 <866000 953000>;
91 qcom,dec-ddr-ab-ib = <0 0>,
92 <103000 134000>,
93 <268000 348000>,
94 <505000 657000>;
95 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
96 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
97 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
98 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]99 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]100 };
101
102 qcom,wfd {
103 compatible = "qcom,msm-wfd";
104 };
105
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]106 serial@f991f000 {
107 compatible = "qcom,msm-lsuart-v14";
108 reg = <0xf991f000 0x1000>;
109 interrupts = <0 109 0>;
110 status = "disabled";
111 };
112
113 serial@f995e000 {
114 compatible = "qcom,msm-lsuart-v14";
115 reg = <0xf995e000 0x1000>;
116 interrupts = <0 114 0>;
117 status = "disabled";
118 };
119
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]120 qcom,msm-imem@fe805000 {
121 compatible = "qcom,msm-imem";
122 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
123 };
124
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]125 qcom,sps@f9984000 {
126 compatible = "qcom,msm_sps";
127 reg = <0xf9984000 0x15000>,
128 <0xf9999000 0xb000>;
129 interrupts = <0 94 0>;
130 };
131
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame^]132 qcom,usbbam@f9a44000 {
133 compatible = "qcom,usb-bam-msm";
134 reg = <0xf9a44000 0x11000>;
135 reg-names = "hsusb";
136 interrupts = <0 135 0>;
137 interrupt-names = "hsusb";
138 qcom,usb-bam-num-pipes = <16>;
139 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
140 qcom,ignore-core-reset-ack;
141 qcom,disable-clk-gating;
142
143 qcom,pipe0 {
144 label = "hsusb-qdss-in-0";
145 qcom,usb-bam-mem-type = <3>;
146 qcom,bam-type = <1>;
147 qcom,dir = <1>;
148 qcom,pipe-num = <0>;
149 qcom,peer-bam = <1>;
150 qcom,src-bam-physical-address = <0xfc37c000>;
151 qcom,src-bam-pipe-index = <0>;
152 qcom,dst-bam-physical-address = <0xf9a44000>;
153 qcom,dst-bam-pipe-index = <2>;
154 qcom,data-fifo-offset = <0x0>;
155 qcom,data-fifo-size = <0x600>;
156 qcom,descriptor-fifo-offset = <0x600>;
157 qcom,descriptor-fifo-size = <0x200>;
158 };
159 };
160
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]161 usb@f9a55000 {
162 compatible = "qcom,hsusb-otg";
163 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]164 interrupts = <0 134 0>, <0 140 0>;
165 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]166 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]167 HSUSB_1p8-supply = <&pm8226_l10>;
168 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]169 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]170
171 qcom,hsusb-otg-phy-type = <2>;
172 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]173 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]174 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]175 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]176
177 qcom,msm-bus,name = "usb2";
178 qcom,msm-bus,num-cases = <2>;
179 qcom,msm-bus,active-only = <0>;
180 qcom,msm-bus,num-paths = <1>;
181 qcom,msm-bus,vectors-KBps =
182 <87 512 0 0>,
183 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]184 };
185
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]186 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]187 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]188 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]189 };
190
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]191 wcd9xxx_intc: wcd9xxx-irq {
192 compatible = "qcom,wcd9xxx-irq";
193 interrupt-controller;
194 #interrupt-cells = <1>;
195 interrupt-parent = <&msmgpio>;
196 interrupts = <68 0>;
197 interrupt-names = "cdc-int";
198 };
199
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]200 slim@fe12f000 {
201 cell-index = <1>;
202 compatible = "qcom,slim-ngd";
203 reg = <0xfe12f000 0x35000>,
204 <0xfe104000 0x20000>;
205 reg-names = "slimbus_physical", "slimbus_bam_physical";
206 interrupts = <0 163 0>, <0 164 0>;
207 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]208
209 tapan_codec {
210 compatible = "qcom,tapan-slim-pgd";
211 elemental-addr = [00 01 E0 00 17 02];
212
213 interrupt-parent = <&wcd9xxx_intc>;
214 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
215 17 18 19 20 21 22 23 24 25 26 27 28>;
216 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
217
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]218 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]219 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
220 qcom,cdc-vdd-buck-current = <650000>;
221
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]222 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]223 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
224 qcom,cdc-vdd-h-current = <25000>;
225
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]226 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]227 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
228 qcom,cdc-vdd-px-current = <25000>;
229
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]230 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]231 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
232 qcom,cdc-vdd-a-1p2v-current = <10000>;
233
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]234 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]235 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
236 qcom,cdc-vdd-cx-current = <10000>;
237
238 qcom,cdc-micbias-ldoh-v = <0x3>;
239 qcom,cdc-micbias-cfilt1-mv = <1800>;
240 qcom,cdc-micbias-cfilt2-mv = <1800>;
241 qcom,cdc-micbias-cfilt3-mv = <1800>;
242
243 qcom,cdc-micbias1-cfilt-sel = <0x0>;
244 qcom,cdc-micbias2-cfilt-sel = <0x1>;
245 qcom,cdc-micbias3-cfilt-sel = <0x2>;
246
247 qcom,cdc-mclk-clk-rate = <9600000>;
248 qcom,cdc-slim-ifd = "tapan-slim-ifd";
249 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
250 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]251 };
252
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]253 qcom,msm-adsp-loader {
254 compatible = "qcom,adsp-loader";
255 qcom,adsp-state = <0>;
256 };
257
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]258 sound {
259 compatible = "qcom,msm8226-audio-tapan";
260 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]261 qcom,tapan-mclk-clk-freq = <9600000>;
262 };
263
264 qcom,msm-pcm {
265 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]266 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]267 };
268
269 qcom,msm-pcm-routing {
270 compatible = "qcom,msm-pcm-routing";
271 };
272
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]273 qcom,msm-pcm-low-latency {
274 compatible = "qcom,msm-pcm-dsp";
275 qcom,msm-pcm-dsp-id = <1>;
276 qcom,msm-pcm-low-latency;
277 };
278
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]279 qcom,msm-pcm-lpa {
280 compatible = "qcom,msm-pcm-lpa";
281 };
282
283 qcom,msm-compr-dsp {
284 compatible = "qcom,msm-compr-dsp";
285 };
286
287 qcom,msm-voip-dsp {
288 compatible = "qcom,msm-voip-dsp";
289 };
290
291 qcom,msm-pcm-voice {
292 compatible = "qcom,msm-pcm-voice";
293 };
294
295 qcom,msm-stub-codec {
296 compatible = "qcom,msm-stub-codec";
297 };
298
299 qcom,msm-dai-fe {
300 compatible = "qcom,msm-dai-fe";
301 };
302
303 qcom,msm-pcm-afe {
304 compatible = "qcom,msm-pcm-afe";
305 };
306
307 qcom,msm-dai-q6-hdmi {
308 compatible = "qcom,msm-dai-q6-hdmi";
309 qcom,msm-dai-q6-dev-id = <8>;
310 };
311
312 qcom,msm-dai-q6 {
313 compatible = "qcom,msm-dai-q6";
314 qcom,msm-dai-q6-sb-0-rx {
315 compatible = "qcom,msm-dai-q6-dev";
316 qcom,msm-dai-q6-dev-id = <16384>;
317 };
318
319 qcom,msm-dai-q6-sb-0-tx {
320 compatible = "qcom,msm-dai-q6-dev";
321 qcom,msm-dai-q6-dev-id = <16385>;
322 };
323
324 qcom,msm-dai-q6-sb-1-rx {
325 compatible = "qcom,msm-dai-q6-dev";
326 qcom,msm-dai-q6-dev-id = <16386>;
327 };
328
329 qcom,msm-dai-q6-sb-1-tx {
330 compatible = "qcom,msm-dai-q6-dev";
331 qcom,msm-dai-q6-dev-id = <16387>;
332 };
333
334 qcom,msm-dai-q6-sb-3-rx {
335 compatible = "qcom,msm-dai-q6-dev";
336 qcom,msm-dai-q6-dev-id = <16390>;
337 };
338
339 qcom,msm-dai-q6-sb-3-tx {
340 compatible = "qcom,msm-dai-q6-dev";
341 qcom,msm-dai-q6-dev-id = <16391>;
342 };
343
344 qcom,msm-dai-q6-sb-4-rx {
345 compatible = "qcom,msm-dai-q6-dev";
346 qcom,msm-dai-q6-dev-id = <16392>;
347 };
348
349 qcom,msm-dai-q6-sb-4-tx {
350 compatible = "qcom,msm-dai-q6-dev";
351 qcom,msm-dai-q6-dev-id = <16393>;
352 };
353
354 qcom,msm-dai-q6-bt-sco-rx {
355 compatible = "qcom,msm-dai-q6-dev";
356 qcom,msm-dai-q6-dev-id = <12288>;
357 };
358
359 qcom,msm-dai-q6-bt-sco-tx {
360 compatible = "qcom,msm-dai-q6-dev";
361 qcom,msm-dai-q6-dev-id = <12289>;
362 };
363
364 qcom,msm-dai-q6-int-fm-rx {
365 compatible = "qcom,msm-dai-q6-dev";
366 qcom,msm-dai-q6-dev-id = <12292>;
367 };
368
369 qcom,msm-dai-q6-int-fm-tx {
370 compatible = "qcom,msm-dai-q6-dev";
371 qcom,msm-dai-q6-dev-id = <12293>;
372 };
373
374 qcom,msm-dai-q6-be-afe-pcm-rx {
375 compatible = "qcom,msm-dai-q6-dev";
376 qcom,msm-dai-q6-dev-id = <224>;
377 };
378
379 qcom,msm-dai-q6-be-afe-pcm-tx {
380 compatible = "qcom,msm-dai-q6-dev";
381 qcom,msm-dai-q6-dev-id = <225>;
382 };
383
384 qcom,msm-dai-q6-afe-proxy-rx {
385 compatible = "qcom,msm-dai-q6-dev";
386 qcom,msm-dai-q6-dev-id = <241>;
387 };
388
389 qcom,msm-dai-q6-afe-proxy-tx {
390 compatible = "qcom,msm-dai-q6-dev";
391 qcom,msm-dai-q6-dev-id = <240>;
392 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]393
394 qcom,msm-dai-q6-incall-record-rx {
395 compatible = "qcom,msm-dai-q6-dev";
396 qcom,msm-dai-q6-dev-id = <32771>;
397 };
398
399 qcom,msm-dai-q6-incall-record-tx {
400 compatible = "qcom,msm-dai-q6-dev";
401 qcom,msm-dai-q6-dev-id = <32772>;
402 };
403
404 qcom,msm-dai-q6-incall-music-rx {
405 compatible = "qcom,msm-dai-q6-dev";
406 qcom,msm-dai-q6-dev-id = <32773>;
407 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]408 };
409
410 qcom,msm-pcm-hostless {
411 compatible = "qcom,msm-pcm-hostless";
412 };
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]413 qcom,pronto@fb21b000 {
414 compatible = "qcom,pil-pronto";
415 reg = <0xfb21b000 0x3000>,
416 <0xfc401700 0x4>,
417 <0xfd485300 0xc>;
418 reg-names = "pmu_base", "clk_base", "halt_base";
419 interrupts = <0 149 1>;
420 vdd_pronto_pll-supply = <&pm8226_l12>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]421
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]422 qcom,firmware-name = "wcnss";
423 };
424 qcom,wcnss-wlan@fb000000 {
425 compatible = "qcom,wcnss_wlan";
426 reg = <0xfb000000 0x280000>;
427 reg-names = "wcnss_mmio";
428 interrupts = <0 145 0 0 146 0>;
429 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
430
431 qcom,pronto-vddmx-supply = <&pm8226_l3>;
432 qcom,pronto-vddcx-supply = <&pm8226_s1>;
433 qcom,pronto-vddpx-supply = <&pm8226_l6>;
434 qcom,iris-vddxo-supply = <&pm8226_l10>;
435 qcom,iris-vddrfa-supply = <&pm8226_l24>;
436 qcom,iris-vddpa-supply = <&pm8226_l16>;
437 qcom,iris-vdddig-supply = <&pm8226_l24>;
438
439 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
440 qcom,has_pronto_hw;
441 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]442
443 qcom,msm-adsp-sensors {
444 compatible = "qcom,msm-adsp-sensors";
445 qcom,src-id = <11>;
446 qcom,dst-id = <604>;
447 qcom,ab = <32505856>;
448 qcom,ib = <32505856>;
449 };
450
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]451 qcom,wdt@f9017000 {
452 compatible = "qcom,msm-watchdog";
453 reg = <0xf9017000 0x1000>;
454 interrupts = <0 3 0>, <0 4 0>;
455 qcom,bark-time = <11000>;
456 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]457 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]458 };
459
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]460 qcom,smem@fa00000 {
461 compatible = "qcom,smem";
462 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]463 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]464 <0xfc428000 0x4000>;
465 reg-names = "smem", "irq-reg-base", "aux-mem1";
466
467 qcom,smd-modem {
468 compatible = "qcom,smd";
469 qcom,smd-edge = <0>;
470 qcom,smd-irq-offset = <0x8>;
471 qcom,smd-irq-bitmask = <0x1000>;
472 qcom,pil-string = "modem";
473 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]474 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]475
476 qcom,smsm-modem {
477 compatible = "qcom,smsm";
478 qcom,smsm-edge = <0>;
479 qcom,smsm-irq-offset = <0x8>;
480 qcom,smsm-irq-bitmask = <0x2000>;
481 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]482 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]483
484 qcom,smd-adsp {
485 compatible = "qcom,smd";
486 qcom,smd-edge = <1>;
487 qcom,smd-irq-offset = <0x8>;
488 qcom,smd-irq-bitmask = <0x100>;
489 qcom,pil-string = "adsp";
490 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]491 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]492
493 qcom,smsm-adsp {
494 compatible = "qcom,smsm";
495 qcom,smsm-edge = <1>;
496 qcom,smsm-irq-offset = <0x8>;
497 qcom,smsm-irq-bitmask = <0x200>;
498 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]499 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]500
501 qcom,smd-wcnss {
502 compatible = "qcom,smd";
503 qcom,smd-edge = <6>;
504 qcom,smd-irq-offset = <0x8>;
505 qcom,smd-irq-bitmask = <0x20000>;
506 qcom,pil-string = "wcnss";
507 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]508 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]509
510 qcom,smsm-wcnss {
511 compatible = "qcom,smsm";
512 qcom,smsm-edge = <6>;
513 qcom,smsm-irq-offset = <0x8>;
514 qcom,smsm-irq-bitmask = <0x80000>;
515 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]516 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]517
518 qcom,smd-rpm {
519 compatible = "qcom,smd";
520 qcom,smd-edge = <15>;
521 qcom,smd-irq-offset = <0x8>;
522 qcom,smd-irq-bitmask = <0x1>;
523 interrupts = <0 168 1>;
524 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]525 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]526 };
527
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]528 rpm_bus: qcom,rpm-smd {
529 compatible = "qcom,rpm-smd";
530 rpm-channel-name = "rpm_requests";
531 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]532 };
533
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]534 sdcc1: qcom,sdcc@f9824000 {
535 cell-index = <1>; /* SDC1 eMMC slot */
536 compatible = "qcom,msm-sdcc";
537
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]538 reg = <0xf9824000 0x800>,
539 <0xf9824800 0x100>,
540 <0xf9804000 0x7000>;
541 reg-names = "core_mem", "dml_mem", "bam_mem";
542 interrupts = <0 123 0>, <0 137 0>;
543 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]544
545 qcom,bus-width = <8>;
546 status = "disabled";
547 };
548
549 sdcc2: qcom,sdcc@f98a4000 {
550 cell-index = <2>; /* SDC2 SD card slot */
551 compatible = "qcom,msm-sdcc";
552
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]553 reg = <0xf98a4000 0x800>,
554 <0xf98a4800 0x100>,
555 <0xf9884000 0x7000>;
556 reg-names = "core_mem", "dml_mem", "bam_mem";
557 interrupts = <0 125 0>, <0 220 0>;
558 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]559
560 qcom,bus-width = <4>;
561 status = "disabled";
562 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]563
564 spmi_bus: qcom,spmi@fc4c0000 {
565 cell-index = <0>;
566 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]567 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]568 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]569 <0Xfc4cb000 0x1000>,
570 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]571 /* 190,ee0_krait_hlos_spmi_periph_irq */
572 /* 187,channel_0_krait_hlos_trans_done_irq */
573 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]574 qcom,pmic-arb-ee = <0>;
575 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]576 };
577
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]578 i2c@f9926000 { /* BLSP-1 QUP-4 */
579 cell-index = <0>;
580 compatible = "qcom,i2c-qup";
581 reg = <0xf9926000 0x1000>;
582 #address-cells = <1>;
583 #size-cells = <0>;
584 reg-names = "qup_phys_addr";
585 interrupts = <0 98 0>;
586 interrupt-names = "qup_err_intr";
587 qcom,i2c-bus-freq = <100000>;
588 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]589
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]590 i2c@f9927000 { /* BLSP1 QUP5 */
591 cell-index = <5>;
592 compatible = "qcom,i2c-qup";
593 #address-cells = <1>;
594 #size-cells = <0>;
595 reg-names = "qup_phys_addr";
596 reg = <0xf9927000 0x1000>;
597 interrupt-names = "qup_err_intr";
598 interrupts = <0 99 0>;
599 qcom,i2c-bus-freq = <100000>;
600 qcom,i2c-src-freq = <19200000>;
601 };
602
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]603 qcom,acpuclk@f9011050 {
604 compatible = "qcom,acpuclk-a7";
605 reg = <0xf9011050 0x8>;
606 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]607 a7_cpu-supply = <&apc_vreg_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]608 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]609 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]610
611 qcom,ocmem@fdd00000 {
612 compatible = "qcom,msm-ocmem";
613 reg = <0xfdd00000 0x2000>,
614 <0xfdd02000 0x2000>,
615 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]616 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]617 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
618 interrupts = <0 76 0 0 77 0>;
619 interrupt-names = "ocmem_irq", "dm_irq";
620 qcom,ocmem-num-regions = <0x1>;
621 qcom,ocmem-num-macros = <0x2>;
622 qcom,resource-type = <0x706d636f>;
623 #address-cells = <1>;
624 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]625 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]626
627 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]628 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]629 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]630 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]631 };
632 };
633
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]634 qcom,venus@fdce0000 {
635 compatible = "qcom,pil-venus";
636 reg = <0xfdce0000 0x4000>,
637 <0xfdc80000 0x400>;
638 reg-names = "wrapper_base", "vbif_base";
639 vdd-supply = <&gdsc_venus>;
640
641 qcom,firmware-name = "venus";
642 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]643
644 qcom,pronto@fb21b000 {
645 compatible = "qcom,pil-pronto";
646 reg = <0xfb21b000 0x3000>,
647 <0xfc401700 0x4>,
648 <0xfd485300 0xc>;
649 reg-names = "pmu_base", "clk_base", "halt_base";
650 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]651 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]652
653 qcom,firmware-name = "wcnss";
654 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]655
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]656 qcom,iris-fm {
657 compatible = "qcom,iris_fm";
658 };
659
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]660 qcom,lpass@fe200000 {
661 compatible = "qcom,pil-q6v5-lpass";
662 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]663 <0xfd485100 0x00010>,
664 <0xfc4016c0 0x00004>;
665 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]666 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]667 interrupts = <0 162 1>;
668
669 qcom,firmware-name = "adsp";
670 };
671
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]672 qcom,mss@fc880000 {
673 compatible = "qcom,pil-q6v5-mss";
674 reg = <0xfc880000 0x100>,
675 <0xfd485000 0x400>,
676 <0xfc820000 0x020>,
677 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]678 <0xfd485194 0x4>;
679 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]680 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]681
682 interrupts = <0 24 1>;
683 vdd_mss-supply = <&pm8226_s1>;
684 vdd_cx-supply = <&pm8226_s1_corner>;
685 vdd_mx-supply = <&pm8226_l3>;
686 vdd_pll-supply = <&pm8226_l8>;
687 qcom,vdd_pll = <1800000>;
688
689 qcom,is-loadable;
690 qcom,firmware-name = "mba";
691 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]692
693 /* GPIO input from mss */
694 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
695
696 /* GPIO output to mss */
697 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]698 };
699
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]700 qcom,msm-mem-hole {
701 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]702 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]703 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]704
705 tsens: tsens@fc4a8000 {
706 compatible = "qcom,msm-tsens";
707 reg = <0xfc4a8000 0x2000>,
708 <0xfc4b8000 0x1000>;
709 reg-names = "tsens_physical", "tsens_eeprom_physical";
710 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]711 qcom,sensors = <4>;
712 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]713 qcom,calib-mode = "fuse_map2";
714 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]715
716 qcom,msm-thermal {
717 compatible = "qcom,msm-thermal";
718 qcom,sensor-id = <0>;
719 qcom,poll-ms = <250>;
720 qcom,limit-temp = <60>;
721 qcom,temp-hysteresis = <10>;
722 qcom,freq-step = <2>;
723 };
724
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]725 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
726 compatible = "qcom,spi-qup-v2";
727 #address-cells = <1>;
728 #size-cells = <0>;
729 reg-names = "spi_physical", "spi_bam_physical";
730 reg = <0xf9923000 0x1000>,
731 <0xf9904000 0xF000>;
732 interrupt-names = "spi_irq", "spi_bam_irq";
733 interrupts = <0 95 0>, <0 238 0>;
734 spi-max-frequency = <19200000>;
735
736 gpios = <&msmgpio 3 0>, /* CLK */
737 <&msmgpio 1 0>, /* MISO */
738 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]739 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]740
741 qcom,infinite-mode = <0>;
742 qcom,use-bam;
743 qcom,ver-reg-exists;
744 qcom,bam-consumer-pipe-index = <12>;
745 qcom,bam-producer-pipe-index = <13>;
746 };
747
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]748 qcom,bam_dmux@fc834000 {
749 compatible = "qcom,bam_dmux";
750 reg = <0xfc834000 0x7000>;
751 interrupts = <0 29 1>;
752 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]753
754 qcom,msm-rtb {
755 compatible = "qcom,msm-rtb";
756 qcom,memory-reservation-type = "EBI1";
757 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
758 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]759
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]760 qcom,msm-rng@f9bff000 {
761 compatible = "qcom,msm-rng";
762 reg = <0xf9bff000 0x200>;
763 qcom,msm-rng-iface-clk;
764 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]765
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]766 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]767 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]768 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]769 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]770
771 jtag_mm0: jtagmm@fc33c000 {
772 compatible = "qcom,jtag-mm";
773 reg = <0xfc33c000 0x1000>,
774 <0xfc330000 0x1000>;
775 reg-names = "etm-base","debug-base";
776 };
777
778 jtag_mm1: jtagmm@fc33d000 {
779 compatible = "qcom,jtag-mm";
780 reg = <0xfc33d000 0x1000>,
781 <0xfc332000 0x1000>;
782 reg-names = "etm-base","debug-base";
783 };
784
785 jtag_mm2: jtagmm@fc33e000 {
786 compatible = "qcom,jtag-mm";
787 reg = <0xfc33e000 0x1000>,
788 <0xfc334000 0x1000>;
789 reg-names = "etm-base","debug-base";
790 };
791
792 jtag_mm3: jtagmm@fc33f000 {
793 compatible = "qcom,jtag-mm";
794 reg = <0xfc33f000 0x1000>,
795 <0xfc336000 0x1000>;
796 reg-names = "etm-base","debug-base";
797 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]798
799 qcom,ipc-spinlock@fd484000 {
800 compatible = "qcom,ipc-spinlock-sfpb";
801 reg = <0xfd484000 0x400>;
802 qcom,num-locks = <8>;
803 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]804};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]805
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]806&gdsc_venus {
807 status = "ok";
808};
809
810&gdsc_mdss {
811 status = "ok";
812};
813
814&gdsc_jpeg {
815 status = "ok";
816};
817
818&gdsc_vfe {
819 status = "ok";
820};
821
822&gdsc_oxili_cx {
823 status = "ok";
824};
825
826&gdsc_usb_hsic {
827 status = "ok";
828};
829
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]830/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]831/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]832/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]833
834&pm8226_vadc {
835 chan@0 {
836 label = "usb_in";
837 reg = <0>;
838 qcom,decimation = <0>;
839 qcom,pre-div-channel-scaling = <4>;
840 qcom,calibration-type = "absolute";
841 qcom,scale-function = <0>;
842 qcom,hw-settle-time = <0>;
843 qcom,fast-avg-setup = <0>;
844 };
845
846 chan@2 {
847 label = "vchg_sns";
848 reg = <2>;
849 qcom,decimation = <0>;
850 qcom,pre-div-channel-scaling = <3>;
851 qcom,calibration-type = "absolute";
852 qcom,scale-function = <0>;
853 qcom,hw-settle-time = <0>;
854 qcom,fast-avg-setup = <0>;
855 };
856
857 chan@5 {
858 label = "vcoin";
859 reg = <5>;
860 qcom,decimation = <0>;
861 qcom,pre-div-channel-scaling = <1>;
862 qcom,calibration-type = "absolute";
863 qcom,scale-function = <0>;
864 qcom,hw-settle-time = <0>;
865 qcom,fast-avg-setup = <0>;
866 };
867
868 chan@6 {
869 label = "vbat_sns";
870 reg = <6>;
871 qcom,decimation = <0>;
872 qcom,pre-div-channel-scaling = <1>;
873 qcom,calibration-type = "absolute";
874 qcom,scale-function = <0>;
875 qcom,hw-settle-time = <0>;
876 qcom,fast-avg-setup = <0>;
877 };
878
879 chan@7 {
880 label = "vph_pwr";
881 reg = <7>;
882 qcom,decimation = <0>;
883 qcom,pre-div-channel-scaling = <1>;
884 qcom,calibration-type = "absolute";
885 qcom,scale-function = <0>;
886 qcom,hw-settle-time = <0>;
887 qcom,fast-avg-setup = <0>;
888 };
889
890 chan@30 {
891 label = "batt_therm";
892 reg = <0x30>;
893 qcom,decimation = <0>;
894 qcom,pre-div-channel-scaling = <0>;
895 qcom,calibration-type = "ratiometric";
896 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]897 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]898 qcom,fast-avg-setup = <0>;
899 };
900
901 chan@31 {
902 label = "batt_id";
903 reg = <0x31>;
904 qcom,decimation = <0>;
905 qcom,pre-div-channel-scaling = <0>;
906 qcom,calibration-type = "ratiometric";
907 qcom,scale-function = <0>;
908 qcom,hw-settle-time = <2>;
909 qcom,fast-avg-setup = <0>;
910 };
911
912 chan@b2 {
913 label = "xo_therm_pu2";
914 reg = <0xb2>;
915 qcom,decimation = <0>;
916 qcom,pre-div-channel-scaling = <0>;
917 qcom,calibration-type = "ratiometric";
918 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]919 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]920 qcom,fast-avg-setup = <0>;
921 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]922
923};
924
925&pm8226_chg {
926 status = "ok";
927
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]928 qcom,chg-chgr@1000 {
929 status = "ok";
930 };
931
932 qcom,chg-buck@1100 {
933 status = "ok";
934 };
935
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]936 qcom,chg-bat-if@1200 {
937 status = "ok";
938 };
939
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]940 qcom,chg-usb-chgpth@1300 {
941 status = "ok";
942 };
943
944 qcom,chg-boost@1500 {
945 status = "ok";
946 };
947
948 qcom,chg-misc@1600 {
949 status = "ok";
950 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]951};