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gerrit-public.fairphone.software / kernel / msm / 861c58599b2700d5b36c6b6c837f19d3a5c5b570 / . / arch / arm / boot / dts / msm8226.dtsi
blob: 29131cb4514ee9f6623e349536df32a7ddd56c11 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]24 };
25
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]26 memory {
27 secure_mem: secure_region {
28 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]29 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]30 label = "secure_mem";
31 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]32
33 qsecom_mem: qsecom_region {
34 linux,contiguous-region;
35 reg = <0 0x780000>;
36 label = "qsecom_mem";
37 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]38 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]39
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]40 soc: soc { };
41};
42
43/include/ "msm8226-ion.dtsi"
44/include/ "msm8226-camera.dtsi"
45/include/ "msm-gdsc.dtsi"
46/include/ "msm8226-iommu.dtsi"
47/include/ "msm8226-pm.dtsi"
48/include/ "msm8226-smp2p.dtsi"
49/include/ "msm8226-gpu.dtsi"
50/include/ "msm8226-bus.dtsi"
51/include/ "msm8226-mdss.dtsi"
52/include/ "msm8226-coresight.dtsi"
53/include/ "msm8226-iommu-domains.dtsi"
54
55&soc {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 intc: interrupt-controller@f9000000 {
61 compatible = "qcom,msm-qgic2";
62 interrupt-controller;
63 #interrupt-cells = <3>;
64 reg = <0xF9000000 0x1000>,
65 <0xF9002000 0x1000>;
66 };
67
68 msmgpio: gpio@fd510000 {
69 compatible = "qcom,msm-gpio";
70 interrupt-controller;
71 #interrupt-cells = <2>;
72 reg = <0xfd510000 0x4000>;
73 gpio-controller;
74 #gpio-cells = <2>;
75 ngpio = <117>;
76 interrupts = <0 208 0>;
77 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]78 };
79
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]80 qcom,mpm2-sleep-counter@fc4a3000 {
81 compatible = "qcom,mpm2-sleep-counter";
82 reg = <0xfc4a3000 0x1000>;
83 clock-frequency = <32768>;
84 };
85
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]86 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]87 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]88 interrupts = <1 2 0 1 3 0>;
89 clock-frequency = <19200000>;
90 };
91
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]92 timer@f9020000 {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges;
96 compatible = "arm,armv7-timer-mem";
97 reg = <0xf9020000 0x1000>;
98 clock-frequency = <19200000>;
99
100 frame@f9021000 {
101 frame-number = <0>;
102 interrupts = <0 8 0x4>,
103 <0 7 0x4>;
104 reg = <0xf9021000 0x1000>,
105 <0xf9022000 0x1000>;
106 };
107
108 frame@f9023000 {
109 frame-number = <1>;
110 interrupts = <0 9 0x4>;
111 reg = <0xf9023000 0x1000>;
112 status = "disabled";
113 };
114
115 frame@f9024000 {
116 frame-number = <2>;
117 interrupts = <0 10 0x4>;
118 reg = <0xf9024000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9025000 {
123 frame-number = <3>;
124 interrupts = <0 11 0x4>;
125 reg = <0xf9025000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9026000 {
130 frame-number = <4>;
131 interrupts = <0 12 0x4>;
132 reg = <0xf9026000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9027000 {
137 frame-number = <5>;
138 interrupts = <0 13 0x4>;
139 reg = <0xf9027000 0x1000>;
140 status = "disabled";
141 };
142
143 frame@f9028000 {
144 frame-number = <6>;
145 interrupts = <0 14 0x4>;
146 reg = <0xf9028000 0x1000>;
147 status = "disabled";
148 };
149 };
150
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]151 qcom,vidc@fdc00000 {
152 compatible = "qcom,msm-vidc";
153 reg = <0xfdc00000 0xff000>;
154 interrupts = <0 44 0>;
155 qcom,load-freq-tbl = <352800 160000000>,
156 <244800 133330000>,
157 <108000 66700000>;
158 qcom,hfi = "venus";
159 qcom,bus-ports = <1>;
160 qcom,reg-presets = <0xE0024 0x0>,
161 <0x80124 0x3>,
162 <0xE0020 0x5555556>,
163 <0x800B0 0x10101001>,
164 <0x800B4 0x00101010>,
165 <0x800C0 0x1010100f>,
166 <0x800C4 0x00101010>,
167 <0x800D0 0x00000010>,
168 <0x800D4 0x00000010>,
169 <0x800D8 0x00000707>;
170 qcom,enc-ddr-ab-ib = <0 0>,
171 <129000 142000>,
172 <384000 422000>,
173 <866000 953000>;
174 qcom,dec-ddr-ab-ib = <0 0>,
175 <103000 134000>,
176 <268000 348000>,
177 <505000 657000>;
178 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
179 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
180 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
181 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]182 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]183 };
184
185 qcom,wfd {
186 compatible = "qcom,msm-wfd";
187 };
188
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]189 serial@f991f000 {
190 compatible = "qcom,msm-lsuart-v14";
191 reg = <0xf991f000 0x1000>;
192 interrupts = <0 109 0>;
193 status = "disabled";
194 };
195
196 serial@f995e000 {
197 compatible = "qcom,msm-lsuart-v14";
198 reg = <0xf995e000 0x1000>;
199 interrupts = <0 114 0>;
200 status = "disabled";
201 };
202
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]203 qcom,msm-imem@fe805000 {
204 compatible = "qcom,msm-imem";
205 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
206 };
207
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]208 qcom,sps@f9984000 {
209 compatible = "qcom,msm_sps";
210 reg = <0xf9984000 0x15000>,
211 <0xf9999000 0xb000>;
212 interrupts = <0 94 0>;
213 };
214
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]215 qcom,usbbam@f9a44000 {
216 compatible = "qcom,usb-bam-msm";
217 reg = <0xf9a44000 0x11000>;
218 reg-names = "hsusb";
219 interrupts = <0 135 0>;
220 interrupt-names = "hsusb";
221 qcom,usb-bam-num-pipes = <16>;
222 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
223 qcom,ignore-core-reset-ack;
224 qcom,disable-clk-gating;
225
226 qcom,pipe0 {
227 label = "hsusb-qdss-in-0";
228 qcom,usb-bam-mem-type = <3>;
229 qcom,bam-type = <1>;
230 qcom,dir = <1>;
231 qcom,pipe-num = <0>;
232 qcom,peer-bam = <1>;
233 qcom,src-bam-physical-address = <0xfc37c000>;
234 qcom,src-bam-pipe-index = <0>;
235 qcom,dst-bam-physical-address = <0xf9a44000>;
236 qcom,dst-bam-pipe-index = <2>;
237 qcom,data-fifo-offset = <0x0>;
238 qcom,data-fifo-size = <0x600>;
239 qcom,descriptor-fifo-offset = <0x600>;
240 qcom,descriptor-fifo-size = <0x200>;
241 };
242 };
243
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]244 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]245 compatible = "qcom,hsusb-otg";
246 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]247 interrupts = <0 134 0>, <0 140 0>;
248 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]249 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]250 HSUSB_1p8-supply = <&pm8226_l10>;
251 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]252 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]253
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]254 qcom,hsusb-otg-phy-init-seq =
255 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]256 qcom,hsusb-otg-phy-type = <2>;
257 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]258 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]259 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]260 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]261
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]262 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame^]263 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]264 qcom,msm-bus,num-paths = <1>;
265 qcom,msm-bus,vectors-KBps =
266 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame^]267 <87 512 60000 960000>,
268 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]269 };
270
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]271 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]272 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]273 reg = <0xfe8050c8 0xc8>;
Chiranjeevi Velempati9d797662013-04-22 15:45:38 +0530[diff] [blame]274 qcom,android-usb-cdrom;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]275 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]276 };
277
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]278 wcd9xxx_intc: wcd9xxx-irq {
279 compatible = "qcom,wcd9xxx-irq";
280 interrupt-controller;
281 #interrupt-cells = <1>;
282 interrupt-parent = <&msmgpio>;
283 interrupts = <68 0>;
284 interrupt-names = "cdc-int";
285 };
286
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]287 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]288 cell-index = <1>;
289 compatible = "qcom,slim-ngd";
290 reg = <0xfe12f000 0x35000>,
291 <0xfe104000 0x20000>;
292 reg-names = "slimbus_physical", "slimbus_bam_physical";
293 interrupts = <0 163 0>, <0 164 0>;
294 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]295
296 tapan_codec {
297 compatible = "qcom,tapan-slim-pgd";
298 elemental-addr = [00 01 E0 00 17 02];
299
300 interrupt-parent = <&wcd9xxx_intc>;
301 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
302 17 18 19 20 21 22 23 24 25 26 27 28>;
303 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
304
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]305 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]306 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
307 qcom,cdc-vdd-buck-current = <650000>;
308
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]309 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]310 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
311 qcom,cdc-vdd-h-current = <25000>;
312
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]313 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]314 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
315 qcom,cdc-vdd-px-current = <25000>;
316
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]317 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]318 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
319 qcom,cdc-vdd-a-1p2v-current = <10000>;
320
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]321 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]322 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
323 qcom,cdc-vdd-cx-current = <10000>;
324
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]325 qcom,cdc-static-supplies = "cdc-vdd-buck",
326 "cdc-vdd-h",
327 "cdc-vdd-px",
328 "cdc-vdd-a-1p2v",
329 "cdc-vdd-cx";
330
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]331 qcom,cdc-micbias-ldoh-v = <0x3>;
332 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]333 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]334 qcom,cdc-micbias-cfilt3-mv = <1800>;
335
336 qcom,cdc-micbias1-cfilt-sel = <0x0>;
337 qcom,cdc-micbias2-cfilt-sel = <0x1>;
338 qcom,cdc-micbias3-cfilt-sel = <0x2>;
339
340 qcom,cdc-mclk-clk-rate = <9600000>;
341 qcom,cdc-slim-ifd = "tapan-slim-ifd";
342 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
343 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]344 };
345
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]346 qcom,msm-adsp-loader {
347 compatible = "qcom,adsp-loader";
348 qcom,adsp-state = <0>;
349 };
350
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]351 sound {
352 compatible = "qcom,msm8226-audio-tapan";
353 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]354 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]355 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
356 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
357 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
358 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
359 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]360 };
361
362 qcom,msm-pcm {
363 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]364 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]365 };
366
367 qcom,msm-pcm-routing {
368 compatible = "qcom,msm-pcm-routing";
369 };
370
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]371 qcom,msm-pcm-low-latency {
372 compatible = "qcom,msm-pcm-dsp";
373 qcom,msm-pcm-dsp-id = <1>;
374 qcom,msm-pcm-low-latency;
375 };
376
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]377 qcom,msm-pcm-lpa {
378 compatible = "qcom,msm-pcm-lpa";
379 };
380
381 qcom,msm-compr-dsp {
382 compatible = "qcom,msm-compr-dsp";
383 };
384
385 qcom,msm-voip-dsp {
386 compatible = "qcom,msm-voip-dsp";
387 };
388
389 qcom,msm-pcm-voice {
390 compatible = "qcom,msm-pcm-voice";
391 };
392
393 qcom,msm-stub-codec {
394 compatible = "qcom,msm-stub-codec";
395 };
396
397 qcom,msm-dai-fe {
398 compatible = "qcom,msm-dai-fe";
399 };
400
401 qcom,msm-pcm-afe {
402 compatible = "qcom,msm-pcm-afe";
403 };
404
405 qcom,msm-dai-q6-hdmi {
406 compatible = "qcom,msm-dai-q6-hdmi";
407 qcom,msm-dai-q6-dev-id = <8>;
408 };
409
410 qcom,msm-dai-q6 {
411 compatible = "qcom,msm-dai-q6";
412 qcom,msm-dai-q6-sb-0-rx {
413 compatible = "qcom,msm-dai-q6-dev";
414 qcom,msm-dai-q6-dev-id = <16384>;
415 };
416
417 qcom,msm-dai-q6-sb-0-tx {
418 compatible = "qcom,msm-dai-q6-dev";
419 qcom,msm-dai-q6-dev-id = <16385>;
420 };
421
422 qcom,msm-dai-q6-sb-1-rx {
423 compatible = "qcom,msm-dai-q6-dev";
424 qcom,msm-dai-q6-dev-id = <16386>;
425 };
426
427 qcom,msm-dai-q6-sb-1-tx {
428 compatible = "qcom,msm-dai-q6-dev";
429 qcom,msm-dai-q6-dev-id = <16387>;
430 };
431
432 qcom,msm-dai-q6-sb-3-rx {
433 compatible = "qcom,msm-dai-q6-dev";
434 qcom,msm-dai-q6-dev-id = <16390>;
435 };
436
437 qcom,msm-dai-q6-sb-3-tx {
438 compatible = "qcom,msm-dai-q6-dev";
439 qcom,msm-dai-q6-dev-id = <16391>;
440 };
441
442 qcom,msm-dai-q6-sb-4-rx {
443 compatible = "qcom,msm-dai-q6-dev";
444 qcom,msm-dai-q6-dev-id = <16392>;
445 };
446
447 qcom,msm-dai-q6-sb-4-tx {
448 compatible = "qcom,msm-dai-q6-dev";
449 qcom,msm-dai-q6-dev-id = <16393>;
450 };
451
452 qcom,msm-dai-q6-bt-sco-rx {
453 compatible = "qcom,msm-dai-q6-dev";
454 qcom,msm-dai-q6-dev-id = <12288>;
455 };
456
457 qcom,msm-dai-q6-bt-sco-tx {
458 compatible = "qcom,msm-dai-q6-dev";
459 qcom,msm-dai-q6-dev-id = <12289>;
460 };
461
462 qcom,msm-dai-q6-int-fm-rx {
463 compatible = "qcom,msm-dai-q6-dev";
464 qcom,msm-dai-q6-dev-id = <12292>;
465 };
466
467 qcom,msm-dai-q6-int-fm-tx {
468 compatible = "qcom,msm-dai-q6-dev";
469 qcom,msm-dai-q6-dev-id = <12293>;
470 };
471
472 qcom,msm-dai-q6-be-afe-pcm-rx {
473 compatible = "qcom,msm-dai-q6-dev";
474 qcom,msm-dai-q6-dev-id = <224>;
475 };
476
477 qcom,msm-dai-q6-be-afe-pcm-tx {
478 compatible = "qcom,msm-dai-q6-dev";
479 qcom,msm-dai-q6-dev-id = <225>;
480 };
481
482 qcom,msm-dai-q6-afe-proxy-rx {
483 compatible = "qcom,msm-dai-q6-dev";
484 qcom,msm-dai-q6-dev-id = <241>;
485 };
486
487 qcom,msm-dai-q6-afe-proxy-tx {
488 compatible = "qcom,msm-dai-q6-dev";
489 qcom,msm-dai-q6-dev-id = <240>;
490 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]491
492 qcom,msm-dai-q6-incall-record-rx {
493 compatible = "qcom,msm-dai-q6-dev";
494 qcom,msm-dai-q6-dev-id = <32771>;
495 };
496
497 qcom,msm-dai-q6-incall-record-tx {
498 compatible = "qcom,msm-dai-q6-dev";
499 qcom,msm-dai-q6-dev-id = <32772>;
500 };
501
502 qcom,msm-dai-q6-incall-music-rx {
503 compatible = "qcom,msm-dai-q6-dev";
504 qcom,msm-dai-q6-dev-id = <32773>;
505 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]506 };
507
508 qcom,msm-pcm-hostless {
509 compatible = "qcom,msm-pcm-hostless";
510 };
511
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]512 qcom,msm-auxpcm {
513 compatible = "qcom,msm-auxpcm-resource";
514 qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
515 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
516 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
517 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
518 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
519 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
520 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
521 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
522
523 qcom,msm-prim-auxpcm-rx {
524 qcom,msm-auxpcm-dev-id = <4106>;
525 compatible = "qcom,msm-auxpcm-dev";
526 };
527
528 qcom,msm-prim-auxpcm-tx {
529 qcom,msm-auxpcm-dev-id = <4107>;
530 compatible = "qcom,msm-auxpcm-dev";
531 };
532 };
533
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]534 qcom,wcnss-wlan@fb000000 {
535 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]536 reg = <0xfb000000 0x280000>,
537 <0xf9011008 0x04>;
538 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]539 interrupts = <0 145 0 0 146 0>;
540 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
541
542 qcom,pronto-vddmx-supply = <&pm8226_l3>;
543 qcom,pronto-vddcx-supply = <&pm8226_s1>;
544 qcom,pronto-vddpx-supply = <&pm8226_l6>;
545 qcom,iris-vddxo-supply = <&pm8226_l10>;
546 qcom,iris-vddrfa-supply = <&pm8226_l24>;
547 qcom,iris-vddpa-supply = <&pm8226_l16>;
548 qcom,iris-vdddig-supply = <&pm8226_l24>;
549
550 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]551 qcom,has-pronto-hw;
552 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]553 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]554
555 qcom,msm-adsp-sensors {
556 compatible = "qcom,msm-adsp-sensors";
557 qcom,src-id = <11>;
558 qcom,dst-id = <604>;
559 qcom,ab = <32505856>;
560 qcom,ib = <32505856>;
561 };
562
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]563 qcom,wdt@f9017000 {
564 compatible = "qcom,msm-watchdog";
565 reg = <0xf9017000 0x1000>;
566 interrupts = <0 3 0>, <0 4 0>;
567 qcom,bark-time = <11000>;
568 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]569 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]570 };
571
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]572 qcom,smem@fa00000 {
573 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]574 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]575 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]576 <0xfc428000 0x4000>;
577 reg-names = "smem", "irq-reg-base", "aux-mem1";
578
579 qcom,smd-modem {
580 compatible = "qcom,smd";
581 qcom,smd-edge = <0>;
582 qcom,smd-irq-offset = <0x8>;
583 qcom,smd-irq-bitmask = <0x1000>;
584 qcom,pil-string = "modem";
585 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]586 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]587
588 qcom,smsm-modem {
589 compatible = "qcom,smsm";
590 qcom,smsm-edge = <0>;
591 qcom,smsm-irq-offset = <0x8>;
592 qcom,smsm-irq-bitmask = <0x2000>;
593 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]594 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]595
596 qcom,smd-adsp {
597 compatible = "qcom,smd";
598 qcom,smd-edge = <1>;
599 qcom,smd-irq-offset = <0x8>;
600 qcom,smd-irq-bitmask = <0x100>;
601 qcom,pil-string = "adsp";
602 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]603 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]604
605 qcom,smsm-adsp {
606 compatible = "qcom,smsm";
607 qcom,smsm-edge = <1>;
608 qcom,smsm-irq-offset = <0x8>;
609 qcom,smsm-irq-bitmask = <0x200>;
610 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]611 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]612
613 qcom,smd-wcnss {
614 compatible = "qcom,smd";
615 qcom,smd-edge = <6>;
616 qcom,smd-irq-offset = <0x8>;
617 qcom,smd-irq-bitmask = <0x20000>;
618 qcom,pil-string = "wcnss";
619 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]620 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]621
622 qcom,smsm-wcnss {
623 compatible = "qcom,smsm";
624 qcom,smsm-edge = <6>;
625 qcom,smsm-irq-offset = <0x8>;
626 qcom,smsm-irq-bitmask = <0x80000>;
627 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]628 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]629
630 qcom,smd-rpm {
631 compatible = "qcom,smd";
632 qcom,smd-edge = <15>;
633 qcom,smd-irq-offset = <0x8>;
634 qcom,smd-irq-bitmask = <0x1>;
635 interrupts = <0 168 1>;
636 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]637 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]638 };
639
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]640 rpm_bus: qcom,rpm-smd {
641 compatible = "qcom,rpm-smd";
642 rpm-channel-name = "rpm_requests";
643 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]644 };
645
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]646 qcom,bcl {
647 compatible = "qcom,bcl";
648 };
649
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]650 sdcc1: qcom,sdcc@f9824000 {
651 cell-index = <1>; /* SDC1 eMMC slot */
652 compatible = "qcom,msm-sdcc";
653
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]654 reg = <0xf9824000 0x800>,
655 <0xf9824800 0x100>,
656 <0xf9804000 0x7000>;
657 reg-names = "core_mem", "dml_mem", "bam_mem";
658 interrupts = <0 123 0>, <0 137 0>;
659 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]660
661 qcom,bus-width = <8>;
662 status = "disabled";
663 };
664
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]665 sdhc_1: sdhci@f9824900 {
666 compatible = "qcom,sdhci-msm";
667 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
668 reg-names = "hc_mem", "core_mem";
669
670 interrupts = <0 123 0>, <0 138 0>;
671 interrupt-names = "hc_irq", "pwr_irq";
672
673 qcom,bus-width = <8>;
674 status = "disabled";
675 };
676
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]677 sdcc2: qcom,sdcc@f98a4000 {
678 cell-index = <2>; /* SDC2 SD card slot */
679 compatible = "qcom,msm-sdcc";
680
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]681 reg = <0xf98a4000 0x800>,
682 <0xf98a4800 0x100>,
683 <0xf9884000 0x7000>;
684 reg-names = "core_mem", "dml_mem", "bam_mem";
685 interrupts = <0 125 0>, <0 220 0>;
686 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]687
688 qcom,bus-width = <4>;
689 status = "disabled";
690 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]691
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]692 sdhc_2: sdhci@f98a4900 {
693 compatible = "qcom,sdhci-msm";
694 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
695 reg-names = "hc_mem", "core_mem";
696
697 interrupts = <0 125 0>, <0 221 0>;
698 interrupt-names = "hc_irq", "pwr_irq";
699
700 qcom,bus-width = <4>;
701 status = "disabled";
702 };
703
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]704 spmi_bus: qcom,spmi@fc4c0000 {
705 cell-index = <0>;
706 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]707 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]708 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]709 <0Xfc4cb000 0x1000>,
710 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]711 /* 190,ee0_krait_hlos_spmi_periph_irq */
712 /* 187,channel_0_krait_hlos_trans_done_irq */
713 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]714 qcom,pmic-arb-ee = <0>;
715 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]716 };
717
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]718 i2c@f9926000 { /* BLSP-1 QUP-4 */
719 cell-index = <0>;
720 compatible = "qcom,i2c-qup";
721 reg = <0xf9926000 0x1000>;
722 #address-cells = <1>;
723 #size-cells = <0>;
724 reg-names = "qup_phys_addr";
725 interrupts = <0 98 0>;
726 interrupt-names = "qup_err_intr";
727 qcom,i2c-bus-freq = <100000>;
728 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]729
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]730 i2c@f9927000 { /* BLSP1 QUP5 */
731 cell-index = <5>;
732 compatible = "qcom,i2c-qup";
733 #address-cells = <1>;
734 #size-cells = <0>;
735 reg-names = "qup_phys_addr";
736 reg = <0xf9927000 0x1000>;
737 interrupt-names = "qup_err_intr";
738 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]739 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]740 qcom,i2c-src-freq = <19200000>;
741 };
742
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]743 qcom,acpuclk@f9011050 {
744 compatible = "qcom,acpuclk-a7";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]745 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]746 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]747
748 qcom,ocmem@fdd00000 {
749 compatible = "qcom,msm-ocmem";
750 reg = <0xfdd00000 0x2000>,
751 <0xfdd02000 0x2000>,
752 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]753 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]754 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
755 interrupts = <0 76 0 0 77 0>;
756 interrupt-names = "ocmem_irq", "dm_irq";
757 qcom,ocmem-num-regions = <0x1>;
758 qcom,ocmem-num-macros = <0x2>;
759 qcom,resource-type = <0x706d636f>;
760 #address-cells = <1>;
761 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]762 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]763
764 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]765 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]766 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]767 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]768 };
769 };
770
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]771 qcom,venus@fdce0000 {
772 compatible = "qcom,pil-venus";
773 reg = <0xfdce0000 0x4000>,
774 <0xfdc80000 0x400>;
775 reg-names = "wrapper_base", "vbif_base";
776 vdd-supply = <&gdsc_venus>;
777
778 qcom,firmware-name = "venus";
779 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]780
781 qcom,pronto@fb21b000 {
782 compatible = "qcom,pil-pronto";
783 reg = <0xfb21b000 0x3000>,
784 <0xfc401700 0x4>,
785 <0xfd485300 0xc>;
786 reg-names = "pmu_base", "clk_base", "halt_base";
787 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]788 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]789
790 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]791
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]792 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]793 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]794 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]795 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]796
797 /* GPIO output to wcnss */
798 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]799 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]800
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]801 qcom,iris-fm {
802 compatible = "qcom,iris_fm";
803 };
804
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]805 qcom,lpass@fe200000 {
806 compatible = "qcom,pil-q6v5-lpass";
807 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]808 <0xfd485100 0x00010>,
809 <0xfc4016c0 0x00004>;
810 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]811 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]812 interrupts = <0 162 1>;
813
814 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]815
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]816 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]817 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]818 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]819 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]820
821 /* GPIO output to lpass */
822 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]823 };
824
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]825 qcom,mss@fc880000 {
826 compatible = "qcom,pil-q6v5-mss";
827 reg = <0xfc880000 0x100>,
828 <0xfd485000 0x400>,
829 <0xfc820000 0x020>,
830 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]831 <0xfd485194 0x4>;
832 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]833 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]834
835 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]836 vdd_cx-supply = <&pm8226_s1_corner>;
837 vdd_mx-supply = <&pm8226_l3>;
838 vdd_pll-supply = <&pm8226_l8>;
839 qcom,vdd_pll = <1800000>;
840
841 qcom,is-loadable;
842 qcom,firmware-name = "mba";
843 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]844
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]845 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]846 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]847 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]848 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]849 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]850
851 /* GPIO output to mss */
852 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]853 };
854
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]855 qcom,msm-mem-hole {
856 compatible = "qcom,msm-mem-hole";
Neeti Desai3d0a98b2013-04-10 10:41:03 -0700[diff] [blame]857 qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]858 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]859
860 tsens: tsens@fc4a8000 {
861 compatible = "qcom,msm-tsens";
862 reg = <0xfc4a8000 0x2000>,
863 <0xfc4b8000 0x1000>;
864 reg-names = "tsens_physical", "tsens_eeprom_physical";
865 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]866 qcom,sensors = <4>;
867 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]868 qcom,calib-mode = "fuse_map2";
869 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]870
871 qcom,msm-thermal {
872 compatible = "qcom,msm-thermal";
873 qcom,sensor-id = <0>;
874 qcom,poll-ms = <250>;
875 qcom,limit-temp = <60>;
876 qcom,temp-hysteresis = <10>;
877 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]878 qcom,freq-control-mask = <0xf>;
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]879 };
880
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]881 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
882 compatible = "qcom,spi-qup-v2";
883 #address-cells = <1>;
884 #size-cells = <0>;
885 reg-names = "spi_physical", "spi_bam_physical";
886 reg = <0xf9923000 0x1000>,
887 <0xf9904000 0xF000>;
888 interrupt-names = "spi_irq", "spi_bam_irq";
889 interrupts = <0 95 0>, <0 238 0>;
890 spi-max-frequency = <19200000>;
891
892 gpios = <&msmgpio 3 0>, /* CLK */
893 <&msmgpio 1 0>, /* MISO */
894 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]895 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]896
897 qcom,infinite-mode = <0>;
898 qcom,use-bam;
899 qcom,ver-reg-exists;
900 qcom,bam-consumer-pipe-index = <12>;
901 qcom,bam-producer-pipe-index = <13>;
902 };
903
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]904 qcom,bam_dmux@fc834000 {
905 compatible = "qcom,bam_dmux";
906 reg = <0xfc834000 0x7000>;
907 interrupts = <0 29 1>;
908 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]909
910 qcom,msm-rtb {
911 compatible = "qcom,msm-rtb";
912 qcom,memory-reservation-type = "EBI1";
913 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
914 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]915
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]916 qcom,msm-rng@f9bff000 {
917 compatible = "qcom,msm-rng";
918 reg = <0xf9bff000 0x200>;
919 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]920 qcom,msm-bus,name = "msm-rng-noc";
921 qcom,msm-bus,num-cases = <2>;
922 qcom,msm-bus,num-paths = <1>;
923 qcom,msm-bus,vectors-KBps =
924 <1 618 0 0>,
925 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]926 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]927
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]928 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]929 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]930 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]931 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]932
933 jtag_mm0: jtagmm@fc33c000 {
934 compatible = "qcom,jtag-mm";
935 reg = <0xfc33c000 0x1000>,
936 <0xfc330000 0x1000>;
937 reg-names = "etm-base","debug-base";
938 };
939
940 jtag_mm1: jtagmm@fc33d000 {
941 compatible = "qcom,jtag-mm";
942 reg = <0xfc33d000 0x1000>,
943 <0xfc332000 0x1000>;
944 reg-names = "etm-base","debug-base";
945 };
946
947 jtag_mm2: jtagmm@fc33e000 {
948 compatible = "qcom,jtag-mm";
949 reg = <0xfc33e000 0x1000>,
950 <0xfc334000 0x1000>;
951 reg-names = "etm-base","debug-base";
952 };
953
954 jtag_mm3: jtagmm@fc33f000 {
955 compatible = "qcom,jtag-mm";
956 reg = <0xfc33f000 0x1000>,
957 <0xfc336000 0x1000>;
958 reg-names = "etm-base","debug-base";
959 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]960
961 qcom,ipc-spinlock@fd484000 {
962 compatible = "qcom,ipc-spinlock-sfpb";
963 reg = <0xfd484000 0x400>;
964 qcom,num-locks = <8>;
965 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]966
967 qcom,qseecom@d980000 {
968 compatible = "qcom,qseecom";
969 reg = <0xd980000 0x256000>;
970 reg-names = "secapp-region";
971 qcom,disk-encrypt-pipe-pair = <2>;
972 qcom,hlos-ce-hw-instance = <0>;
973 qcom,qsee-ce-hw-instance = <0>;
974 qcom,msm-bus,name = "qseecom-noc";
975 qcom,msm-bus,num-cases = <4>;
976 qcom,msm-bus,active-only = <0>;
977 qcom,msm-bus,num-paths = <1>;
978 qcom,msm-bus,vectors-KBps =
979 <55 512 0 0>,
980 <55 512 3936000 393600>,
981 <55 512 3936000 393600>,
982 <55 512 3936000 393600>;
983 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]984
985 qcom,qcrypto@fd404000 {
986 compatible = "qcom,qcrypto";
987 reg = <0xfd400000 0x20000>,
988 <0xfd404000 0x8000>;
989 reg-names = "crypto-base","crypto-bam-base";
990 interrupts = <0 207 0>;
991 qcom,bam-pipe-pair = <2>;
992 qcom,ce-hw-instance = <0>;
993 qcom,ce-hw-shared;
994 qcom,msm-bus,name = "qcrypto-noc";
995 qcom,msm-bus,num-cases = <2>;
996 qcom,msm-bus,active-only = <0>;
997 qcom,msm-bus,num-paths = <1>;
998 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]999 <55 512 0 0>,
1000 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1001 };
1002
1003 qcom,qcedev@fd400000 {
1004 compatible = "qcom,qcedev";
1005 reg = <0xfd400000 0x20000>,
1006 <0xfd404000 0x8000>;
1007 reg-names = "crypto-base","crypto-bam-base";
1008 interrupts = <0 207 0>;
1009 qcom,bam-pipe-pair = <1>;
1010 qcom,ce-hw-instance = <0>;
1011 qcom,ce-hw-shared;
1012 qcom,msm-bus,name = "qcedev-noc";
1013 qcom,msm-bus,num-cases = <2>;
1014 qcom,msm-bus,active-only = <0>;
1015 qcom,msm-bus,num-paths = <1>;
1016 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1017 <55 512 0 0>,
1018 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1019 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1020
1021 cpu-pmu {
1022 compatible = "arm,cortex-a7-pmu";
1023 qcom,irq-is-percpu;
1024 interrupts = <1 7 0xf00>;
1025 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1026};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1027
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1028&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1029 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1030 status = "ok";
1031};
1032
1033&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1034 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1035 status = "ok";
1036};
1037
1038&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1039 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1040 status = "ok";
1041};
1042
1043&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1044 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1045 status = "ok";
1046};
1047
1048&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1049 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1050 status = "ok";
1051};
1052
1053&gdsc_usb_hsic {
1054 status = "ok";
1055};
1056
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1057/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1058/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1059/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1060
1061&pm8226_vadc {
1062 chan@0 {
1063 label = "usb_in";
1064 reg = <0>;
1065 qcom,decimation = <0>;
1066 qcom,pre-div-channel-scaling = <4>;
1067 qcom,calibration-type = "absolute";
1068 qcom,scale-function = <0>;
1069 qcom,hw-settle-time = <0>;
1070 qcom,fast-avg-setup = <0>;
1071 };
1072
1073 chan@2 {
1074 label = "vchg_sns";
1075 reg = <2>;
1076 qcom,decimation = <0>;
1077 qcom,pre-div-channel-scaling = <3>;
1078 qcom,calibration-type = "absolute";
1079 qcom,scale-function = <0>;
1080 qcom,hw-settle-time = <0>;
1081 qcom,fast-avg-setup = <0>;
1082 };
1083
1084 chan@5 {
1085 label = "vcoin";
1086 reg = <5>;
1087 qcom,decimation = <0>;
1088 qcom,pre-div-channel-scaling = <1>;
1089 qcom,calibration-type = "absolute";
1090 qcom,scale-function = <0>;
1091 qcom,hw-settle-time = <0>;
1092 qcom,fast-avg-setup = <0>;
1093 };
1094
1095 chan@6 {
1096 label = "vbat_sns";
1097 reg = <6>;
1098 qcom,decimation = <0>;
1099 qcom,pre-div-channel-scaling = <1>;
1100 qcom,calibration-type = "absolute";
1101 qcom,scale-function = <0>;
1102 qcom,hw-settle-time = <0>;
1103 qcom,fast-avg-setup = <0>;
1104 };
1105
1106 chan@7 {
1107 label = "vph_pwr";
1108 reg = <7>;
1109 qcom,decimation = <0>;
1110 qcom,pre-div-channel-scaling = <1>;
1111 qcom,calibration-type = "absolute";
1112 qcom,scale-function = <0>;
1113 qcom,hw-settle-time = <0>;
1114 qcom,fast-avg-setup = <0>;
1115 };
1116
1117 chan@30 {
1118 label = "batt_therm";
1119 reg = <0x30>;
1120 qcom,decimation = <0>;
1121 qcom,pre-div-channel-scaling = <0>;
1122 qcom,calibration-type = "ratiometric";
1123 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1124 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1125 qcom,fast-avg-setup = <0>;
1126 };
1127
1128 chan@31 {
1129 label = "batt_id";
1130 reg = <0x31>;
1131 qcom,decimation = <0>;
1132 qcom,pre-div-channel-scaling = <0>;
1133 qcom,calibration-type = "ratiometric";
1134 qcom,scale-function = <0>;
1135 qcom,hw-settle-time = <2>;
1136 qcom,fast-avg-setup = <0>;
1137 };
1138
1139 chan@b2 {
1140 label = "xo_therm_pu2";
1141 reg = <0xb2>;
1142 qcom,decimation = <0>;
1143 qcom,pre-div-channel-scaling = <0>;
1144 qcom,calibration-type = "ratiometric";
1145 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1146 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1147 qcom,fast-avg-setup = <0>;
1148 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1149
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1150 chan@39 {
1151 label = "usb_id_nopull";
1152 reg = <0x39>;
1153 qcom,decimation = <0>;
1154 qcom,pre-div-channel-scaling = <0>;
1155 qcom,calibration-type = "ratiometric";
1156 qcom,scale-function = <0>;
1157 qcom,hw-settle-time = <2>;
1158 qcom,fast-avg-setup = <0>;
1159 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1160};
1161
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1162&pm8226_adc_tm {
1163 /* Channel Node */
1164 chan@30 {
1165 label = "batt_therm";
1166 reg = <0x30>;
1167 qcom,decimation = <0>;
1168 qcom,pre-div-channel-scaling = <0>;
1169 qcom,calibration-type = "ratiometric";
1170 qcom,scale-function = <1>;
1171 qcom,hw-settle-time = <2>;
1172 qcom,fast-avg-setup = <3>;
1173 qcom,btm-channel-number = <0x48>;
1174 };
1175
1176 chan@8 {
1177 label = "die_temp";
1178 reg = <8>;
1179 qcom,decimation = <0>;
1180 qcom,pre-div-channel-scaling = <0>;
1181 qcom,calibration-type = "absolute";
1182 qcom,scale-function = <3>;
1183 qcom,hw-settle-time = <0>;
1184 qcom,fast-avg-setup = <3>;
1185 qcom,btm-channel-number = <0x68>;
1186 };
1187
1188 chan@6 {
1189 label = "vbat_sns";
1190 reg = <6>;
1191 qcom,decimation = <0>;
1192 qcom,pre-div-channel-scaling = <1>;
1193 qcom,calibration-type = "absolute";
1194 qcom,scale-function = <0>;
1195 qcom,hw-settle-time = <0>;
1196 qcom,fast-avg-setup = <3>;
1197 qcom,btm-channel-number = <0x70>;
1198 };
1199
1200 chan@14 {
1201 label = "pa_therm0";
1202 reg = <0x14>;
1203 qcom,decimation = <0>;
1204 qcom,pre-div-channel-scaling = <0>;
1205 qcom,calibration-type = "ratiometric";
1206 qcom,scale-function = <2>;
1207 qcom,hw-settle-time = <2>;
1208 qcom,fast-avg-setup = <0>;
1209 qcom,btm-channel-number = <0x78>;
1210 qcom,thermal-node;
1211 };
1212
1213 chan@17 {
1214 label = "pa_therm1";
1215 reg = <0x17>;
1216 qcom,decimation = <0>;
1217 qcom,pre-div-channel-scaling = <0>;
1218 qcom,calibration-type = "ratiometric";
1219 qcom,scale-function = <2>;
1220 qcom,hw-settle-time = <2>;
1221 qcom,fast-avg-setup = <0>;
1222 qcom,btm-channel-number = <0x80>;
1223 qcom,thermal-node;
1224 };
1225};
1226
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1227&pm8226_chg {
1228 status = "ok";
1229
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1230 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1231 status = "ok";
1232 };
1233
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1234 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1235 status = "ok";
1236 };
1237
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1238 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1239 status = "ok";
1240 };
1241
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1242 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1243 status = "ok";
1244 };
1245
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1246 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1247 status = "ok";
1248 };
1249
1250 qcom,chg-misc@1600 {
1251 status = "ok";
1252 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1253};