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Chris Zankel9a8fd552005-06-23 22:01:26 -07001/*
2 * include/asm-xtensa/elf.h
3 *
4 * ELF register definitions
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 */
12
13#ifndef _XTENSA_ELF_H
14#define _XTENSA_ELF_H
15
16#include <asm/ptrace.h>
Chris Zankel9a8fd552005-06-23 22:01:26 -070017
18/* Xtensa processor ELF architecture-magic number */
19
20#define EM_XTENSA 94
21#define EM_XTENSA_OLD 0xABC7
22
Chris Zankelff6fd462007-08-14 13:02:06 -070023/* Xtensa relocations defined by the ABIs */
24
25#define R_XTENSA_NONE 0
26#define R_XTENSA_32 1
27#define R_XTENSA_RTLD 2
28#define R_XTENSA_GLOB_DAT 3
29#define R_XTENSA_JMP_SLOT 4
30#define R_XTENSA_RELATIVE 5
31#define R_XTENSA_PLT 6
32#define R_XTENSA_OP0 8
33#define R_XTENSA_OP1 9
34#define R_XTENSA_OP2 10
35#define R_XTENSA_ASM_EXPAND 11
36#define R_XTENSA_ASM_SIMPLIFY 12
37#define R_XTENSA_GNU_VTINHERIT 15
38#define R_XTENSA_GNU_VTENTRY 16
39#define R_XTENSA_DIFF8 17
40#define R_XTENSA_DIFF16 18
41#define R_XTENSA_DIFF32 19
42#define R_XTENSA_SLOT0_OP 20
43#define R_XTENSA_SLOT1_OP 21
44#define R_XTENSA_SLOT2_OP 22
45#define R_XTENSA_SLOT3_OP 23
46#define R_XTENSA_SLOT4_OP 24
47#define R_XTENSA_SLOT5_OP 25
48#define R_XTENSA_SLOT6_OP 26
49#define R_XTENSA_SLOT7_OP 27
50#define R_XTENSA_SLOT8_OP 28
51#define R_XTENSA_SLOT9_OP 29
52#define R_XTENSA_SLOT10_OP 30
53#define R_XTENSA_SLOT11_OP 31
54#define R_XTENSA_SLOT12_OP 32
55#define R_XTENSA_SLOT13_OP 33
56#define R_XTENSA_SLOT14_OP 34
57#define R_XTENSA_SLOT0_ALT 35
58#define R_XTENSA_SLOT1_ALT 36
59#define R_XTENSA_SLOT2_ALT 37
60#define R_XTENSA_SLOT3_ALT 38
61#define R_XTENSA_SLOT4_ALT 39
62#define R_XTENSA_SLOT5_ALT 40
63#define R_XTENSA_SLOT6_ALT 41
64#define R_XTENSA_SLOT7_ALT 42
65#define R_XTENSA_SLOT8_ALT 43
66#define R_XTENSA_SLOT9_ALT 44
67#define R_XTENSA_SLOT10_ALT 45
68#define R_XTENSA_SLOT11_ALT 46
69#define R_XTENSA_SLOT12_ALT 47
70#define R_XTENSA_SLOT13_ALT 48
71#define R_XTENSA_SLOT14_ALT 49
72
Chris Zankel9a8fd552005-06-23 22:01:26 -070073/* ELF register definitions. This is needed for core dump support. */
74
75/*
76 * elf_gregset_t contains the application-level state in the following order:
77 * Processor info: config_version, cpuxy
78 * Processor state: pc, ps, exccause, excvaddr, wb, ws,
79 * lbeg, lend, lcount, sar
80 * GP regs: ar0 - arXX
81 */
82
83typedef unsigned long elf_greg_t;
84
85typedef struct {
86 elf_greg_t xchal_config_id0;
87 elf_greg_t xchal_config_id1;
88 elf_greg_t cpux;
89 elf_greg_t cpuy;
90 elf_greg_t pc;
91 elf_greg_t ps;
92 elf_greg_t exccause;
93 elf_greg_t excvaddr;
94 elf_greg_t windowbase;
95 elf_greg_t windowstart;
96 elf_greg_t lbeg;
97 elf_greg_t lend;
98 elf_greg_t lcount;
99 elf_greg_t sar;
100 elf_greg_t syscall;
Chris Zankel29c4dfd2007-05-31 17:49:32 -0700101 elf_greg_t ar[64];
Chris Zankel9a8fd552005-06-23 22:01:26 -0700102} xtensa_gregset_t;
103
104#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
105
106typedef elf_greg_t elf_gregset_t[ELF_NGREG];
107
108/*
109 * Compute the size of the coprocessor and extra state layout (register info)
110 * table (in bytes).
111 * This is actually the maximum size of the table, as opposed to the size,
112 * which is available from the _xtensa_reginfo_table_size global variable.
113 *
114 * (See also arch/xtensa/kernel/coprocessor.S)
115 *
116 */
117
118#ifndef XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM
119# define XTENSA_CPE_LTABLE_SIZE 0
120#else
121# define XTENSA_CPE_SEGMENT(num) (num ? (1+num) : 0)
122# define XTENSA_CPE_LTABLE_ENTRIES \
123 ( XTENSA_CPE_SEGMENT(XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM) \
124 + XTENSA_CPE_SEGMENT(XCHAL_CP0_SA_CONTENTS_LIBDB_NUM) \
125 + XTENSA_CPE_SEGMENT(XCHAL_CP1_SA_CONTENTS_LIBDB_NUM) \
126 + XTENSA_CPE_SEGMENT(XCHAL_CP2_SA_CONTENTS_LIBDB_NUM) \
127 + XTENSA_CPE_SEGMENT(XCHAL_CP3_SA_CONTENTS_LIBDB_NUM) \
128 + XTENSA_CPE_SEGMENT(XCHAL_CP4_SA_CONTENTS_LIBDB_NUM) \
129 + XTENSA_CPE_SEGMENT(XCHAL_CP5_SA_CONTENTS_LIBDB_NUM) \
130 + XTENSA_CPE_SEGMENT(XCHAL_CP6_SA_CONTENTS_LIBDB_NUM) \
131 + XTENSA_CPE_SEGMENT(XCHAL_CP7_SA_CONTENTS_LIBDB_NUM) \
132 + 1 /* final entry */ \
133 )
134# define XTENSA_CPE_LTABLE_SIZE (XTENSA_CPE_LTABLE_ENTRIES * 8)
135#endif
136
137
138/*
139 * Instantiations of the elf_fpregset_t type contain, in most
140 * architectures, the floating point (FPU) register set.
141 * For Xtensa, this type is extended to contain all custom state,
142 * ie. coprocessor and "extra" (non-coprocessor) state (including,
143 * for example, TIE-defined states and register files; as well
144 * as other optional processor state).
145 * This includes FPU state if a floating-point coprocessor happens
146 * to have been configured within the Xtensa processor.
147 *
148 * TOTAL_FPREGS_SIZE is the required size (without rounding)
149 * of elf_fpregset_t. It provides space for the following:
150 *
151 * a) 32-bit mask of active coprocessors for this task (similar
152 * to CPENABLE in single-threaded Xtensa processor systems)
153 *
154 * b) table describing the layout of custom states (ie. of
155 * individual registers, etc) within the save areas
156 *
157 * c) save areas for each coprocessor and for non-coprocessor
158 * ("extra") state
159 *
160 * Note that save areas may require up to 16-byte alignment when
161 * accessed by save/restore sequences. We do not need to ensure
162 * such alignment in an elf_fpregset_t structure because custom
163 * state is not directly loaded/stored into it; rather, save area
164 * contents are copied to elf_fpregset_t from the active save areas
165 * (see 'struct task_struct' definition in processor.h for that)
166 * using memcpy(). But we do allow space for such alignment,
167 * to allow optimizations of layout and copying.
168 */
Chris Zankel173d6682006-12-10 02:18:48 -0800169#if 0
Chris Zankel9a8fd552005-06-23 22:01:26 -0700170#define TOTAL_FPREGS_SIZE \
171 (4 + XTENSA_CPE_LTABLE_SIZE + XTENSA_CP_EXTRA_SIZE)
172#define ELF_NFPREG \
173 ((TOTAL_FPREGS_SIZE + sizeof(elf_fpreg_t) - 1) / sizeof(elf_fpreg_t))
Chris Zankel173d6682006-12-10 02:18:48 -0800174#else
175#define TOTAL_FPREGS_SIZE 0
176#define ELF_NFPREG 0
177#endif
Chris Zankel9a8fd552005-06-23 22:01:26 -0700178
179typedef unsigned int elf_fpreg_t;
180typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
181
182#define ELF_CORE_COPY_REGS(_eregs, _pregs) \
183 xtensa_elf_core_copy_regs (&_eregs, _pregs);
184
185extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
186
187/*
188 * This is used to ensure we don't load something for the wrong architecture.
189 */
190
191#define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) || \
192 ( (x)->e_machine == EM_XTENSA_OLD ) )
193
194/*
195 * These are used to set parameters in the core dumps.
196 */
197
198#ifdef __XTENSA_EL__
199# define ELF_DATA ELFDATA2LSB
200#elif defined(__XTENSA_EB__)
201# define ELF_DATA ELFDATA2MSB
202#else
203# error processor byte order undefined!
204#endif
205
206#define ELF_CLASS ELFCLASS32
207#define ELF_ARCH EM_XTENSA
208
209#define USE_ELF_CORE_DUMP
210#define ELF_EXEC_PAGESIZE PAGE_SIZE
211
212/*
213 * This is the location that an ET_DYN program is loaded if exec'ed. Typical
214 * use of this is to invoke "./ld.so someprog" to test out a new version of
215 * the loader. We need to make sure that it is out of the way of the program
216 * that it will "exec", and that there is sufficient room for the brk.
217 */
218
219#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
220
221/*
222 * This yields a mask that user programs can use to figure out what
223 * instruction set this CPU supports. This could be done in user space,
224 * but it's not easy, and we've already done it here.
225 */
226
227#define ELF_HWCAP (0)
228
229/*
230 * This yields a string that ld.so will use to load implementation
231 * specific libraries for optimization. This is more specific in
232 * intent than poking at uname or /proc/cpuinfo.
233 * For the moment, we have only optimizations for the Intel generations,
234 * but that could change...
235 */
236
237#define ELF_PLATFORM (NULL)
238
239/*
240 * The Xtensa processor ABI says that when the program starts, a2
241 * contains a pointer to a function which might be registered using
242 * `atexit'. This provides a mean for the dynamic linker to call
243 * DT_FINI functions for shared libraries that have been loaded before
244 * the code runs.
245 *
246 * A value of 0 tells we have no such handler.
247 *
248 * We might as well make sure everything else is cleared too (except
249 * for the stack pointer in a1), just to make things more
250 * deterministic. Also, clearing a0 terminates debugger backtraces.
251 */
252
253#define ELF_PLAT_INIT(_r, load_addr) \
254 do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
255 _r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
256 _r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
257 _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
258 } while (0)
259
260#ifdef __KERNEL__
261
262#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
263
Tim Schmielau8c65b4a2005-11-07 00:59:43 -0800264struct task_struct;
265
Chris Zankel9a8fd552005-06-23 22:01:26 -0700266extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*,
267 struct task_struct*);
268extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*,
269 struct task_struct*);
270extern void do_save_fpregs (elf_fpregset_t*, struct pt_regs*,
271 struct task_struct*);
272extern int do_restore_fpregs (elf_fpregset_t*, struct pt_regs*,
273 struct task_struct*);
274
275#endif /* __KERNEL__ */
276#endif /* _XTENSA_ELF_H */