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Karthikeyan Ramasubramanian7069c482012-03-22 09:21:20 -06001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef _ARCH_ARM_MACH_MSM_SMSM_H_
14#define _ARCH_ARM_MACH_MSM_SMSM_H_
15
Karthikeyan Ramasubramanian7069c482012-03-22 09:21:20 -060016#include <linux/notifier.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070017#if defined(CONFIG_MSM_N_WAY_SMSM)
18enum {
19 SMSM_APPS_STATE,
20 SMSM_MODEM_STATE,
21 SMSM_Q6_STATE,
22 SMSM_APPS_DEM,
23 SMSM_WCNSS_STATE = SMSM_APPS_DEM,
24 SMSM_MODEM_DEM,
Jeff Hugo6a8057c2011-08-16 13:47:12 -060025 SMSM_DSPS_STATE = SMSM_MODEM_DEM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026 SMSM_Q6_DEM,
27 SMSM_POWER_MASTER_DEM,
28 SMSM_TIME_MASTER_DEM,
29};
30extern uint32_t SMSM_NUM_ENTRIES;
31#else
32enum {
33 SMSM_APPS_STATE = 1,
34 SMSM_MODEM_STATE = 3,
35 SMSM_NUM_ENTRIES,
36};
37#endif
38
39enum {
40 SMSM_APPS,
41 SMSM_MODEM,
42 SMSM_Q6,
43 SMSM_WCNSS,
44 SMSM_DSPS,
45};
46extern uint32_t SMSM_NUM_HOSTS;
47
48#define SMSM_INIT 0x00000001
49#define SMSM_OSENTERED 0x00000002
50#define SMSM_SMDWAIT 0x00000004
51#define SMSM_SMDINIT 0x00000008
52#define SMSM_RPCWAIT 0x00000010
53#define SMSM_RPCINIT 0x00000020
54#define SMSM_RESET 0x00000040
55#define SMSM_RSA 0x00000080
56#define SMSM_RUN 0x00000100
57#define SMSM_PWRC 0x00000200
58#define SMSM_TIMEWAIT 0x00000400
59#define SMSM_TIMEINIT 0x00000800
Eric Holmberg8cb30f52012-10-04 13:37:57 -060060#define SMSM_PROC_AWAKE 0x00001000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061#define SMSM_WFPI 0x00002000
62#define SMSM_SLEEP 0x00004000
63#define SMSM_SLEEPEXIT 0x00008000
64#define SMSM_OEMSBL_RELEASE 0x00010000
65#define SMSM_APPS_REBOOT 0x00020000
66#define SMSM_SYSTEM_POWER_DOWN 0x00040000
67#define SMSM_SYSTEM_REBOOT 0x00080000
68#define SMSM_SYSTEM_DOWNLOAD 0x00100000
69#define SMSM_PWRC_SUSPEND 0x00200000
70#define SMSM_APPS_SHUTDOWN 0x00400000
71#define SMSM_SMD_LOOPBACK 0x00800000
72#define SMSM_RUN_QUIET 0x01000000
73#define SMSM_MODEM_WAIT 0x02000000
74#define SMSM_MODEM_BREAK 0x04000000
75#define SMSM_MODEM_CONTINUE 0x08000000
76#define SMSM_SYSTEM_REBOOT_USR 0x20000000
77#define SMSM_SYSTEM_PWRDWN_USR 0x40000000
78#define SMSM_UNKNOWN 0x80000000
79
80#define SMSM_WKUP_REASON_RPC 0x00000001
81#define SMSM_WKUP_REASON_INT 0x00000002
82#define SMSM_WKUP_REASON_GPIO 0x00000004
83#define SMSM_WKUP_REASON_TIMER 0x00000008
84#define SMSM_WKUP_REASON_ALARM 0x00000010
85#define SMSM_WKUP_REASON_RESET 0x00000020
Angshuman Sarkar302dddf2011-11-08 19:48:45 +053086#define SMSM_A2_FORCE_SHUTDOWN 0x00002000
87#define SMSM_A2_RESET_BAM 0x00004000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088
Eric Holmberg7ab6a9c2011-07-22 17:16:34 -060089#define SMSM_VENDOR 0x00020000
90
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070091#define SMSM_A2_POWER_CONTROL 0x00000002
Angshuman Sarkar402014d2011-08-12 15:29:31 +053092#define SMSM_A2_POWER_CONTROL_ACK 0x00000800
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093
94#define SMSM_WLAN_TX_RINGS_EMPTY 0x00000200
95#define SMSM_WLAN_TX_ENABLE 0x00000400
96
Jeff Hugo21433322012-05-15 11:35:32 -060097#define SMSM_SUBSYS2AP_STATUS 0x00008000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070098
Steve Mucklef132c6c2012-06-06 18:30:57 -070099#ifdef CONFIG_MSM_SMD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700100void *smem_alloc(unsigned id, unsigned size);
Steve Mucklef132c6c2012-06-06 18:30:57 -0700101#else
102void *smem_alloc(unsigned id, unsigned size)
103{
104 return NULL;
105}
106#endif
Angshuman Sarkar4eade0d2011-08-17 14:06:23 +0530107void *smem_alloc2(unsigned id, unsigned size_in);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108void *smem_get_entry(unsigned id, unsigned *size);
109int smsm_change_state(uint32_t smsm_entry,
110 uint32_t clear_mask, uint32_t set_mask);
Eric Holmberge8a39322012-04-03 15:14:02 -0600111
112/*
113 * Changes the global interrupt mask. The set and clear masks are re-applied
114 * every time the global interrupt mask is updated for callback registration
115 * and de-registration.
116 *
117 * The clear mask is applied first, so if a bit is set to 1 in both the clear
118 * mask and the set mask, the result will be that the interrupt is set.
119 *
120 * @smsm_entry SMSM entry to change
121 * @clear_mask 1 = clear bit, 0 = no-op
122 * @set_mask 1 = set bit, 0 = no-op
123 *
124 * @returns 0 for success, < 0 for error
125 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700126int smsm_change_intr_mask(uint32_t smsm_entry,
127 uint32_t clear_mask, uint32_t set_mask);
128int smsm_get_intr_mask(uint32_t smsm_entry, uint32_t *intr_mask);
129uint32_t smsm_get_state(uint32_t smsm_entry);
130int smsm_state_cb_register(uint32_t smsm_entry, uint32_t mask,
131 void (*notify)(void *, uint32_t old_state, uint32_t new_state),
132 void *data);
133int smsm_state_cb_deregister(uint32_t smsm_entry, uint32_t mask,
134 void (*notify)(void *, uint32_t, uint32_t), void *data);
135void smsm_print_sleep_info(uint32_t sleep_delay, uint32_t sleep_limit,
136 uint32_t irq_mask, uint32_t wakeup_reason, uint32_t pending_irqs);
137void smsm_reset_modem(unsigned mode);
138void smsm_reset_modem_cont(void);
139void smd_sleep_exit(void);
140
141#define SMEM_NUM_SMD_STREAM_CHANNELS 64
142#define SMEM_NUM_SMD_BLOCK_CHANNELS 64
143
144enum {
145 /* fixed items */
146 SMEM_PROC_COMM = 0,
147 SMEM_HEAP_INFO,
148 SMEM_ALLOCATION_TABLE,
149 SMEM_VERSION_INFO,
150 SMEM_HW_RESET_DETECT,
151 SMEM_AARM_WARM_BOOT,
152 SMEM_DIAG_ERR_MESSAGE,
153 SMEM_SPINLOCK_ARRAY,
154 SMEM_MEMORY_BARRIER_LOCATION,
155 SMEM_FIXED_ITEM_LAST = SMEM_MEMORY_BARRIER_LOCATION,
156
157 /* dynamic items */
158 SMEM_AARM_PARTITION_TABLE,
159 SMEM_AARM_BAD_BLOCK_TABLE,
160 SMEM_RESERVE_BAD_BLOCKS,
161 SMEM_WM_UUID,
162 SMEM_CHANNEL_ALLOC_TBL,
163 SMEM_SMD_BASE_ID,
164 SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_STREAM_CHANNELS,
165 SMEM_SMEM_LOG_EVENTS,
166 SMEM_SMEM_STATIC_LOG_IDX,
167 SMEM_SMEM_STATIC_LOG_EVENTS,
168 SMEM_SMEM_SLOW_CLOCK_SYNC,
169 SMEM_SMEM_SLOW_CLOCK_VALUE,
170 SMEM_BIO_LED_BUF,
171 SMEM_SMSM_SHARED_STATE,
172 SMEM_SMSM_INT_INFO,
173 SMEM_SMSM_SLEEP_DELAY,
174 SMEM_SMSM_LIMIT_SLEEP,
175 SMEM_SLEEP_POWER_COLLAPSE_DISABLED,
176 SMEM_KEYPAD_KEYS_PRESSED,
177 SMEM_KEYPAD_STATE_UPDATED,
178 SMEM_KEYPAD_STATE_IDX,
179 SMEM_GPIO_INT,
180 SMEM_MDDI_LCD_IDX,
181 SMEM_MDDI_HOST_DRIVER_STATE,
182 SMEM_MDDI_LCD_DISP_STATE,
183 SMEM_LCD_CUR_PANEL,
184 SMEM_MARM_BOOT_SEGMENT_INFO,
185 SMEM_AARM_BOOT_SEGMENT_INFO,
186 SMEM_SLEEP_STATIC,
187 SMEM_SCORPION_FREQUENCY,
188 SMEM_SMD_PROFILES,
189 SMEM_TSSC_BUSY,
190 SMEM_HS_SUSPEND_FILTER_INFO,
191 SMEM_BATT_INFO,
192 SMEM_APPS_BOOT_MODE,
193 SMEM_VERSION_FIRST,
194 SMEM_VERSION_SMD = SMEM_VERSION_FIRST,
195 SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24,
196 SMEM_OSS_RRCASN1_BUF1,
197 SMEM_OSS_RRCASN1_BUF2,
198 SMEM_ID_VENDOR0,
199 SMEM_ID_VENDOR1,
200 SMEM_ID_VENDOR2,
201 SMEM_HW_SW_BUILD_ID,
202 SMEM_SMD_BLOCK_PORT_BASE_ID,
203 SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID +
204 SMEM_NUM_SMD_BLOCK_CHANNELS,
205 SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP +
206 SMEM_NUM_SMD_BLOCK_CHANNELS,
207 SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP +
208 SMEM_NUM_SMD_BLOCK_CHANNELS,
209 SMEM_SCLK_CONVERSION,
210 SMEM_SMD_SMSM_INTR_MUX,
211 SMEM_SMSM_CPU_INTR_MASK,
212 SMEM_APPS_DEM_SLAVE_DATA,
213 SMEM_QDSP6_DEM_SLAVE_DATA,
214 SMEM_CLKREGIM_BSP,
215 SMEM_CLKREGIM_SOURCES,
216 SMEM_SMD_FIFO_BASE_ID,
217 SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID +
218 SMEM_NUM_SMD_STREAM_CHANNELS,
219 SMEM_POWER_ON_STATUS_INFO,
220 SMEM_DAL_AREA,
221 SMEM_SMEM_LOG_POWER_IDX,
222 SMEM_SMEM_LOG_POWER_WRAP,
223 SMEM_SMEM_LOG_POWER_EVENTS,
224 SMEM_ERR_CRASH_LOG,
225 SMEM_ERR_F3_TRACE_LOG,
226 SMEM_SMD_BRIDGE_ALLOC_TABLE,
227 SMEM_SMDLITE_TABLE,
228 SMEM_SD_IMG_UPGRADE_STATUS,
229 SMEM_SEFS_INFO,
230 SMEM_RESET_LOG,
231 SMEM_RESET_LOG_SYMBOLS,
232 SMEM_MODEM_SW_BUILD_ID,
233 SMEM_SMEM_LOG_MPROC_WRAP,
234 SMEM_BOOT_INFO_FOR_APPS,
235 SMEM_SMSM_SIZE_INFO,
Angshuman Sarkar2b4d90d2011-11-09 20:58:57 +0530236 SMEM_SMD_LOOPBACK_REGISTER,
237 SMEM_SSR_REASON_MSS0,
238 SMEM_SSR_REASON_WCNSS0,
239 SMEM_SSR_REASON_LPASS0,
240 SMEM_SSR_REASON_DSPS0,
241 SMEM_SSR_REASON_VCODEC0,
242 SMEM_MEM_LAST = SMEM_SSR_REASON_VCODEC0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700243 SMEM_NUM_ITEMS,
244};
245
246enum {
247 SMEM_APPS_Q6_SMSM = 3,
248 SMEM_Q6_APPS_SMSM = 5,
249 SMSM_NUM_INTR_MUX = 8,
250};
251
252int smsm_check_for_modem_crash(void);
253void *smem_find(unsigned id, unsigned size);
254void *smem_get_entry(unsigned id, unsigned *size);
255
256#endif