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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * PMC551 PCI Mezzanine Ram Device
3 *
4 * Author:
5 * Mark Ferrell
6 * Copyright 1999,2000 Nortel Networks
7 *
Thomas Gleixner61ecfa82005-11-07 11:15:31 +00008 * License:
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 * As part of this driver was derrived from the slram.c driver it falls
10 * under the same license, which is GNU General Public License v2
11 */
12
13#ifndef __MTD_PMC551_H__
14#define __MTD_PMC551_H__
15
16#include <linux/mtd/mtd.h>
17
Adrian Bunk59018b62008-05-20 01:03:52 +030018#define PMC551_VERSION \
Linus Torvalds1da177e2005-04-16 15:20:36 -070019 "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
20
21/*
22 * Our personal and private information
23 */
24struct mypriv {
25 struct pci_dev *dev;
26 u_char *start;
27 u32 base_map0;
28 u32 curr_map0;
29 u32 asize;
30 struct mtd_info *nextpmc551;
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000031};
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
33/*
34 * Function Prototypes
35 */
36static int pmc551_erase(struct mtd_info *, struct erase_info *);
Jared Hulberta98889f2008-04-29 23:26:49 -070037static void pmc551_unpoint(struct mtd_info *, loff_t, size_t);
38static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
39 size_t *retlen, void **virt, resource_size_t *phys);
Linus Torvalds1da177e2005-04-16 15:20:36 -070040static int pmc551_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *);
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000041static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
43
44/*
45 * Define the PCI ID's if the kernel doesn't define them for us
46 */
47#ifndef PCI_VENDOR_ID_V3_SEMI
48#define PCI_VENDOR_ID_V3_SEMI 0x11b0
49#endif
50
51#ifndef PCI_DEVICE_ID_V3_SEMI_V370PDC
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000052#define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#endif
54
55
56#define PMC551_PCI_MEM_MAP0 0x50
57#define PMC551_PCI_MEM_MAP1 0x54
58#define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
59#define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
60#define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
61#define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
62
63#define PMC551_SDRAM_MA 0x60
64#define PMC551_SDRAM_CMD 0x62
65#define PMC551_DRAM_CFG 0x64
66#define PMC551_SYS_CTRL_REG 0x78
67
68#define PMC551_DRAM_BLK0 0x68
69#define PMC551_DRAM_BLK1 0x6c
70#define PMC551_DRAM_BLK2 0x70
71#define PMC551_DRAM_BLK3 0x74
72#define PMC551_DRAM_BLK_GET_SIZE(x) (524288<<((x>>4)&0x0f))
73#define PMC551_DRAM_BLK_SET_COL_MUX(x,v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
74#define PMC551_DRAM_BLK_SET_ROW_MUX(x,v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
75
76
77#endif /* __MTD_PMC551_H__ */
78