blob: 02563f9c0609b4bddda3488bc254b89e0631308c [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053059#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#define FM_GPIO 83
61
62enum {
63 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
64 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
65 /* SURF expander */
66 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
67 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
68 GPIO_WLAN_EXT_POR_N,
69 GPIO_DISPLAY_PWR_EN,
70 GPIO_BACKLIGHT_EN,
71 GPIO_PRESSURE_XCLR,
72 GPIO_VREG_S3_EXP,
73 GPIO_UBM2M_PWRDWN,
74 GPIO_ETM_MODE_CS_N,
75 GPIO_HOST_VBUS_EN,
76 GPIO_SPI_MOSI,
77 GPIO_SPI_MISO,
78 GPIO_SPI_CLK,
79 GPIO_SPI_CS0_N,
80 GPIO_CORE_EXPANDER_IO13,
81 GPIO_CORE_EXPANDER_IO14,
82 GPIO_CORE_EXPANDER_IO15,
83 /* Camera expander */
84 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
85 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
86 GPIO_CAM_GP_AFBUSY,
87 GPIO_CAM_GP_CAM_PWDN,
88 GPIO_CAM_GP_CAM1MP_XCLR,
89 GPIO_CAM_GP_CAMIF_RESET_N,
90 GPIO_CAM_GP_STROBE_CE,
91 GPIO_CAM_GP_LED_EN1,
92 GPIO_CAM_GP_LED_EN2,
93};
94
95#if defined(CONFIG_GPIO_SX150X)
96enum {
97 SX150X_CORE,
98 SX150X_CAM,
99};
100
101static struct sx150x_platform_data sx150x_data[] __initdata = {
102 [SX150X_CORE] = {
103 .gpio_base = GPIO_CORE_EXPANDER_BASE,
104 .oscio_is_gpo = false,
105 .io_pullup_ena = 0,
106 .io_pulldn_ena = 0,
107 .io_open_drain_ena = 0xfef8,
108 .irq_summary = -1,
109 },
110 [SX150X_CAM] = {
111 .gpio_base = GPIO_CAM_EXPANDER_BASE,
112 .oscio_is_gpo = false,
113 .io_pullup_ena = 0,
114 .io_pulldn_ena = 0,
115 .io_open_drain_ena = 0x23,
116 .irq_summary = -1,
117 },
118};
119#endif
120
121#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
122
123 /* FM Platform power and shutdown routines */
124#define FPGA_MSM_CNTRL_REG2 0x90008010
125static void config_pcm_i2s_mode(int mode)
126{
127 void __iomem *cfg_ptr;
128 u8 reg2;
129
130 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
131
132 if (!cfg_ptr)
133 return;
134 if (mode) {
135 /*enable the pcm mode in FPGA*/
136 reg2 = readb_relaxed(cfg_ptr);
137 if (reg2 == 0) {
138 reg2 = 1;
139 writeb_relaxed(reg2, cfg_ptr);
140 }
141 } else {
142 /*enable i2s mode in FPGA*/
143 reg2 = readb_relaxed(cfg_ptr);
144 if (reg2 == 1) {
145 reg2 = 0;
146 writeb_relaxed(reg2, cfg_ptr);
147 }
148 }
149 iounmap(cfg_ptr);
150}
151
152static unsigned fm_i2s_config_power_on[] = {
153 /*FM_I2S_SD*/
154 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
155 /*FM_I2S_WS*/
156 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_SCK*/
158 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159};
160
161static unsigned fm_i2s_config_power_off[] = {
162 /*FM_I2S_SD*/
163 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
164 /*FM_I2S_WS*/
165 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_SCK*/
167 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168};
169
170static unsigned bt_config_power_on[] = {
171 /*RFR*/
172 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
173 /*CTS*/
174 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*RX*/
176 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*TX*/
178 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179};
180static unsigned bt_config_pcm_on[] = {
181 /*PCM_DOUT*/
182 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
183 /*PCM_DIN*/
184 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_SYNC*/
186 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_CLK*/
188 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189};
190static unsigned bt_config_power_off[] = {
191 /*RFR*/
192 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
193 /*CTS*/
194 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*RX*/
196 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*TX*/
198 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199};
200static unsigned bt_config_pcm_off[] = {
201 /*PCM_DOUT*/
202 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
203 /*PCM_DIN*/
204 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_SYNC*/
206 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_CLK*/
208 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209};
210
211static int config_i2s(int mode)
212{
213 int pin, rc = 0;
214
215 if (mode == FM_I2S_ON) {
216 if (machine_is_msm7x27a_surf())
217 config_pcm_i2s_mode(0);
218 pr_err("%s mode = FM_I2S_ON", __func__);
219 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
220 pin++) {
221 rc = gpio_tlmm_config(
222 fm_i2s_config_power_on[pin],
223 GPIO_CFG_ENABLE
224 );
225 if (rc < 0)
226 return rc;
227 }
228 } else if (mode == FM_I2S_OFF) {
229 pr_err("%s mode = FM_I2S_OFF", __func__);
230 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
231 pin++) {
232 rc = gpio_tlmm_config(
233 fm_i2s_config_power_off[pin],
234 GPIO_CFG_ENABLE
235 );
236 if (rc < 0)
237 return rc;
238 }
239 }
240 return rc;
241}
242static int config_pcm(int mode)
243{
244 int pin, rc = 0;
245
246 if (mode == BT_PCM_ON) {
247 if (machine_is_msm7x27a_surf())
248 config_pcm_i2s_mode(1);
249 pr_err("%s mode =BT_PCM_ON", __func__);
250 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
251 pin++) {
252 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
253 GPIO_CFG_ENABLE);
254 if (rc < 0)
255 return rc;
256 }
257 } else if (mode == BT_PCM_OFF) {
258 pr_err("%s mode =BT_PCM_OFF", __func__);
259 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
260 pin++) {
261 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
262 GPIO_CFG_ENABLE);
263 if (rc < 0)
264 return rc;
265 }
266
267 }
268
269 return rc;
270}
271
272static int msm_bahama_setup_pcm_i2s(int mode)
273{
274 int fm_state = 0, bt_state = 0;
275 int rc = 0;
276 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
277
278 fm_state = marimba_get_fm_status(&config);
279 bt_state = marimba_get_bt_status(&config);
280
281 switch (mode) {
282 case BT_PCM_ON:
283 case BT_PCM_OFF:
284 if (!fm_state)
285 rc = config_pcm(mode);
286 break;
287 case FM_I2S_ON:
288 rc = config_i2s(mode);
289 break;
290 case FM_I2S_OFF:
291 if (bt_state)
292 rc = config_pcm(BT_PCM_ON);
293 else
294 rc = config_i2s(mode);
295 break;
296 default:
297 rc = -EIO;
298 pr_err("%s:Unsupported mode", __func__);
299 }
300 return rc;
301}
302
Rahul Kashyap181d5552011-07-07 10:39:23 +0530303static int bt_set_gpio(int on)
304{
305 int rc = 0;
306 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
307
308 if (on) {
309 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
310 msleep(100);
311 } else {
312 if (!marimba_get_fm_status(&config) &&
313 !marimba_get_bt_status(&config)) {
314 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
315 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
316 msleep(100);
317 }
318 }
319 if (rc)
320 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
321
322 return rc;
323}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324static struct vreg *fm_regulator;
325static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
326{
327 int rc = 0;
328 const char *id = "FMPW";
329 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530330 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
331 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700332
333 /* Voting for 1.8V Regulator */
334 fm_regulator = vreg_get(NULL , "msme1");
335 if (IS_ERR(fm_regulator)) {
336 pr_err("%s: vreg get failed with : (%ld)\n",
337 __func__, PTR_ERR(fm_regulator));
338 return -EINVAL;
339 }
340
341 /* Set the voltage level to 1.8V */
342 rc = vreg_set_level(fm_regulator, 1800);
343 if (rc < 0) {
344 pr_err("%s: set regulator level failed with :(%d)\n",
345 __func__, rc);
346 goto fm_vreg_fail;
347 }
348
349 /* Enabling the 1.8V regulator */
350 rc = vreg_enable(fm_regulator);
351 if (rc) {
352 pr_err("%s: enable regulator failed with :(%d)\n",
353 __func__, rc);
354 goto fm_vreg_fail;
355 }
356
357 /* Voting for 19.2MHz clock */
358 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
359 PMAPP_CLOCK_VOTE_ON);
360 if (rc < 0) {
361 pr_err("%s: clock vote failed with :(%d)\n",
362 __func__, rc);
363 goto fm_clock_vote_fail;
364 }
365
Rahul Kashyap181d5552011-07-07 10:39:23 +0530366 rc = bt_set_gpio(1);
367 if (rc) {
368 pr_err("%s: bt_set_gpio = %d", __func__, rc);
369 goto fm_gpio_config_fail;
370 }
371 /*re-write FM Slave Id, after reset*/
372 value = BAHAMA_SLAVE_ID_FM_ADDR;
373 rc = marimba_write_bit_mask(&config,
374 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
375 if (rc < 0) {
376 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
377 goto fm_gpio_config_fail;
378 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700379 /* Configuring the FM GPIO */
380 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
381 GPIO_CFG_2MA);
382
383 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
384 if (rc) {
385 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
386 __func__, irqcfg, rc);
387 goto fm_gpio_config_fail;
388 }
389
390 return 0;
391
392fm_gpio_config_fail:
393 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
394 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530395 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700396fm_clock_vote_fail:
397 vreg_disable(fm_regulator);
398
399fm_vreg_fail:
400 vreg_put(fm_regulator);
401
402 return rc;
403};
404
405static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
406{
407 int rc;
408 const char *id = "FMPW";
409
410 /* Releasing the GPIO line used by FM */
411 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
412 GPIO_CFG_2MA);
413
414 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
415 if (rc)
416 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
417 __func__, irqcfg, rc);
418
419 /* Releasing the 1.8V Regulator */
420 if (fm_regulator != NULL) {
421 rc = vreg_disable(fm_regulator);
422
423 if (rc)
424 pr_err("%s: disable regulator failed:(%d)\n",
425 __func__, rc);
426 fm_regulator = NULL;
427 }
428
429 /* Voting off the clock */
430 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
431 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700432 if (rc < 0)
433 pr_err("%s: voting off failed with :(%d)\n",
434 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530435 rc = bt_set_gpio(0);
436 if (rc)
437 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438}
439
440static struct marimba_fm_platform_data marimba_fm_pdata = {
441 .fm_setup = fm_radio_setup,
442 .fm_shutdown = fm_radio_shutdown,
443 .irq = MSM_GPIO_TO_INT(FM_GPIO),
444 .vreg_s2 = NULL,
445 .vreg_xo_out = NULL,
446 /* Configuring the FM SoC as I2S Master */
447 .is_fm_soc_i2s_master = true,
448 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
449};
450
451static struct platform_device msm_bt_power_device = {
452 .name = "bt_power",
453};
454 struct bahama_config_register {
455 u8 reg;
456 u8 value;
457 u8 mask;
458 };
459static const char * const vregs_bahama_name[] = {
460 "msme1",
461 "bt",
462};
463static struct vreg *vregs_bahama[ARRAY_SIZE(vregs_bahama_name)];
464
465static int bahama_bt(int on)
466{
467
468 int rc = 0;
469 int i;
470
471 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
472
473 struct bahama_variant_register {
474 const size_t size;
475 const struct bahama_config_register *set;
476 };
477
478 const struct bahama_config_register *p;
479
480 u8 version;
481
482 const struct bahama_config_register v10_bt_on[] = {
483 { 0xE9, 0x00, 0xFF },
484 { 0xF4, 0x80, 0xFF },
485 { 0xE4, 0x00, 0xFF },
486 { 0xE5, 0x00, 0x0F },
487#ifdef CONFIG_WLAN
488 { 0xE6, 0x38, 0x7F },
489 { 0xE7, 0x06, 0xFF },
490#endif
491 { 0xE9, 0x21, 0xFF },
492 { 0x01, 0x0C, 0x1F },
493 { 0x01, 0x08, 0x1F },
494 };
495
496 const struct bahama_config_register v20_bt_on_fm_off[] = {
497 { 0x11, 0x0C, 0xFF },
498 { 0x13, 0x01, 0xFF },
499 { 0xF4, 0x80, 0xFF },
500 { 0xF0, 0x00, 0xFF },
501 { 0xE9, 0x00, 0xFF },
502#ifdef CONFIG_WLAN
503 { 0x81, 0x00, 0x7F },
504 { 0x82, 0x00, 0xFF },
505 { 0xE6, 0x38, 0x7F },
506 { 0xE7, 0x06, 0xFF },
507#endif
508 { 0x8E, 0x15, 0xFF },
509 { 0x8F, 0x15, 0xFF },
510 { 0x90, 0x15, 0xFF },
511
512 { 0xE9, 0x21, 0xFF },
513 };
514
515 const struct bahama_config_register v20_bt_on_fm_on[] = {
516 { 0x11, 0x0C, 0xFF },
517 { 0x13, 0x01, 0xFF },
518 { 0xF4, 0x86, 0xFF },
519 { 0xF0, 0x06, 0xFF },
520 { 0xE9, 0x00, 0xFF },
521#ifdef CONFIG_WLAN
522 { 0x81, 0x00, 0x7F },
523 { 0x82, 0x00, 0xFF },
524 { 0xE6, 0x38, 0x7F },
525 { 0xE7, 0x06, 0xFF },
526#endif
527 { 0xE9, 0x21, 0xFF },
528 };
529
530 const struct bahama_config_register v10_bt_off[] = {
531 { 0xE9, 0x00, 0xFF },
532 };
533
534 const struct bahama_config_register v20_bt_off_fm_off[] = {
535 { 0xF4, 0x84, 0xFF },
536 { 0xF0, 0x04, 0xFF },
537 { 0xE9, 0x00, 0xFF }
538 };
539
540 const struct bahama_config_register v20_bt_off_fm_on[] = {
541 { 0xF4, 0x86, 0xFF },
542 { 0xF0, 0x06, 0xFF },
543 { 0xE9, 0x00, 0xFF }
544 };
545 const struct bahama_variant_register bt_bahama[2][3] = {
546 {
547 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
548 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
549 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
550 },
551 {
552 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
553 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
554 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
555 }
556 };
557
558 u8 offset = 0; /* index into bahama configs */
559 on = on ? 1 : 0;
560 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530561 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
562 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
563 version read Error, version = %d \n",
564 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700565 return -EIO;
566 }
567
568 if (version == BAHAMA_VER_2_0) {
569 if (marimba_get_fm_status(&config))
570 offset = 0x01;
571 }
572
573 p = bt_bahama[on][version + offset].set;
574
575 dev_info(&msm_bt_power_device.dev,
576 "%s: found version %d\n", __func__, version);
577
578 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
579 u8 value = (p+i)->value;
580 rc = marimba_write_bit_mask(&config,
581 (p+i)->reg,
582 &value,
583 sizeof((p+i)->value),
584 (p+i)->mask);
585 if (rc < 0) {
586 dev_err(&msm_bt_power_device.dev,
587 "%s: reg %x write failed: %d\n",
588 __func__, (p+i)->reg, rc);
589 return rc;
590 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530591 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700592 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
593 __func__, (p+i)->reg,
594 value, (p+i)->mask);
595 value = 0;
596 rc = marimba_read_bit_mask(&config,
597 (p+i)->reg, &value,
598 sizeof((p+i)->value), (p+i)->mask);
599 if (rc < 0)
600 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
601 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530602 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700603 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
604 __func__, (p+i)->reg,
605 value, (p+i)->mask);
606 }
607 /* Update BT Status */
608 if (on)
609 marimba_set_bt_status(&config, true);
610 else
611 marimba_set_bt_status(&config, false);
612 return rc;
613}
614static int bluetooth_switch_regulators(int on)
615{
616 int i, rc = 0;
617
618 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
619 if (!vregs_bahama[i]) {
620 pr_err("%s: vreg_get %s failed(%d)\n",
621 __func__, vregs_bahama_name[i], rc);
622 goto vreg_fail;
623 }
624 rc = on ? vreg_set_level(vregs_bahama[i], i ? 2900 :
625 1800) : 0;
626
627 if (rc < 0) {
628 pr_err("%s: vreg set level failed (%d)\n",
629 __func__, rc);
630 goto vreg_set_level_fail;
631 }
632
633 rc = on ? vreg_enable(vregs_bahama[i]) :
634 vreg_disable(vregs_bahama[i]);
635
636 if (rc < 0) {
637 pr_err("%s: vreg %s %s failed(%d)\n",
638 __func__, vregs_bahama_name[i],
639 on ? "enable" : "disable", rc);
640 goto vreg_fail;
641 }
642 }
643 return rc;
644
645vreg_fail:
646 while (i) {
647 if (on)
648 vreg_disable(vregs_bahama[--i]);
649 }
650vreg_set_level_fail:
651 vreg_put(vregs_bahama[0]);
652 vreg_put(vregs_bahama[1]);
653 return rc;
654}
655
656static unsigned int msm_bahama_setup_power(void)
657{
658 int rc = 0;
659 struct vreg *vreg_s3 = NULL;
660
661 vreg_s3 = vreg_get(NULL, "msme1");
662 if (IS_ERR(vreg_s3)) {
663 pr_err("%s: vreg get failed (%ld)\n",
664 __func__, PTR_ERR(vreg_s3));
665 return PTR_ERR(vreg_s3);
666 }
667 rc = vreg_set_level(vreg_s3, 1800);
668 if (rc < 0) {
669 pr_err("%s: vreg set level failed (%d)\n",
670 __func__, rc);
671 goto vreg_fail;
672 }
673 rc = vreg_enable(vreg_s3);
674 if (rc < 0) {
675 pr_err("%s: vreg enable failed (%d)\n",
676 __func__, rc);
677 goto vreg_fail;
678 }
679
680 /*setup Bahama_sys_reset_n*/
681 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
682 if (rc < 0) {
683 pr_err("%s: gpio_request %d = %d\n", __func__,
684 GPIO_BT_SYS_REST_EN, rc);
685 goto vreg_fail;
686 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530687 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700688 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530689 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690 GPIO_BT_SYS_REST_EN, rc);
691 goto gpio_fail;
692 }
693 return rc;
694
695gpio_fail:
696 gpio_free(GPIO_BT_SYS_REST_EN);
697vreg_fail:
698 vreg_put(vreg_s3);
699 return rc;
700}
701
702static unsigned int msm_bahama_shutdown_power(int value)
703{
704 int rc = 0;
705 struct vreg *vreg_s3 = NULL;
706
707 vreg_s3 = vreg_get(NULL, "msme1");
708 if (IS_ERR(vreg_s3)) {
709 pr_err("%s: vreg get failed (%ld)\n",
710 __func__, PTR_ERR(vreg_s3));
711 return PTR_ERR(vreg_s3);
712 }
713 rc = vreg_disable(vreg_s3);
714 if (rc) {
715 pr_err("%s: vreg disable failed (%d)\n",
716 __func__, rc);
717 vreg_put(vreg_s3);
718 return rc;
719 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530720 rc = bt_set_gpio(0);
721 if (rc) {
722 pr_err("%s: bt_set_gpio = %d\n",
723 __func__, rc);
724 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700725 return rc;
726}
727
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700728static unsigned int msm_bahama_core_config(int type)
729{
730 int rc = 0;
731
732 if (type == BAHAMA_ID) {
733 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530734 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700735 const struct bahama_config_register v20_init[] = {
736 /* reg, value, mask */
737 { 0xF4, 0x84, 0xFF }, /* AREG */
738 { 0xF0, 0x04, 0xFF } /* DREG */
739 };
740 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
741 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
742 u8 value = v20_init[i].value;
743 rc = marimba_write_bit_mask(&config,
744 v20_init[i].reg,
745 &value,
746 sizeof(v20_init[i].value),
747 v20_init[i].mask);
748 if (rc < 0) {
749 pr_err("%s: reg %d write failed: %d\n",
750 __func__, v20_init[i].reg, rc);
751 return rc;
752 }
753 pr_debug("%s: reg 0x%02x value 0x%02x"
754 " mask 0x%02x\n",
755 __func__, v20_init[i].reg,
756 v20_init[i].value, v20_init[i].mask);
757 }
758 }
759 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530760 rc = bt_set_gpio(0);
761 if (rc) {
762 pr_err("%s: bt_set_gpio = %d\n",
763 __func__, rc);
764 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700765 pr_debug("core type: %d\n", type);
766 return rc;
767}
768
769static int bluetooth_power(int on)
770{
771 int pin, rc = 0;
772 const char *id = "BTPW";
773 int cid = 0;
774
775 cid = adie_get_detected_connectivity_type();
776 if (cid != BAHAMA_ID) {
777 pr_err("%s: unexpected adie connectivity type: %d\n",
778 __func__, cid);
779 return -ENODEV;
780 }
781 if (on) {
782 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530783 rc = bt_set_gpio(on);
784 if (rc) {
785 pr_err("%s: bt_set_gpio = %d\n",
786 __func__, rc);
787 goto exit;
788 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700789 rc = bluetooth_switch_regulators(on);
790 if (rc < 0) {
791 pr_err("%s: bluetooth_switch_regulators rc = %d",
792 __func__, rc);
793 goto exit;
794 }
795 /*setup BT GPIO lines*/
796 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
797 pin++) {
798 rc = gpio_tlmm_config(bt_config_power_on[pin],
799 GPIO_CFG_ENABLE);
800 if (rc < 0) {
801 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
802 __func__,
803 bt_config_power_on[pin],
804 rc);
805 goto fail_power;
806 }
807 }
808 /*Setup BT clocks*/
809 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
810 PMAPP_CLOCK_VOTE_ON);
811 if (rc < 0) {
812 pr_err("Failed to vote for TCXO_D1 ON\n");
813 goto fail_clock;
814 }
815 msleep(20);
816
817 /*I2C config for Bahama*/
818 rc = bahama_bt(1);
819 if (rc < 0) {
820 pr_err("%s: bahama_bt rc = %d", __func__, rc);
821 goto fail_i2c;
822 }
823 msleep(20);
824
825 /*setup BT PCM lines*/
826 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
827 if (rc < 0) {
828 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
829 __func__, rc);
830 goto fail_power;
831 }
832 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
833 PMAPP_CLOCK_VOTE_PIN_CTRL);
834 if (rc < 0)
835 pr_err("%s:Pin Control Failed, rc = %d",
836 __func__, rc);
837
838 } else {
839 rc = bahama_bt(0);
840 if (rc < 0)
841 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530842
843 rc = bt_set_gpio(on);
844 if (rc) {
845 pr_err("%s: bt_set_gpio = %d\n",
846 __func__, rc);
847 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700848fail_i2c:
849 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
850 PMAPP_CLOCK_VOTE_OFF);
851 if (rc < 0)
852 pr_err("%s: Failed to vote Off D1\n", __func__);
853fail_clock:
854 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
855 pin++) {
856 rc = gpio_tlmm_config(bt_config_power_off[pin],
857 GPIO_CFG_ENABLE);
858 if (rc < 0) {
859 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
860 __func__, bt_config_power_off[pin], rc);
861 }
862 }
863 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
864 if (rc < 0) {
865 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
866 __func__, rc);
867 }
868fail_power:
869 rc = bluetooth_switch_regulators(0);
870 if (rc < 0) {
871 pr_err("%s: switch_regulators : rc = %d",\
872 __func__, rc);
873 goto exit;
874 }
875 }
876 return rc;
877exit:
878 pr_err("%s: failed with rc = %d", __func__, rc);
879 return rc;
880}
881
882static int __init bt_power_init(void)
883{
884 int i, rc = 0;
885 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
886 vregs_bahama[i] = vreg_get(NULL,
887 vregs_bahama_name[i]);
888 if (IS_ERR(vregs_bahama[i])) {
889 pr_err("%s: vreg get %s failed (%ld)\n",
890 __func__, vregs_bahama_name[i],
891 PTR_ERR(vregs_bahama[i]));
892 rc = PTR_ERR(vregs_bahama[i]);
893 goto vreg_get_fail;
894 }
895 }
896
897 msm_bt_power_device.dev.platform_data = &bluetooth_power;
898
899 return rc;
900
901vreg_get_fail:
902 while (i)
903 vreg_put(vregs_bahama[--i]);
904 return rc;
905}
906
907static struct marimba_platform_data marimba_pdata = {
908 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
909 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
910 .bahama_setup = msm_bahama_setup_power,
911 .bahama_shutdown = msm_bahama_shutdown_power,
912 .bahama_core_config = msm_bahama_core_config,
913 .fm = &marimba_fm_pdata,
914};
915
916#endif
917
918#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
919static struct i2c_board_info core_exp_i2c_info[] __initdata = {
920 {
921 I2C_BOARD_INFO("sx1509q", 0x3e),
922 },
923};
924static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
925 {
926 I2C_BOARD_INFO("sx1508q", 0x22),
927 .platform_data = &sx150x_data[SX150X_CAM],
928 },
929};
930#endif
931#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
932static struct i2c_board_info bahama_devices[] = {
933{
934 I2C_BOARD_INFO("marimba", 0xc),
935 .platform_data = &marimba_pdata,
936},
937};
938#endif
939
940#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
941static void __init register_i2c_devices(void)
942{
943
944 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
945 cam_exp_i2c_info,
946 ARRAY_SIZE(cam_exp_i2c_info));
947
948 if (machine_is_msm7x27a_surf())
949 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
950
951 core_exp_i2c_info[0].platform_data =
952 &sx150x_data[SX150X_CORE];
953
954 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
955 core_exp_i2c_info,
956 ARRAY_SIZE(core_exp_i2c_info));
957#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
958 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
959 bahama_devices,
960 ARRAY_SIZE(bahama_devices));
961#endif
962}
963#endif
964
965static struct msm_gpio qup_i2c_gpios_io[] = {
966 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
967 "qup_scl" },
968 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
969 "qup_sda" },
970 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
971 "qup_scl" },
972 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
973 "qup_sda" },
974};
975
976static struct msm_gpio qup_i2c_gpios_hw[] = {
977 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
978 "qup_scl" },
979 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
980 "qup_sda" },
981 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
982 "qup_scl" },
983 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
984 "qup_sda" },
985};
986
987static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
988{
989 int rc;
990
991 if (adap_id < 0 || adap_id > 1)
992 return;
993
994 /* Each adapter gets 2 lines from the table */
995 if (config_type)
996 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
997 else
998 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
999 if (rc < 0)
1000 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1001}
1002
1003static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1004 .clk_freq = 100000,
1005 .clk = "gsbi_qup_clk",
1006 .pclk = "gsbi_qup_pclk",
1007 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1008};
1009
1010static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1011 .clk_freq = 100000,
1012 .clk = "gsbi_qup_clk",
1013 .pclk = "gsbi_qup_pclk",
1014 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1015};
1016
1017#ifdef CONFIG_ARCH_MSM7X27A
1018#define MSM_PMEM_MDP_SIZE 0x1DD1000
1019#define MSM_PMEM_ADSP_SIZE 0x1000000
1020
1021#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1022#define MSM_FB_SIZE 0x260000
1023#else
1024#define MSM_FB_SIZE 0x195000
1025#endif
1026
1027#endif
1028
1029static struct android_usb_platform_data android_usb_pdata = {
1030 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1031};
1032
1033static struct platform_device android_usb_device = {
1034 .name = "android_usb",
1035 .id = -1,
1036 .dev = {
1037 .platform_data = &android_usb_pdata,
1038 },
1039};
1040
1041#ifdef CONFIG_USB_EHCI_MSM_72K
1042static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1043{
1044 int rc = 0;
1045 unsigned gpio;
1046
1047 gpio = GPIO_HOST_VBUS_EN;
1048
1049 rc = gpio_request(gpio, "i2c_host_vbus_en");
1050 if (rc < 0) {
1051 pr_err("failed to request %d GPIO\n", gpio);
1052 return;
1053 }
1054 gpio_direction_output(gpio, !!on);
1055 gpio_set_value_cansleep(gpio, !!on);
1056 gpio_free(gpio);
1057}
1058
1059static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1060 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1061};
1062
1063static void __init msm7x2x_init_host(void)
1064{
1065 msm_add_host(0, &msm_usb_host_pdata);
1066}
1067#endif
1068
1069#ifdef CONFIG_USB_MSM_OTG_72K
1070static int hsusb_rpc_connect(int connect)
1071{
1072 if (connect)
1073 return msm_hsusb_rpc_connect();
1074 else
1075 return msm_hsusb_rpc_close();
1076}
1077
1078static struct vreg *vreg_3p3;
1079static int msm_hsusb_ldo_init(int init)
1080{
1081 if (init) {
1082 vreg_3p3 = vreg_get(NULL, "usb");
1083 if (IS_ERR(vreg_3p3))
1084 return PTR_ERR(vreg_3p3);
1085 } else
1086 vreg_put(vreg_3p3);
1087
1088 return 0;
1089}
1090
1091static int msm_hsusb_ldo_enable(int enable)
1092{
1093 static int ldo_status;
1094
1095 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1096 return -ENODEV;
1097
1098 if (ldo_status == enable)
1099 return 0;
1100
1101 ldo_status = enable;
1102
1103 if (enable)
1104 return vreg_enable(vreg_3p3);
1105
1106 return vreg_disable(vreg_3p3);
1107}
1108
1109#ifndef CONFIG_USB_EHCI_MSM_72K
1110static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1111{
1112 int ret = 0;
1113
1114 if (init)
1115 ret = msm_pm_app_rpc_init(callback);
1116 else
1117 msm_pm_app_rpc_deinit(callback);
1118
1119 return ret;
1120}
1121#endif
1122
1123static struct msm_otg_platform_data msm_otg_pdata = {
1124#ifndef CONFIG_USB_EHCI_MSM_72K
1125 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1126#else
1127 .vbus_power = msm_hsusb_vbus_power,
1128#endif
1129 .rpc_connect = hsusb_rpc_connect,
1130 .core_clk = 1,
1131 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1132 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1133 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1134 .se1_gating = SE1_GATING_DISABLE,
1135 .ldo_init = msm_hsusb_ldo_init,
1136 .ldo_enable = msm_hsusb_ldo_enable,
1137 .chg_init = hsusb_chg_init,
1138 .chg_connected = hsusb_chg_connected,
1139 .chg_vbus_draw = hsusb_chg_vbus_draw,
1140};
1141#endif
1142
1143static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1144 .is_phy_status_timer_on = 1,
1145};
1146
1147static struct resource smc91x_resources[] = {
1148 [0] = {
1149 .start = 0x90000300,
1150 .end = 0x900003ff,
1151 .flags = IORESOURCE_MEM,
1152 },
1153 [1] = {
1154 .start = MSM_GPIO_TO_INT(4),
1155 .end = MSM_GPIO_TO_INT(4),
1156 .flags = IORESOURCE_IRQ,
1157 },
1158};
1159
1160static struct platform_device smc91x_device = {
1161 .name = "smc91x",
1162 .id = 0,
1163 .num_resources = ARRAY_SIZE(smc91x_resources),
1164 .resource = smc91x_resources,
1165};
1166
1167#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1168 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1169 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1170 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1171
1172static unsigned long vreg_sts, gpio_sts;
1173static struct vreg *vreg_mmc;
1174static struct vreg *vreg_emmc;
1175
1176struct sdcc_vreg {
1177 struct vreg *vreg_data;
1178 unsigned level;
1179};
1180
1181static struct sdcc_vreg sdcc_vreg_data[4];
1182
1183struct sdcc_gpio {
1184 struct msm_gpio *cfg_data;
1185 uint32_t size;
1186 struct msm_gpio *sleep_cfg_data;
1187};
1188
1189static struct msm_gpio sdc1_cfg_data[] = {
1190 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1191 "sdc1_dat_3"},
1192 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1193 "sdc1_dat_2"},
1194 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1195 "sdc1_dat_1"},
1196 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1197 "sdc1_dat_0"},
1198 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1199 "sdc1_cmd"},
1200 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1201 "sdc1_clk"},
1202};
1203
1204static struct msm_gpio sdc2_cfg_data[] = {
1205 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1206 "sdc2_clk"},
1207 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1208 "sdc2_cmd"},
1209 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1210 "sdc2_dat_3"},
1211 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1212 "sdc2_dat_2"},
1213 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1214 "sdc2_dat_1"},
1215 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1216 "sdc2_dat_0"},
1217};
1218
1219static struct msm_gpio sdc2_sleep_cfg_data[] = {
1220 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1221 "sdc2_clk"},
1222 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1223 "sdc2_cmd"},
1224 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1225 "sdc2_dat_3"},
1226 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1227 "sdc2_dat_2"},
1228 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1229 "sdc2_dat_1"},
1230 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1231 "sdc2_dat_0"},
1232};
1233static struct msm_gpio sdc3_cfg_data[] = {
1234 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1235 "sdc3_clk"},
1236 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1237 "sdc3_cmd"},
1238 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1239 "sdc3_dat_3"},
1240 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1241 "sdc3_dat_2"},
1242 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1243 "sdc3_dat_1"},
1244 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1245 "sdc3_dat_0"},
1246#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1247 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1248 "sdc3_dat_7"},
1249 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1250 "sdc3_dat_6"},
1251 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1252 "sdc3_dat_5"},
1253 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1254 "sdc3_dat_4"},
1255#endif
1256};
1257
1258static struct msm_gpio sdc4_cfg_data[] = {
1259 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1260 "sdc4_dat_3"},
1261 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1262 "sdc4_dat_2"},
1263 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1264 "sdc4_dat_1"},
1265 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1266 "sdc4_cmd"},
1267 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1268 "sdc4_dat_0"},
1269 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1270 "sdc4_clk"},
1271};
1272
1273static struct sdcc_gpio sdcc_cfg_data[] = {
1274 {
1275 .cfg_data = sdc1_cfg_data,
1276 .size = ARRAY_SIZE(sdc1_cfg_data),
1277 },
1278 {
1279 .cfg_data = sdc2_cfg_data,
1280 .size = ARRAY_SIZE(sdc2_cfg_data),
1281 .sleep_cfg_data = sdc2_sleep_cfg_data,
1282 },
1283 {
1284 .cfg_data = sdc3_cfg_data,
1285 .size = ARRAY_SIZE(sdc3_cfg_data),
1286 },
1287 {
1288 .cfg_data = sdc4_cfg_data,
1289 .size = ARRAY_SIZE(sdc4_cfg_data),
1290 },
1291};
1292
1293static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1294{
1295 int rc = 0;
1296 struct sdcc_gpio *curr;
1297
1298 curr = &sdcc_cfg_data[dev_id - 1];
1299 if (!(test_bit(dev_id, &gpio_sts)^enable))
1300 return rc;
1301
1302 if (enable) {
1303 set_bit(dev_id, &gpio_sts);
1304 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1305 if (rc)
1306 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1307 __func__, dev_id);
1308 } else {
1309 clear_bit(dev_id, &gpio_sts);
1310 if (curr->sleep_cfg_data) {
1311 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1312 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1313 return rc;
1314 }
1315 msm_gpios_disable_free(curr->cfg_data, curr->size);
1316 }
1317 return rc;
1318}
1319
1320static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1321{
1322 int rc = 0;
1323 struct sdcc_vreg *curr;
1324
1325 curr = &sdcc_vreg_data[dev_id - 1];
1326
1327 if (!(test_bit(dev_id, &vreg_sts)^enable))
1328 return rc;
1329
1330 if (enable) {
1331 set_bit(dev_id, &vreg_sts);
1332 rc = vreg_set_level(curr->vreg_data, curr->level);
1333 if (rc)
1334 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1335
1336 rc = vreg_enable(curr->vreg_data);
1337 if (rc)
1338 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1339 } else {
1340 clear_bit(dev_id, &vreg_sts);
1341 rc = vreg_disable(curr->vreg_data);
1342 if (rc)
1343 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1344 }
1345 return rc;
1346}
1347
1348static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1349{
1350 int rc = 0;
1351 struct platform_device *pdev;
1352
1353 pdev = container_of(dv, struct platform_device, dev);
1354
1355 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1356 if (rc)
1357 goto out;
1358
1359 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1360out:
1361 return rc;
1362}
1363
1364#define GPIO_SDC1_HW_DET 85
1365
1366#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1367 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1368static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1369{
1370 int status;
1371
1372 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1373 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1374 if (status)
1375 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1376 GPIO_SDC1_HW_DET);
1377
1378 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1379 if (status) {
1380 pr_err("%s:Failed to request GPIO %d\n", __func__,
1381 GPIO_SDC1_HW_DET);
1382 } else {
1383 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1384 if (!status)
1385 status = gpio_get_value(GPIO_SDC1_HW_DET);
1386 gpio_free(GPIO_SDC1_HW_DET);
1387 }
1388 return status;
1389}
1390#endif
1391
1392#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1393static struct mmc_platform_data sdc1_plat_data = {
1394 .ocr_mask = MMC_VDD_28_29,
1395 .translate_vdd = msm_sdcc_setup_power,
1396 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1397 .msmsdcc_fmin = 144000,
1398 .msmsdcc_fmid = 24576000,
1399 .msmsdcc_fmax = 49152000,
1400#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1401 .status = msm7x2xa_sdcc_slot_status,
1402 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1403 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1404#endif
1405};
1406#endif
1407
1408#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1409static struct mmc_platform_data sdc2_plat_data = {
1410 /*
1411 * SDC2 supports only 1.8V, claim for 2.85V range is just
1412 * for allowing buggy cards who advertise 2.8V even though
1413 * they can operate at 1.8V supply.
1414 */
1415 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1416 .translate_vdd = msm_sdcc_setup_power,
1417 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1418#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1419 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1420#endif
1421 .msmsdcc_fmin = 144000,
1422 .msmsdcc_fmid = 24576000,
1423 .msmsdcc_fmax = 49152000,
1424#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1425 .dummy52_required = 1,
1426#endif
1427};
1428#endif
1429
1430#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1431static struct mmc_platform_data sdc3_plat_data = {
1432 .ocr_mask = MMC_VDD_28_29,
1433 .translate_vdd = msm_sdcc_setup_power,
1434#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1435 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1436#else
1437 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1438#endif
1439 .msmsdcc_fmin = 144000,
1440 .msmsdcc_fmid = 24576000,
1441 .msmsdcc_fmax = 49152000,
1442 .nonremovable = 1,
1443};
1444#endif
1445
1446#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1447 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1448static struct mmc_platform_data sdc4_plat_data = {
1449 .ocr_mask = MMC_VDD_28_29,
1450 .translate_vdd = msm_sdcc_setup_power,
1451 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1452 .msmsdcc_fmin = 144000,
1453 .msmsdcc_fmid = 24576000,
1454 .msmsdcc_fmax = 49152000,
1455};
1456#endif
1457#endif
1458
1459#ifdef CONFIG_SERIAL_MSM_HS
1460static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1461 .inject_rx_on_wakeup = 1,
1462 .rx_to_inject = 0xFD,
1463};
1464#endif
1465static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1466 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1467 .idle_supported = 1,
1468 .suspend_supported = 1,
1469 .idle_enabled = 1,
1470 .suspend_enabled = 1,
1471 .latency = 16000,
1472 .residency = 20000,
1473 },
1474 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1475 .idle_supported = 1,
1476 .suspend_supported = 1,
1477 .idle_enabled = 1,
1478 .suspend_enabled = 1,
1479 .latency = 12000,
1480 .residency = 20000,
1481 },
1482 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1483 .idle_supported = 1,
1484 .suspend_supported = 1,
1485 .idle_enabled = 0,
1486 .suspend_enabled = 1,
1487 .latency = 2000,
1488 .residency = 0,
1489 },
1490 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1491 .idle_supported = 1,
1492 .suspend_supported = 1,
1493 .idle_enabled = 1,
1494 .suspend_enabled = 1,
1495 .latency = 2,
1496 .residency = 0,
1497 },
1498};
1499
1500static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1501 .name = "pmem_adsp",
1502 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1503 .cached = 0,
1504 .memory_type = MEMTYPE_EBI1,
1505};
1506
1507static struct platform_device android_pmem_adsp_device = {
1508 .name = "android_pmem",
1509 .id = 1,
1510 .dev = { .platform_data = &android_pmem_adsp_pdata },
1511};
1512
1513static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1514static int __init pmem_mdp_size_setup(char *p)
1515{
1516 pmem_mdp_size = memparse(p, NULL);
1517 return 0;
1518}
1519
1520early_param("pmem_mdp_size", pmem_mdp_size_setup);
1521
1522static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1523static int __init pmem_adsp_size_setup(char *p)
1524{
1525 pmem_adsp_size = memparse(p, NULL);
1526 return 0;
1527}
1528
1529early_param("pmem_adsp_size", pmem_adsp_size_setup);
1530
1531static unsigned fb_size = MSM_FB_SIZE;
1532static int __init fb_size_setup(char *p)
1533{
1534 fb_size = memparse(p, NULL);
1535 return 0;
1536}
1537
1538early_param("fb_size", fb_size_setup);
1539
1540
1541#define LCDC_CONFIG_PROC 21
1542#define LCDC_UN_CONFIG_PROC 22
1543#define LCDC_API_PROG 0x30000066
1544#define LCDC_API_VERS 0x00010001
1545
1546static struct msm_rpc_endpoint *lcdc_ep;
1547
1548static int msm_fb_lcdc_config(int on)
1549{
1550 int rc = 0;
1551 struct rpc_request_hdr hdr;
1552
1553 if (on)
1554 pr_info("lcdc config\n");
1555 else
1556 pr_info("lcdc un-config\n");
1557
1558 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
1559
1560 if (IS_ERR(lcdc_ep)) {
1561 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
1562 __func__, PTR_ERR(lcdc_ep));
1563 return -EINVAL;
1564 }
1565
1566 rc = msm_rpc_call(lcdc_ep,
1567 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
1568 &hdr, sizeof(hdr), 5 * HZ);
1569
1570 if (rc)
1571 printk(KERN_ERR
1572 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
1573
1574 msm_rpc_close(lcdc_ep);
1575 return rc;
1576}
1577
1578static const char * const msm_fb_lcdc_vreg[] = {
1579 "gp2",
1580 "msme1",
1581};
1582
1583static const int msm_fb_lcdc_vreg_mV[] = {
1584 2850,
1585 1800,
1586};
1587
1588struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1589
1590static uint32_t lcdc_gpio_initialized;
1591
1592static void lcdc_toshiba_gpio_init(void)
1593{
1594 int i, rc = 0;
1595 if (!lcdc_gpio_initialized) {
1596 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1597 pr_err("failed to request gpio spi_clk\n");
1598 return;
1599 }
1600 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1601 pr_err("failed to request gpio spi_cs0_N\n");
1602 goto fail_gpio6;
1603 }
1604 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1605 pr_err("failed to request gpio spi_mosi\n");
1606 goto fail_gpio5;
1607 }
1608 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1609 pr_err("failed to request gpio spi_miso\n");
1610 goto fail_gpio4;
1611 }
1612 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1613 pr_err("failed to request gpio_disp_pwr\n");
1614 goto fail_gpio3;
1615 }
1616 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1617 pr_err("failed to request gpio_bkl_en\n");
1618 goto fail_gpio2;
1619 }
1620 pmapp_disp_backlight_init();
1621
1622 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1623 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1624
1625 rc = vreg_set_level(lcdc_vreg[i],
1626 msm_fb_lcdc_vreg_mV[i]);
1627
1628 if (rc < 0) {
1629 pr_err("%s: set regulator level failed "
1630 "with :(%d)\n", __func__, rc);
1631 goto fail_gpio1;
1632 }
1633 }
1634 lcdc_gpio_initialized = 1;
1635 }
1636 return;
1637
1638fail_gpio1:
1639 for (; i > 0; i--)
1640 vreg_put(lcdc_vreg[i - 1]);
1641
1642 gpio_free(GPIO_BACKLIGHT_EN);
1643fail_gpio2:
1644 gpio_free(GPIO_DISPLAY_PWR_EN);
1645fail_gpio3:
1646 gpio_free(GPIO_SPI_MISO);
1647fail_gpio4:
1648 gpio_free(GPIO_SPI_MOSI);
1649fail_gpio5:
1650 gpio_free(GPIO_SPI_CS0_N);
1651fail_gpio6:
1652 gpio_free(GPIO_SPI_CLK);
1653 lcdc_gpio_initialized = 0;
1654}
1655
1656static uint32_t lcdc_gpio_table[] = {
1657 GPIO_SPI_CLK,
1658 GPIO_SPI_CS0_N,
1659 GPIO_SPI_MOSI,
1660 GPIO_DISPLAY_PWR_EN,
1661 GPIO_BACKLIGHT_EN,
1662 GPIO_SPI_MISO,
1663};
1664
1665static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1666{
1667 int n;
1668
1669 if (lcdc_gpio_initialized) {
1670 /* All are IO Expander GPIOs */
1671 for (n = 0; n < (len - 1); n++)
1672 gpio_direction_output(table[n], 1);
1673 }
1674}
1675
1676static void lcdc_toshiba_config_gpios(int enable)
1677{
1678 config_lcdc_gpio_table(lcdc_gpio_table,
1679 ARRAY_SIZE(lcdc_gpio_table), enable);
1680}
1681
1682static int msm_fb_lcdc_power_save(int on)
1683{
1684 int i, rc = 0;
1685 /* Doing the init of the LCDC GPIOs very late as they are from
1686 an I2C-controlled IO Expander */
1687 lcdc_toshiba_gpio_init();
1688
1689 if (lcdc_gpio_initialized) {
1690 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1691 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1692
1693 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1694 if (on) {
1695 rc = vreg_enable(lcdc_vreg[i]);
1696
1697 if (rc) {
1698 printk(KERN_ERR "vreg_enable: %s vreg"
1699 "operation failed\n",
1700 msm_fb_lcdc_vreg[i]);
1701 goto lcdc_vreg_fail;
1702 }
1703 } else {
1704 rc = vreg_disable(lcdc_vreg[i]);
1705
1706 if (rc) {
1707 printk(KERN_ERR "vreg_disable: %s vreg "
1708 "operation failed\n",
1709 msm_fb_lcdc_vreg[i]);
1710 goto lcdc_vreg_fail;
1711 }
1712 }
1713 }
1714 }
1715
1716 return rc;
1717
1718lcdc_vreg_fail:
1719 if (on) {
1720 for (; i > 0; i--)
1721 vreg_disable(lcdc_vreg[i - 1]);
1722 } else {
1723 for (; i > 0; i--)
1724 vreg_enable(lcdc_vreg[i - 1]);
1725 }
1726
1727return rc;
1728
1729}
1730
1731
1732static int lcdc_toshiba_set_bl(int level)
1733{
1734 int ret;
1735
1736 ret = pmapp_disp_backlight_set_brightness(level);
1737 if (ret)
1738 pr_err("%s: can't set lcd backlight!\n", __func__);
1739
1740 return ret;
1741}
1742
1743
1744static struct lcdc_platform_data lcdc_pdata = {
1745 .lcdc_gpio_config = msm_fb_lcdc_config,
1746 .lcdc_power_save = msm_fb_lcdc_power_save,
1747};
1748
1749static int lcd_panel_spi_gpio_num[] = {
1750 GPIO_SPI_MOSI, /* spi_sdi */
1751 GPIO_SPI_MISO, /* spi_sdoi */
1752 GPIO_SPI_CLK, /* spi_clk */
1753 GPIO_SPI_CS0_N, /* spi_cs */
1754};
1755
1756static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1757 .panel_config_gpio = lcdc_toshiba_config_gpios,
1758 .pmic_backlight = lcdc_toshiba_set_bl,
1759 .gpio_num = lcd_panel_spi_gpio_num,
1760};
1761
1762static struct platform_device lcdc_toshiba_panel_device = {
1763 .name = "lcdc_toshiba_fwvga_pt",
1764 .id = 0,
1765 .dev = {
1766 .platform_data = &lcdc_toshiba_panel_data,
1767 }
1768};
1769
1770static struct resource msm_fb_resources[] = {
1771 {
1772 .flags = IORESOURCE_DMA,
1773 }
1774};
1775
1776static int msm_fb_detect_panel(const char *name)
1777{
1778 int ret = -EPERM;
1779
1780 if (machine_is_msm7x27a_surf()) {
1781 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1782 ret = 0;
1783 } else {
1784 ret = -ENODEV;
1785 }
1786
1787 return ret;
1788}
1789
1790static struct msm_fb_platform_data msm_fb_pdata = {
1791 .detect_client = msm_fb_detect_panel,
1792};
1793
1794static struct platform_device msm_fb_device = {
1795 .name = "msm_fb",
1796 .id = 0,
1797 .num_resources = ARRAY_SIZE(msm_fb_resources),
1798 .resource = msm_fb_resources,
1799 .dev = {
1800 .platform_data = &msm_fb_pdata,
1801 }
1802};
1803
1804#ifdef CONFIG_FB_MSM_MIPI_DSI
1805static int mipi_renesas_set_bl(int level)
1806{
1807 int ret;
1808
1809 ret = pmapp_disp_backlight_set_brightness(level);
1810
1811 if (ret)
1812 pr_err("%s: can't set lcd backlight!\n", __func__);
1813
1814 return ret;
1815}
1816
1817static struct msm_panel_common_pdata mipi_renesas_pdata = {
1818 .pmic_backlight = mipi_renesas_set_bl,
1819};
1820
1821
1822static struct platform_device mipi_dsi_renesas_panel_device = {
1823 .name = "mipi_renesas",
1824 .id = 0,
1825 .dev = {
1826 .platform_data = &mipi_renesas_pdata,
1827 }
1828};
1829#endif
1830
1831static void __init msm7x27a_init_mmc(void)
1832{
1833 vreg_emmc = vreg_get(NULL, "emmc");
1834 if (IS_ERR(vreg_emmc)) {
1835 pr_err("%s: vreg get failed (%ld)\n",
1836 __func__, PTR_ERR(vreg_emmc));
1837 return;
1838 }
1839
1840 vreg_mmc = vreg_get(NULL, "mmc");
1841 if (IS_ERR(vreg_mmc)) {
1842 pr_err("%s: vreg get failed (%ld)\n",
1843 __func__, PTR_ERR(vreg_mmc));
1844 return;
1845 }
1846
1847 /* eMMC slot */
1848#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1849 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1850 sdcc_vreg_data[2].level = 3000;
1851 msm_add_sdcc(3, &sdc3_plat_data);
1852#endif
1853 /* Micro-SD slot */
1854#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1855 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1856 sdcc_vreg_data[0].level = 2850;
1857 msm_add_sdcc(1, &sdc1_plat_data);
1858#endif
1859 /* SDIO WLAN slot */
1860#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1861 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1862 sdcc_vreg_data[1].level = 2850;
1863 msm_add_sdcc(2, &sdc2_plat_data);
1864#endif
1865 /* Not Used */
1866#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1867 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1868 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1869 sdcc_vreg_data[3].level = 2850;
1870 msm_add_sdcc(4, &sdc4_plat_data);
1871#endif
1872}
1873#define SND(desc, num) { .name = #desc, .id = num }
1874static struct snd_endpoint snd_endpoints_list[] = {
1875 SND(HANDSET, 0),
1876 SND(MONO_HEADSET, 2),
1877 SND(HEADSET, 3),
1878 SND(SPEAKER, 6),
1879 SND(TTY_HEADSET, 8),
1880 SND(TTY_VCO, 9),
1881 SND(TTY_HCO, 10),
1882 SND(BT, 12),
1883 SND(IN_S_SADC_OUT_HANDSET, 16),
1884 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1885 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1886 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1887 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1888 SND(CURRENT, 34),
1889 SND(FM_ANALOG_STEREO_HEADSET, 35),
1890 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1891};
1892#undef SND
1893
1894static struct msm_snd_endpoints msm_device_snd_endpoints = {
1895 .endpoints = snd_endpoints_list,
1896 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1897};
1898
1899static struct platform_device msm_device_snd = {
1900 .name = "msm_snd",
1901 .id = -1,
1902 .dev = {
1903 .platform_data = &msm_device_snd_endpoints
1904 },
1905};
1906
1907#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1908 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1909 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1910 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1911 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1912 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1913#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1914 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1915 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1916 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1917 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1918 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1919#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1920 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1921 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1922 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1923 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1924 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1925#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1926 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1927 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1928 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1929 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1930 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1931#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1932
1933static unsigned int dec_concurrency_table[] = {
1934 /* Audio LP */
1935 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1936 0, 0, 0,
1937
1938 /* Concurrency 1 */
1939 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1940 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1941 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1942 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1943 (DEC4_FORMAT),
1944
1945 /* Concurrency 2 */
1946 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1947 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1948 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1949 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1950 (DEC4_FORMAT),
1951
1952 /* Concurrency 3 */
1953 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1954 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1955 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1956 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1957 (DEC4_FORMAT),
1958
1959 /* Concurrency 4 */
1960 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1961 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1962 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1963 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1964 (DEC4_FORMAT),
1965
1966 /* Concurrency 5 */
1967 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1968 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1969 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1970 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1971 (DEC4_FORMAT),
1972
1973 /* Concurrency 6 */
1974 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1975 0, 0, 0, 0,
1976
1977 /* Concurrency 7 */
1978 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1979 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1980 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1981 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1982 (DEC4_FORMAT),
1983};
1984
1985#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1986 .module_queueid = queueid, .module_decid = decid, \
1987 .nr_codec_support = nr_codec}
1988
1989static struct msm_adspdec_info dec_info_list[] = {
1990 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1991 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1992 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1993 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1994 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1995};
1996
1997static struct msm_adspdec_database msm_device_adspdec_database = {
1998 .num_dec = ARRAY_SIZE(dec_info_list),
1999 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
2000 ARRAY_SIZE(dec_info_list)),
2001 .dec_concurrency_table = dec_concurrency_table,
2002 .dec_info_list = dec_info_list,
2003};
2004
2005static struct platform_device msm_device_adspdec = {
2006 .name = "msm_adspdec",
2007 .id = -1,
2008 .dev = {
2009 .platform_data = &msm_device_adspdec_database
2010 },
2011};
2012
2013static struct android_pmem_platform_data android_pmem_audio_pdata = {
2014 .name = "pmem_audio",
2015 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2016 .cached = 0,
2017 .memory_type = MEMTYPE_EBI1,
2018};
2019
2020static struct platform_device android_pmem_audio_device = {
2021 .name = "android_pmem",
2022 .id = 2,
2023 .dev = { .platform_data = &android_pmem_audio_pdata },
2024};
2025
2026static struct android_pmem_platform_data android_pmem_pdata = {
2027 .name = "pmem",
2028 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2029 .cached = 1,
2030 .memory_type = MEMTYPE_EBI1,
2031};
2032static struct platform_device android_pmem_device = {
2033 .name = "android_pmem",
2034 .id = 0,
2035 .dev = { .platform_data = &android_pmem_pdata },
2036};
2037
2038static u32 msm_calculate_batt_capacity(u32 current_voltage);
2039
2040static struct msm_psy_batt_pdata msm_psy_batt_data = {
2041 .voltage_min_design = 2800,
2042 .voltage_max_design = 4300,
2043 .avail_chg_sources = AC_CHG | USB_CHG ,
2044 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2045 .calculate_capacity = &msm_calculate_batt_capacity,
2046};
2047
2048static u32 msm_calculate_batt_capacity(u32 current_voltage)
2049{
2050 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2051 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2052
2053 return (current_voltage - low_voltage) * 100
2054 / (high_voltage - low_voltage);
2055}
2056
2057static struct platform_device msm_batt_device = {
2058 .name = "msm-battery",
2059 .id = -1,
2060 .dev.platform_data = &msm_psy_batt_data,
2061};
2062
2063static struct smsc911x_platform_config smsc911x_config = {
2064 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2065 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2066 .flags = SMSC911X_USE_16BIT,
2067};
2068
2069static struct resource smsc911x_resources[] = {
2070 [0] = {
2071 .start = 0x90000000,
2072 .end = 0x90007fff,
2073 .flags = IORESOURCE_MEM,
2074 },
2075 [1] = {
2076 .start = MSM_GPIO_TO_INT(48),
2077 .end = MSM_GPIO_TO_INT(48),
2078 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2079 },
2080};
2081
2082static struct platform_device smsc911x_device = {
2083 .name = "smsc911x",
2084 .id = 0,
2085 .num_resources = ARRAY_SIZE(smsc911x_resources),
2086 .resource = smsc911x_resources,
2087 .dev = {
2088 .platform_data = &smsc911x_config,
2089 },
2090};
2091
2092static struct msm_gpio smsc911x_gpios[] = {
2093 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2094 "smsc911x_irq" },
2095 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2096 "eth_fifo_sel" },
2097};
2098
2099#define ETH_FIFO_SEL_GPIO 49
2100static void msm7x27a_cfg_smsc911x(void)
2101{
2102 int res;
2103
2104 res = msm_gpios_request_enable(smsc911x_gpios,
2105 ARRAY_SIZE(smsc911x_gpios));
2106 if (res) {
2107 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2108 return;
2109 }
2110
2111 /* ETH_FIFO_SEL */
2112 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2113 if (res) {
2114 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2115 ETH_FIFO_SEL_GPIO);
2116 msm_gpios_disable_free(smsc911x_gpios,
2117 ARRAY_SIZE(smsc911x_gpios));
2118 return;
2119 }
2120 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2121}
2122
2123#ifdef CONFIG_MSM_CAMERA
2124static uint32_t camera_off_gpio_table[] = {
2125 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2126};
2127
2128static uint32_t camera_on_gpio_table[] = {
2129 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2130};
2131
2132#ifdef CONFIG_MSM_CAMERA_FLASH
2133static struct msm_camera_sensor_flash_src msm_flash_src = {
2134 .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER,
2135 ._fsrc.current_driver_src.led1 = GPIO_CAM_GP_LED_EN1,
2136 ._fsrc.current_driver_src.led2 = GPIO_CAM_GP_LED_EN2,
2137};
2138#endif
2139
2140static struct vreg *vreg_gp1;
2141static struct vreg *vreg_gp2;
2142static struct vreg *vreg_gp3;
2143static void msm_camera_vreg_config(int vreg_en)
2144{
2145 int rc;
2146
2147 if (vreg_gp1 == NULL) {
2148 vreg_gp1 = vreg_get(NULL, "msme1");
2149 if (IS_ERR(vreg_gp1)) {
2150 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2151 __func__, "msme1", PTR_ERR(vreg_gp1));
2152 return;
2153 }
2154
2155 rc = vreg_set_level(vreg_gp1, 1800);
2156 if (rc) {
2157 pr_err("%s: GP1 set_level failed (%d)\n",
2158 __func__, rc);
2159 return;
2160 }
2161 }
2162
2163 if (vreg_gp2 == NULL) {
2164 vreg_gp2 = vreg_get(NULL, "gp2");
2165 if (IS_ERR(vreg_gp2)) {
2166 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2167 __func__, "gp2", PTR_ERR(vreg_gp2));
2168 return;
2169 }
2170
2171 rc = vreg_set_level(vreg_gp2, 2850);
2172 if (rc) {
2173 pr_err("%s: GP2 set_level failed (%d)\n",
2174 __func__, rc);
2175 }
2176 }
2177
2178 if (vreg_gp3 == NULL) {
2179 vreg_gp3 = vreg_get(NULL, "usb2");
2180 if (IS_ERR(vreg_gp3)) {
2181 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2182 __func__, "gp3", PTR_ERR(vreg_gp3));
2183 return;
2184 }
2185
2186 rc = vreg_set_level(vreg_gp3, 1800);
2187 if (rc) {
2188 pr_err("%s: GP3 set level failed (%d)\n",
2189 __func__, rc);
2190 }
2191 }
2192
2193 if (vreg_en) {
2194 rc = vreg_enable(vreg_gp1);
2195 if (rc) {
2196 pr_err("%s: GP1 enable failed (%d)\n",
2197 __func__, rc);
2198 return;
2199 }
2200
2201 rc = vreg_enable(vreg_gp2);
2202 if (rc) {
2203 pr_err("%s: GP2 enable failed (%d)\n",
2204 __func__, rc);
2205 }
2206
2207 rc = vreg_enable(vreg_gp3);
2208 if (rc) {
2209 pr_err("%s: GP3 enable failed (%d)\n",
2210 __func__, rc);
2211 }
2212 } else {
2213 rc = vreg_disable(vreg_gp1);
2214 if (rc)
2215 pr_err("%s: GP1 disable failed (%d)\n",
2216 __func__, rc);
2217
2218 rc = vreg_disable(vreg_gp2);
2219 if (rc) {
2220 pr_err("%s: GP2 disable failed (%d)\n",
2221 __func__, rc);
2222 }
2223
2224 rc = vreg_disable(vreg_gp3);
2225 if (rc) {
2226 pr_err("%s: GP3 disable failed (%d)\n",
2227 __func__, rc);
2228 }
2229 }
2230}
2231
2232static int config_gpio_table(uint32_t *table, int len)
2233{
2234 int rc = 0, i = 0;
2235
2236 for (i = 0; i < len; i++) {
2237 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2238 if (rc) {
2239 pr_err("%s not able to get gpio\n", __func__);
2240 for (i--; i >= 0; i--)
2241 gpio_tlmm_config(camera_off_gpio_table[i],
2242 GPIO_CFG_ENABLE);
2243 break;
2244 }
2245 }
2246 return rc;
2247}
2248
2249static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2250static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2251static int config_camera_on_gpios_rear(void)
2252{
2253 int rc = 0;
2254
2255 if (machine_is_msm7x27a_ffa())
2256 msm_camera_vreg_config(1);
2257
2258 rc = config_gpio_table(camera_on_gpio_table,
2259 ARRAY_SIZE(camera_on_gpio_table));
2260 if (rc < 0) {
2261 pr_err("%s: CAMSENSOR gpio table request"
2262 "failed\n", __func__);
2263 return rc;
2264 }
2265
2266 return rc;
2267}
2268
2269static void config_camera_off_gpios_rear(void)
2270{
2271 if (machine_is_msm7x27a_ffa())
2272 msm_camera_vreg_config(0);
2273
2274 config_gpio_table(camera_off_gpio_table,
2275 ARRAY_SIZE(camera_off_gpio_table));
2276}
2277
2278static int config_camera_on_gpios_front(void)
2279{
2280 int rc = 0;
2281
2282 if (machine_is_msm7x27a_ffa())
2283 msm_camera_vreg_config(1);
2284
2285 rc = config_gpio_table(camera_on_gpio_table,
2286 ARRAY_SIZE(camera_on_gpio_table));
2287 if (rc < 0) {
2288 pr_err("%s: CAMSENSOR gpio table request"
2289 "failed\n", __func__);
2290 return rc;
2291 }
2292
2293 return rc;
2294}
2295
2296static void config_camera_off_gpios_front(void)
2297{
2298 if (machine_is_msm7x27a_ffa())
2299 msm_camera_vreg_config(0);
2300
2301 config_gpio_table(camera_off_gpio_table,
2302 ARRAY_SIZE(camera_off_gpio_table));
2303}
2304
2305struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2306 .camera_gpio_on = config_camera_on_gpios_rear,
2307 .camera_gpio_off = config_camera_off_gpios_rear,
2308 .ioext.csiphy = 0xA1000000,
2309 .ioext.csisz = 0x00100000,
2310 .ioext.csiirq = INT_CSI_IRQ_1,
2311 .ioclk.mclk_clk_rate = 24000000,
2312 .ioclk.vfe_clk_rate = 192000000,
2313 .ioext.appphy = MSM_CLK_CTL_PHYS,
2314 .ioext.appsz = MSM_CLK_CTL_SIZE,
2315};
2316
2317struct msm_camera_device_platform_data msm_camera_device_data_front = {
2318 .camera_gpio_on = config_camera_on_gpios_front,
2319 .camera_gpio_off = config_camera_off_gpios_front,
2320 .ioext.csiphy = 0xA0F00000,
2321 .ioext.csisz = 0x00100000,
2322 .ioext.csiirq = INT_CSI_IRQ_0,
2323 .ioclk.mclk_clk_rate = 24000000,
2324 .ioclk.vfe_clk_rate = 192000000,
2325 .ioext.appphy = MSM_CLK_CTL_PHYS,
2326 .ioext.appsz = MSM_CLK_CTL_SIZE,
2327};
2328
2329#ifdef CONFIG_S5K4E1
2330static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2331 .mount_angle = 90
2332};
2333
2334static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2335 .flash_type = MSM_CAMERA_FLASH_LED,
2336 .flash_src = &msm_flash_src
2337};
2338
2339static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2340 .sensor_name = "s5k4e1",
2341 .sensor_reset_enable = 1,
2342 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2343 .sensor_pwd = 85,
2344 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2345 .vcm_enable = 1,
2346 .pdata = &msm_camera_device_data_rear,
2347 .flash_data = &flash_s5k4e1,
2348 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2349 .csi_if = 1
2350};
2351
2352static struct platform_device msm_camera_sensor_s5k4e1 = {
2353 .name = "msm_camera_s5k4e1",
2354 .dev = {
2355 .platform_data = &msm_camera_sensor_s5k4e1_data,
2356 },
2357};
2358#endif
2359
2360#ifdef CONFIG_IMX072
2361static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2362 .mount_angle = 90
2363};
2364
2365static struct msm_camera_sensor_flash_data flash_imx072 = {
2366 .flash_type = MSM_CAMERA_FLASH_LED,
2367 .flash_src = &msm_flash_src
2368};
2369
2370static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2371 .sensor_name = "imx072",
2372 .sensor_reset_enable = 1,
2373 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2374 .sensor_pwd = 85,
2375 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2376 .vcm_enable = 1,
2377 .pdata = &msm_camera_device_data_rear,
2378 .flash_data = &flash_imx072,
2379 .sensor_platform_info = &imx072_sensor_7627a_info,
2380 .csi_if = 1
2381};
2382
2383static struct platform_device msm_camera_sensor_imx072 = {
2384 .name = "msm_camera_imx072",
2385 .dev = {
2386 .platform_data = &msm_camera_sensor_imx072_data,
2387 },
2388};
2389#endif
2390
2391#ifdef CONFIG_WEBCAM_OV9726
2392static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2393 .mount_angle = 90
2394};
2395
2396static struct msm_camera_sensor_flash_data flash_ov9726 = {
2397 .flash_type = MSM_CAMERA_FLASH_NONE,
2398 .flash_src = &msm_flash_src
2399};
2400
2401static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2402 .sensor_name = "ov9726",
2403 .sensor_reset_enable = 0,
2404 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2405 .sensor_pwd = 85,
2406 .vcm_pwd = 1,
2407 .vcm_enable = 0,
2408 .pdata = &msm_camera_device_data_front,
2409 .flash_data = &flash_ov9726,
2410 .sensor_platform_info = &ov9726_sensor_7627a_info,
2411 .csi_if = 1
2412};
2413
2414static struct platform_device msm_camera_sensor_ov9726 = {
2415 .name = "msm_camera_ov9726",
2416 .dev = {
2417 .platform_data = &msm_camera_sensor_ov9726_data,
2418 },
2419};
2420#endif
2421
2422#ifdef CONFIG_MT9E013
2423static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2424 .mount_angle = 90
2425};
2426
2427static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2428 .flash_type = MSM_CAMERA_FLASH_LED,
2429 .flash_src = &msm_flash_src
2430};
2431
2432static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2433 .sensor_name = "mt9e013",
2434 .sensor_reset = 0,
2435 .sensor_reset_enable = 1,
2436 .sensor_pwd = 85,
2437 .vcm_pwd = 1,
2438 .vcm_enable = 0,
2439 .pdata = &msm_camera_device_data_rear,
2440 .flash_data = &flash_mt9e013,
2441 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2442 .csi_if = 1
2443};
2444
2445static struct platform_device msm_camera_sensor_mt9e013 = {
2446 .name = "msm_camera_mt9e013",
2447 .dev = {
2448 .platform_data = &msm_camera_sensor_mt9e013_data,
2449 },
2450};
2451#endif
2452
2453static struct i2c_board_info i2c_camera_devices[] = {
2454 #ifdef CONFIG_S5K4E1
2455 {
2456 I2C_BOARD_INFO("s5k4e1", 0x36),
2457 },
2458 {
2459 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2460 },
2461 #endif
2462 #ifdef CONFIG_WEBCAM_OV9726
2463 {
2464 I2C_BOARD_INFO("ov9726", 0x10),
2465 },
2466 #endif
2467 #ifdef CONFIG_IMX072
2468 {
2469 I2C_BOARD_INFO("imx072", 0x34),
2470 },
2471 #endif
2472 #ifdef CONFIG_MT9E013
2473 {
2474 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2475 },
2476 #endif
2477 {
2478 I2C_BOARD_INFO("sc628a", 0x37),
2479 },
2480};
2481#endif
2482#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2483 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2484static struct msm_gpio uart2dm_gpios[] = {
2485 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2486 "uart2dm_rfr_n" },
2487 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2488 "uart2dm_cts_n" },
2489 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2490 "uart2dm_rx" },
2491 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2492 "uart2dm_tx" },
2493};
2494
2495static void msm7x27a_cfg_uart2dm_serial(void)
2496{
2497 int ret;
2498 ret = msm_gpios_request_enable(uart2dm_gpios,
2499 ARRAY_SIZE(uart2dm_gpios));
2500 if (ret)
2501 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2502}
2503#else
2504static void msm7x27a_cfg_uart2dm_serial(void) { }
2505#endif
2506
2507static struct platform_device *rumi_sim_devices[] __initdata = {
2508 &msm_device_dmov,
2509 &msm_device_smd,
2510 &smc91x_device,
2511 &msm_device_uart1,
2512 &msm_device_nand,
2513 &msm_device_uart_dm1,
2514 &msm_gsbi0_qup_i2c_device,
2515 &msm_gsbi1_qup_i2c_device,
2516};
2517
2518static struct platform_device *surf_ffa_devices[] __initdata = {
2519 &msm_device_dmov,
2520 &msm_device_smd,
2521 &msm_device_uart1,
2522 &msm_device_uart_dm1,
2523 &msm_device_uart_dm2,
2524 &msm_device_nand,
2525 &msm_gsbi0_qup_i2c_device,
2526 &msm_gsbi1_qup_i2c_device,
2527 &msm_device_otg,
2528 &msm_device_gadget_peripheral,
2529 &android_usb_device,
2530 &android_pmem_device,
2531 &android_pmem_adsp_device,
2532 &android_pmem_audio_device,
2533 &msm_device_snd,
2534 &msm_device_adspdec,
2535 &msm_fb_device,
2536 &lcdc_toshiba_panel_device,
2537 &msm_batt_device,
2538 &smsc911x_device,
2539#ifdef CONFIG_S5K4E1
2540 &msm_camera_sensor_s5k4e1,
2541#endif
2542#ifdef CONFIG_IMX072
2543 &msm_camera_sensor_imx072,
2544#endif
2545#ifdef CONFIG_WEBCAM_OV9726
2546 &msm_camera_sensor_ov9726,
2547#endif
2548#ifdef CONFIG_MT9E013
2549 &msm_camera_sensor_mt9e013,
2550#endif
2551#ifdef CONFIG_FB_MSM_MIPI_DSI
2552 &mipi_dsi_renesas_panel_device,
2553#endif
2554 &msm_kgsl_3d0,
2555#ifdef CONFIG_BT
2556 &msm_bt_power_device,
2557#endif
2558};
2559
2560static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2561static int __init pmem_kernel_ebi1_size_setup(char *p)
2562{
2563 pmem_kernel_ebi1_size = memparse(p, NULL);
2564 return 0;
2565}
2566early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2567
2568static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2569static int __init pmem_audio_size_setup(char *p)
2570{
2571 pmem_audio_size = memparse(p, NULL);
2572 return 0;
2573}
2574early_param("pmem_audio_size", pmem_audio_size_setup);
2575
2576static void __init msm_msm7x2x_allocate_memory_regions(void)
2577{
2578 void *addr;
2579 unsigned long size;
2580
2581 size = fb_size ? : MSM_FB_SIZE;
2582 addr = alloc_bootmem_align(size, 0x1000);
2583 msm_fb_resources[0].start = __pa(addr);
2584 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2585 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2586 size, addr, __pa(addr));
2587}
2588
2589static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2590 [MEMTYPE_SMI] = {
2591 },
2592 [MEMTYPE_EBI0] = {
2593 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2594 },
2595 [MEMTYPE_EBI1] = {
2596 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2597 },
2598};
2599
2600static void __init size_pmem_devices(void)
2601{
2602#ifdef CONFIG_ANDROID_PMEM
2603 android_pmem_adsp_pdata.size = pmem_adsp_size;
2604 android_pmem_pdata.size = pmem_mdp_size;
2605 android_pmem_audio_pdata.size = pmem_audio_size;
2606#endif
2607}
2608
2609static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2610{
2611 msm7x27a_reserve_table[p->memory_type].size += p->size;
2612}
2613
2614static void __init reserve_pmem_memory(void)
2615{
2616#ifdef CONFIG_ANDROID_PMEM
2617 reserve_memory_for(&android_pmem_adsp_pdata);
2618 reserve_memory_for(&android_pmem_pdata);
2619 reserve_memory_for(&android_pmem_audio_pdata);
2620 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2621#endif
2622}
2623
2624static void __init msm7x27a_calculate_reserve_sizes(void)
2625{
2626 size_pmem_devices();
2627 reserve_pmem_memory();
2628}
2629
2630static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2631{
2632 return MEMTYPE_EBI1;
2633}
2634
2635static struct reserve_info msm7x27a_reserve_info __initdata = {
2636 .memtype_reserve_table = msm7x27a_reserve_table,
2637 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2638 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2639};
2640
2641static void __init msm7x27a_reserve(void)
2642{
2643 reserve_info = &msm7x27a_reserve_info;
2644 msm_reserve();
2645}
2646
2647static void __init msm_device_i2c_init(void)
2648{
2649 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2650 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2651}
2652
2653static struct msm_panel_common_pdata mdp_pdata = {
2654 .gpio = 97,
2655 .mdp_rev = MDP_REV_303,
2656};
2657
2658#define GPIO_LCDC_BRDG_PD 128
2659#define GPIO_LCDC_BRDG_RESET_N 129
2660
2661#define LCDC_RESET_PHYS 0x90008014
2662static void __iomem *lcdc_reset_ptr;
2663
2664static unsigned mipi_dsi_gpio[] = {
2665 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2666 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2667 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2668 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2669};
2670
2671enum {
2672 DSI_SINGLE_LANE = 1,
2673 DSI_TWO_LANES,
2674};
2675
2676static int msm_fb_get_lane_config(void)
2677{
2678 int rc = DSI_TWO_LANES;
2679
2680 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2681 rc = DSI_SINGLE_LANE;
2682 pr_info("DSI Single Lane\n");
2683 } else {
2684 pr_info("DSI Two Lanes\n");
2685 }
2686 return rc;
2687}
2688
2689static int msm_fb_dsi_client_reset(void)
2690{
2691 int rc = 0;
2692
2693 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2694 if (rc < 0) {
2695 pr_err("failed to request lcd brdg reset_n\n");
2696 return rc;
2697 }
2698
2699 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2700 if (rc < 0) {
2701 pr_err("failed to request lcd brdg pd\n");
2702 return rc;
2703 }
2704
2705 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2706 if (rc) {
2707 pr_err("Failed to enable LCDC Bridge reset enable\n");
2708 goto gpio_error;
2709 }
2710
2711 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2712 if (rc) {
2713 pr_err("Failed to enable LCDC Bridge pd enable\n");
2714 goto gpio_error2;
2715 }
2716
2717 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2718 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2719 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2720
2721 if (!rc) {
2722 if (machine_is_msm7x27a_surf()) {
2723 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2724 sizeof(uint32_t));
2725
2726 if (!lcdc_reset_ptr)
2727 return 0;
2728 }
2729 return rc;
2730 } else {
2731 goto gpio_error;
2732 }
2733
2734gpio_error2:
2735 pr_err("Failed GPIO bridge pd\n");
2736 gpio_free(GPIO_LCDC_BRDG_PD);
2737
2738gpio_error:
2739 pr_err("Failed GPIO bridge reset\n");
2740 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2741 return rc;
2742}
2743
2744static const char * const msm_fb_dsi_vreg[] = {
2745 "gp2",
2746 "msme1",
2747};
2748
2749static const int msm_fb_dsi_vreg_mV[] = {
2750 2850,
2751 1800,
2752};
2753
2754static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2755static int dsi_gpio_initialized;
2756
2757static int mipi_dsi_panel_power(int on)
2758{
2759 int i, rc = 0;
2760 uint32_t lcdc_reset_cfg;
2761
2762 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2763 if (!dsi_gpio_initialized) {
2764 pmapp_disp_backlight_init();
2765
2766 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2767 if (rc < 0) {
2768 pr_err("failed to request gpio_disp_pwr\n");
2769 return rc;
2770 }
2771
2772 if (machine_is_msm7x27a_surf()) {
2773 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2774 if (rc < 0) {
2775 pr_err("failed to enable display pwr\n");
2776 goto fail_gpio1;
2777 }
2778
2779 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2780 if (rc < 0) {
2781 pr_err("failed to request gpio_bkl_en\n");
2782 goto fail_gpio1;
2783 }
2784
2785 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2786 if (rc < 0) {
2787 pr_err("failed to enable backlight\n");
2788 goto fail_gpio2;
2789 }
2790 }
2791
2792 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2793 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2794
2795 if (IS_ERR(dsi_vreg[i])) {
2796 pr_err("%s: vreg get failed with : (%ld)\n",
2797 __func__, PTR_ERR(dsi_vreg[i]));
2798 goto fail_gpio2;
2799 }
2800
2801 rc = vreg_set_level(dsi_vreg[i],
2802 msm_fb_dsi_vreg_mV[i]);
2803
2804 if (rc < 0) {
2805 pr_err("%s: set regulator level failed "
2806 "with :(%d)\n", __func__, rc);
2807 goto vreg_fail1;
2808 }
2809 }
2810 dsi_gpio_initialized = 1;
2811 }
2812
2813 if (machine_is_msm7x27a_surf()) {
2814 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2815 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2816 } else if (machine_is_msm7x27a_ffa()) {
2817 if (on) {
2818 /* This line drives an active low pin on FFA */
2819 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2820 !on);
2821 if (rc < 0)
2822 pr_err("failed to set direction for "
2823 "display pwr\n");
2824 } else {
2825 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2826 !on);
2827 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2828 if (rc < 0)
2829 pr_err("failed to set direction for "
2830 "display pwr\n");
2831 }
2832 }
2833
2834 if (on) {
2835 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2836
2837 if (machine_is_msm7x27a_surf()) {
2838 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2839 rmb();
2840 lcdc_reset_cfg &= ~1;
2841
2842 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2843 msleep(20);
2844 wmb();
2845 lcdc_reset_cfg |= 1;
2846 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2847 } else {
2848 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2849 0);
2850 msleep(20);
2851 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2852 1);
2853 }
2854
2855 if (pmapp_disp_backlight_set_brightness(100))
2856 pr_err("backlight set brightness failed\n");
2857 } else {
2858 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2859
2860 if (pmapp_disp_backlight_set_brightness(0))
2861 pr_err("backlight set brightness failed\n");
2862 }
2863
2864 /*Configure vreg lines */
2865 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2866 if (on) {
2867 rc = vreg_enable(dsi_vreg[i]);
2868
2869 if (rc) {
2870 printk(KERN_ERR "vreg_enable: %s vreg"
2871 "operation failed\n",
2872 msm_fb_dsi_vreg[i]);
2873
2874 goto vreg_fail2;
2875 }
2876 } else {
2877 rc = vreg_disable(dsi_vreg[i]);
2878
2879 if (rc) {
2880 printk(KERN_ERR "vreg_disable: %s vreg "
2881 "operation failed\n",
2882 msm_fb_dsi_vreg[i]);
2883 goto vreg_fail2;
2884 }
2885 }
2886 }
2887
2888 return rc;
2889
2890vreg_fail2:
2891 if (on) {
2892 for (; i > 0; i--)
2893 vreg_disable(dsi_vreg[i - 1]);
2894 } else {
2895 for (; i > 0; i--)
2896 vreg_enable(dsi_vreg[i - 1]);
2897 }
2898
2899 return rc;
2900
2901vreg_fail1:
2902 for (; i > 0; i--)
2903 vreg_put(dsi_vreg[i - 1]);
2904
2905fail_gpio2:
2906 gpio_free(GPIO_BACKLIGHT_EN);
2907fail_gpio1:
2908 gpio_free(GPIO_DISPLAY_PWR_EN);
2909 dsi_gpio_initialized = 0;
2910 return rc;
2911}
2912
2913#define MDP_303_VSYNC_GPIO 97
2914
2915#ifdef CONFIG_FB_MSM_MDP303
2916static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2917 .vsync_gpio = MDP_303_VSYNC_GPIO,
2918 .dsi_power_save = mipi_dsi_panel_power,
2919 .dsi_client_reset = msm_fb_dsi_client_reset,
2920 .get_lane_config = msm_fb_get_lane_config,
2921};
2922#endif
2923
2924static void __init msm_fb_add_devices(void)
2925{
2926 msm_fb_register_device("mdp", &mdp_pdata);
2927 msm_fb_register_device("lcdc", &lcdc_pdata);
2928 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2929}
2930
2931#define MSM_EBI2_PHYS 0xa0d00000
2932#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2933
2934static void __init msm7x27a_init_ebi2(void)
2935{
2936 uint32_t ebi2_cfg;
2937 void __iomem *ebi2_cfg_ptr;
2938
2939 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2940 if (!ebi2_cfg_ptr)
2941 return;
2942
2943 ebi2_cfg = readl(ebi2_cfg_ptr);
2944 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2945 ebi2_cfg |= (1 << 4); /* CS2 */
2946
2947 writel(ebi2_cfg, ebi2_cfg_ptr);
2948 iounmap(ebi2_cfg_ptr);
2949
2950 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2951 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2952 sizeof(uint32_t));
2953 if (!ebi2_cfg_ptr)
2954 return;
2955
2956 ebi2_cfg = readl(ebi2_cfg_ptr);
2957 if (machine_is_msm7x27a_surf())
2958 ebi2_cfg |= (1 << 31);
2959
2960 writel(ebi2_cfg, ebi2_cfg_ptr);
2961 iounmap(ebi2_cfg_ptr);
2962}
2963
2964#define ATMEL_TS_I2C_NAME "maXTouch"
2965static struct vreg *vreg_l12;
2966static struct vreg *vreg_s3;
2967
2968#define ATMEL_TS_GPIO_IRQ 82
2969
2970static int atmel_ts_power_on(bool on)
2971{
2972 int rc;
2973
2974 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2975 if (rc) {
2976 pr_err("%s: vreg %sable failed (%d)\n",
2977 __func__, on ? "en" : "dis", rc);
2978 return rc;
2979 }
2980
2981 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2982 if (rc) {
2983 pr_err("%s: vreg %sable failed (%d) for S3\n",
2984 __func__, on ? "en" : "dis", rc);
2985 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2986 return rc;
2987 }
2988 /* vreg stabilization delay */
2989 msleep(50);
2990 return 0;
2991}
2992
2993static int atmel_ts_platform_init(struct i2c_client *client)
2994{
2995 int rc;
2996
2997 vreg_l12 = vreg_get(NULL, "gp2");
2998 if (IS_ERR(vreg_l12)) {
2999 pr_err("%s: vreg_get for L2 failed\n", __func__);
3000 return PTR_ERR(vreg_l12);
3001 }
3002
3003 rc = vreg_set_level(vreg_l12, 2850);
3004 if (rc) {
3005 pr_err("%s: vreg set level failed (%d) for l2\n",
3006 __func__, rc);
3007 goto vreg_put_l2;
3008 }
3009
3010 vreg_s3 = vreg_get(NULL, "msme1");
3011 if (IS_ERR(vreg_s3)) {
3012 pr_err("%s: vreg_get for S3 failed\n", __func__);
3013 rc = PTR_ERR(vreg_s3);
3014 goto vreg_put_l2;
3015 }
3016
3017 rc = vreg_set_level(vreg_s3, 1800);
3018 if (rc) {
3019 pr_err("%s: vreg set level failed (%d) for S3\n",
3020 __func__, rc);
3021 goto vreg_put_s3;
3022 }
3023
3024 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3025 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
3026 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
3027 if (rc) {
3028 pr_err("%s: gpio_tlmm_config for %d failed\n",
3029 __func__, ATMEL_TS_GPIO_IRQ);
3030 goto vreg_put_s3;
3031 }
3032
3033 /* configure touchscreen interrupt gpio */
3034 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3035 if (rc) {
3036 pr_err("%s: unable to request gpio %d\n",
3037 __func__, ATMEL_TS_GPIO_IRQ);
3038 goto ts_gpio_tlmm_unconfig;
3039 }
3040
3041 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3042 if (rc < 0) {
3043 pr_err("%s: unable to set the direction of gpio %d\n",
3044 __func__, ATMEL_TS_GPIO_IRQ);
3045 goto free_ts_gpio;
3046 }
3047 return 0;
3048
3049free_ts_gpio:
3050 gpio_free(ATMEL_TS_GPIO_IRQ);
3051ts_gpio_tlmm_unconfig:
3052 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3053 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3054 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3055vreg_put_s3:
3056 vreg_put(vreg_s3);
3057vreg_put_l2:
3058 vreg_put(vreg_l12);
3059 return rc;
3060}
3061
3062static int atmel_ts_platform_exit(struct i2c_client *client)
3063{
3064 gpio_free(ATMEL_TS_GPIO_IRQ);
3065 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3066 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3067 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3068 vreg_disable(vreg_s3);
3069 vreg_put(vreg_s3);
3070 vreg_disable(vreg_l12);
3071 vreg_put(vreg_l12);
3072 return 0;
3073}
3074
3075static u8 atmel_ts_read_chg(void)
3076{
3077 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3078}
3079
3080static u8 atmel_ts_valid_interrupt(void)
3081{
3082 return !atmel_ts_read_chg();
3083}
3084
3085#define ATMEL_X_OFFSET 13
3086#define ATMEL_Y_OFFSET 0
3087
3088static struct mxt_platform_data atmel_ts_pdata = {
3089 .numtouch = 4,
3090 .init_platform_hw = atmel_ts_platform_init,
3091 .exit_platform_hw = atmel_ts_platform_exit,
3092 .power_on = atmel_ts_power_on,
3093 .display_res_x = 480,
3094 .display_res_y = 864,
3095 .min_x = ATMEL_X_OFFSET,
3096 .max_x = (505 - ATMEL_X_OFFSET),
3097 .min_y = ATMEL_Y_OFFSET,
3098 .max_y = (863 - ATMEL_Y_OFFSET),
3099 .valid_interrupt = atmel_ts_valid_interrupt,
3100 .read_chg = atmel_ts_read_chg,
3101};
3102
3103static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3104 {
3105 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3106 .platform_data = &atmel_ts_pdata,
3107 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3108 },
3109};
3110
3111#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3112
3113static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3114static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3115
3116static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3117 ARRAY_SIZE(kp_row_gpios)] = {
3118 [KP_INDEX(0, 0)] = KEY_7,
3119 [KP_INDEX(0, 1)] = KEY_DOWN,
3120 [KP_INDEX(0, 2)] = KEY_UP,
3121 [KP_INDEX(0, 3)] = KEY_RIGHT,
3122 [KP_INDEX(0, 4)] = KEY_ENTER,
3123
3124 [KP_INDEX(1, 0)] = KEY_LEFT,
3125 [KP_INDEX(1, 1)] = KEY_SEND,
3126 [KP_INDEX(1, 2)] = KEY_1,
3127 [KP_INDEX(1, 3)] = KEY_4,
3128 [KP_INDEX(1, 4)] = KEY_CLEAR,
3129
3130 [KP_INDEX(2, 0)] = KEY_6,
3131 [KP_INDEX(2, 1)] = KEY_5,
3132 [KP_INDEX(2, 2)] = KEY_8,
3133 [KP_INDEX(2, 3)] = KEY_3,
3134 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3135
3136 [KP_INDEX(3, 0)] = KEY_9,
3137 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3138 [KP_INDEX(3, 2)] = KEY_0,
3139 [KP_INDEX(3, 3)] = KEY_2,
3140 [KP_INDEX(3, 4)] = KEY_SLEEP,
3141
3142 [KP_INDEX(4, 0)] = KEY_BACK,
3143 [KP_INDEX(4, 1)] = KEY_HOME,
3144 [KP_INDEX(4, 2)] = KEY_MENU,
3145 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3146 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3147};
3148
3149/* SURF keypad platform device information */
3150static struct gpio_event_matrix_info kp_matrix_info = {
3151 .info.func = gpio_event_matrix_func,
3152 .keymap = keymap,
3153 .output_gpios = kp_row_gpios,
3154 .input_gpios = kp_col_gpios,
3155 .noutputs = ARRAY_SIZE(kp_row_gpios),
3156 .ninputs = ARRAY_SIZE(kp_col_gpios),
3157 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3158 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3159 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3160 GPIOKPF_PRINT_UNMAPPED_KEYS,
3161};
3162
3163static struct gpio_event_info *kp_info[] = {
3164 &kp_matrix_info.info
3165};
3166
3167static struct gpio_event_platform_data kp_pdata = {
3168 .name = "7x27a_kp",
3169 .info = kp_info,
3170 .info_count = ARRAY_SIZE(kp_info)
3171};
3172
3173static struct platform_device kp_pdev = {
3174 .name = GPIO_EVENT_DEV_NAME,
3175 .id = -1,
3176 .dev = {
3177 .platform_data = &kp_pdata,
3178 },
3179};
3180
3181static struct msm_handset_platform_data hs_platform_data = {
3182 .hs_name = "7k_handset",
3183 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3184};
3185
3186static struct platform_device hs_pdev = {
3187 .name = "msm-handset",
3188 .id = -1,
3189 .dev = {
3190 .platform_data = &hs_platform_data,
3191 },
3192};
3193
3194#define LED_GPIO_PDM 96
3195#define UART1DM_RX_GPIO 45
3196static void __init msm7x2x_init(void)
3197{
3198
3199 /* Common functions for SURF/FFA/RUMI3 */
3200 msm_device_i2c_init();
3201 msm7x27a_init_mmc();
3202 msm7x27a_init_ebi2();
3203 msm7x27a_cfg_uart2dm_serial();
3204#ifdef CONFIG_SERIAL_MSM_HS
3205 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3206 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3207#endif
3208
3209 if (machine_is_msm7x27a_rumi3()) {
3210 platform_add_devices(rumi_sim_devices,
3211 ARRAY_SIZE(rumi_sim_devices));
3212 }
3213 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3214#ifdef CONFIG_USB_MSM_OTG_72K
3215 msm_otg_pdata.swfi_latency =
3216 msm7x27a_pm_data
3217 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3218 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3219#endif
3220 msm_device_gadget_peripheral.dev.platform_data =
3221 &msm_gadget_pdata;
3222 msm7x27a_cfg_smsc911x();
3223 platform_add_devices(msm_footswitch_devices,
3224 msm_num_footswitch_devices);
3225 platform_add_devices(surf_ffa_devices,
3226 ARRAY_SIZE(surf_ffa_devices));
3227 msm_fb_add_devices();
3228#ifdef CONFIG_USB_EHCI_MSM_72K
3229 msm7x2x_init_host();
3230#endif
3231 }
3232
3233 msm_pm_set_platform_data(msm7x27a_pm_data,
3234 ARRAY_SIZE(msm7x27a_pm_data));
3235
3236#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3237 register_i2c_devices();
3238#endif
3239#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3240 bt_power_init();
3241#endif
3242 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3243 atmel_ts_pdata.min_x = 0;
3244 atmel_ts_pdata.max_x = 480;
3245 atmel_ts_pdata.min_y = 0;
3246 atmel_ts_pdata.max_y = 320;
3247 }
3248
3249 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3250 atmel_ts_i2c_info,
3251 ARRAY_SIZE(atmel_ts_i2c_info));
3252
3253 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3254 i2c_camera_devices,
3255 ARRAY_SIZE(i2c_camera_devices));
3256 platform_device_register(&kp_pdev);
3257 platform_device_register(&hs_pdev);
3258
3259 /* configure it as a pdm function*/
3260 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3261 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3262 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3263 pr_err("%s: gpio_tlmm_config for %d failed\n",
3264 __func__, LED_GPIO_PDM);
3265 else
3266 platform_device_register(&led_pdev);
3267
3268#ifdef CONFIG_MSM_RPC_VIBRATOR
3269 if (machine_is_msm7x27a_ffa())
3270 msm_init_pmic_vibrator();
3271#endif
3272 /*7x25a kgsl initializations*/
3273 msm7x25a_kgsl_3d0_init();
3274}
3275
3276static void __init msm7x2x_init_early(void)
3277{
3278 msm7x2x_misc_init();
3279 msm_msm7x2x_allocate_memory_regions();
3280}
3281
3282MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3283 .boot_params = PHYS_OFFSET + 0x100,
3284 .map_io = msm_common_io_init,
3285 .reserve = msm7x27a_reserve,
3286 .init_irq = msm_init_irq,
3287 .init_machine = msm7x2x_init,
3288 .timer = &msm_timer,
3289 .init_early = msm7x2x_init_early,
3290MACHINE_END
3291MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3292 .boot_params = PHYS_OFFSET + 0x100,
3293 .map_io = msm_common_io_init,
3294 .reserve = msm7x27a_reserve,
3295 .init_irq = msm_init_irq,
3296 .init_machine = msm7x2x_init,
3297 .timer = &msm_timer,
3298 .init_early = msm7x2x_init_early,
3299MACHINE_END
3300MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3301 .boot_params = PHYS_OFFSET + 0x100,
3302 .map_io = msm_common_io_init,
3303 .reserve = msm7x27a_reserve,
3304 .init_irq = msm_init_irq,
3305 .init_machine = msm7x2x_init,
3306 .timer = &msm_timer,
3307 .init_early = msm7x2x_init_early,
3308MACHINE_END