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Praveen Chidambaramf27a5152013-02-01 11:44:53 -07001/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/cpuidle.h>
Ashwin Chaugule464983a2011-11-21 14:51:51 -050017#include <linux/cpu_pm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080019#include <mach/cpuidle.h>
Matt Wagantall7cca4642012-02-01 16:43:24 -080020
21#include "pm.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022
23static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuidle_device, msm_cpuidle_devs);
Steve Mucklef132c6c2012-06-06 18:30:57 -070024
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025static struct cpuidle_driver msm_cpuidle_driver = {
26 .name = "msm_idle",
27 .owner = THIS_MODULE,
28};
29
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060030static struct msm_cpuidle_state msm_cstates[] = {
31 {0, 0, "C0", "WFI",
32 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
33
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060034 {0, 1, "C1", "RETENTION",
35 MSM_PM_SLEEP_MODE_RETENTION},
36
37 {0, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060038 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
39
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060040 {0, 3, "C3", "POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060041 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
42
43 {1, 0, "C0", "WFI",
44 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
45
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060046 {1, 1, "C1", "RETENTION",
47 MSM_PM_SLEEP_MODE_RETENTION},
48
49 {1, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060050 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
51
52 {2, 0, "C0", "WFI",
53 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
54
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060055 {2, 1, "C1", "RETENTION",
56 MSM_PM_SLEEP_MODE_RETENTION},
57
58 {2, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060059 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
60
61 {3, 0, "C0", "WFI",
62 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
63
Praveen Chidambaramd3d844d2012-04-24 09:47:38 -060064 {3, 1, "C1", "RETENTION",
65 MSM_PM_SLEEP_MODE_RETENTION},
66
67 {3, 2, "C2", "STANDALONE_POWER_COLLAPSE",
Praveen Chidambaram42da9d22012-03-30 12:16:34 -060068 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
69};
70
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070071static int msm_cpuidle_enter(
Steve Mucklef132c6c2012-06-06 18:30:57 -070072 struct cpuidle_device *dev, struct cpuidle_driver *drv, int index)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070073{
Steve Mucklef132c6c2012-06-06 18:30:57 -070074 int ret = 0;
Priyanka Mathur92fe5752013-01-17 10:58:04 -080075 int i;
Steve Mucklef132c6c2012-06-06 18:30:57 -070076 enum msm_pm_sleep_mode pm_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070077
Ashwin Chaugule464983a2011-11-21 14:51:51 -050078 cpu_pm_enter();
Mahesh Sivasubramanian95a48e72013-02-15 14:23:26 -070079
Priyanka Mathur92fe5752013-01-17 10:58:04 -080080 pm_mode = msm_pm_idle_enter(dev, drv, index);
81
Steve Mucklef132c6c2012-06-06 18:30:57 -070082 for (i = 0; i < dev->state_count; i++) {
Priyanka Mathur92fe5752013-01-17 10:58:04 -080083 struct cpuidle_state_usage *st_usage = &dev->states_usage[i];
84 enum msm_pm_sleep_mode last_mode =
85 (enum msm_pm_sleep_mode)cpuidle_get_statedata(st_usage);
86
87 if (last_mode == pm_mode) {
Steve Mucklef132c6c2012-06-06 18:30:57 -070088 ret = i;
89 break;
90 }
91 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070092
Ashwin Chaugule464983a2011-11-21 14:51:51 -050093 cpu_pm_exit();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070094 local_irq_enable();
95
96 return ret;
97}
98
Praveen Chidambaramf27a5152013-02-01 11:44:53 -070099static void __devinit msm_cpuidle_set_states(void)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700100{
Steve Mucklef132c6c2012-06-06 18:30:57 -0700101 int i = 0;
102 int state_count = 0;
103 struct msm_cpuidle_state *cstate = NULL;
104 struct cpuidle_state *state = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700105
Steve Mucklef132c6c2012-06-06 18:30:57 -0700106 for (i = 0; i < ARRAY_SIZE(msm_cstates); i++) {
107 cstate = &msm_cstates[i];
108 /* We have an asymmetric CPU C-State in MSMs.
109 * The primary CPU can do PC while all secondary cpus
110 * can only do standalone PC as part of their idle LPM.
111 * However, the secondary cpus can do PC when hotplugged
112 * We do not care about the hotplug here.
113 * Register the C-States available for Core0.
114 */
115 if (cstate->cpu)
116 continue;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700117
Steve Mucklef132c6c2012-06-06 18:30:57 -0700118 state = &msm_cpuidle_driver.states[state_count];
119 snprintf(state->name, CPUIDLE_NAME_LEN, cstate->name);
120 snprintf(state->desc, CPUIDLE_DESC_LEN, cstate->desc);
121 state->flags = 0;
122 state->exit_latency = 0;
123 state->power_usage = 0;
124 state->target_residency = 0;
125 state->enter = msm_cpuidle_enter;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700126
Steve Mucklef132c6c2012-06-06 18:30:57 -0700127 state_count++;
128 BUG_ON(state_count >= CPUIDLE_STATE_MAX);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700129 }
Steve Mucklef132c6c2012-06-06 18:30:57 -0700130 msm_cpuidle_driver.state_count = state_count;
131 msm_cpuidle_driver.safe_state_index = 0;
132}
133
134static void __init msm_cpuidle_set_cpu_statedata(struct cpuidle_device *dev)
135{
136 int i = 0;
137 int state_count = 0;
138 struct cpuidle_state_usage *st_usage = NULL;
139 struct msm_cpuidle_state *cstate = NULL;
140
141 for (i = 0; i < ARRAY_SIZE(msm_cstates); i++) {
142 cstate = &msm_cstates[i];
143 if (cstate->cpu != dev->cpu)
144 continue;
145
146 st_usage = &dev->states_usage[state_count];
147 cpuidle_set_statedata(st_usage, (void *)cstate->mode_nr);
148 state_count++;
149 BUG_ON(state_count > msm_cpuidle_driver.state_count);
150 }
151
152 dev->state_count = state_count; /* Per cpu state count */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700153}
154
Praveen Chidambaramf27a5152013-02-01 11:44:53 -0700155int __devinit msm_cpuidle_init(void)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700156{
Steve Mucklef132c6c2012-06-06 18:30:57 -0700157 unsigned int cpu = 0;
158 int ret = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700159
Praveen Chidambaram42da9d22012-03-30 12:16:34 -0600160 msm_cpuidle_set_states();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700161 ret = cpuidle_register_driver(&msm_cpuidle_driver);
162 if (ret)
163 pr_err("%s: failed to register cpuidle driver: %d\n",
164 __func__, ret);
165
166 for_each_possible_cpu(cpu) {
167 struct cpuidle_device *dev = &per_cpu(msm_cpuidle_devs, cpu);
168
Steve Mucklef132c6c2012-06-06 18:30:57 -0700169 dev->cpu = cpu;
170 msm_cpuidle_set_cpu_statedata(dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700171 ret = cpuidle_register_device(dev);
172 if (ret) {
173 pr_err("%s: failed to register cpuidle device for "
174 "cpu %u: %d\n", __func__, cpu, ret);
175 return ret;
176 }
177 }
178
179 return 0;
180}