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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/bootmem.h>
18#include <asm/mach-types.h>
19#include <mach/msm_bus_board.h>
Huaibin Yanga5419422011-12-08 23:52:10 -080020#include <mach/msm_memtypes.h>
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080021#include <mach/board.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Ajay Dudani9114be72011-12-03 07:46:35 -080024#include <mach/socinfo.h>
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -080025#include <linux/ion.h>
26#include <mach/ion.h>
27
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080028#include "devices.h"
Jay Chokshi06fa7542011-12-07 13:09:17 -080029
30/* TODO: Remove this once PM8038 physically becomes
31 * available.
32 */
33#ifndef MSM8930_PHASE_2
34#include "board-8960.h"
35#else
Stepan Moskovchenko5a83dba2011-12-05 17:30:17 -080036#include "board-8930.h"
Jay Chokshi06fa7542011-12-07 13:09:17 -080037#endif
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080038
39#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
40#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
41#else
42#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
43#endif
44
45#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
46#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
47#elif defined(CONFIG_FB_MSM_TVOUT)
48#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
49#else
50#define MSM_FB_EXT_BUF_SIZE 0
51#endif
52
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080053#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
54/* 4 bpp x 2 page HDMI case */
55#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
56#else
57/* Note: must be multiple of 4096 */
Huaibin Yang27634b82011-12-09 00:16:25 -080058#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE, 4096)
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080059#endif
60
Huaibin Yanga5419422011-12-08 23:52:10 -080061#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
62#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
63#else
64#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
65#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
66
67#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
68#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
69#else
70#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
71#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
72
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080073#define MDP_VSYNC_GPIO 0
74
75#define PANEL_NAME_MAX_LEN 30
76#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
77#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
78#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
79#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
80#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
81#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
82#define HDMI_PANEL_NAME "hdmi_msm"
83#define TVOUT_PANEL_NAME "tvout_msm"
84
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080085static struct resource msm_fb_resources[] = {
86 {
87 .flags = IORESOURCE_DMA,
88 }
89};
90
91static int msm_fb_detect_panel(const char *name)
92{
93 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
94 strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
95 PANEL_NAME_MAX_LEN)))
96 return 0;
97
98#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
99 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
100 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
101 PANEL_NAME_MAX_LEN)))
102 return 0;
103
104 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
105 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
106 PANEL_NAME_MAX_LEN)))
107 return 0;
108
109 if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
110 strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
111 PANEL_NAME_MAX_LEN)))
112 return 0;
113
114 if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
115 strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
116 PANEL_NAME_MAX_LEN)))
117 return 0;
118#endif
119
120 if (!strncmp(name, HDMI_PANEL_NAME,
121 strnlen(HDMI_PANEL_NAME,
122 PANEL_NAME_MAX_LEN)))
123 return 0;
124
125 if (!strncmp(name, TVOUT_PANEL_NAME,
126 strnlen(TVOUT_PANEL_NAME,
127 PANEL_NAME_MAX_LEN)))
128 return 0;
129
130 pr_warning("%s: not supported '%s'", __func__, name);
131 return -ENODEV;
132}
133
134static struct msm_fb_platform_data msm_fb_pdata = {
135 .detect_client = msm_fb_detect_panel,
136};
137
138static struct platform_device msm_fb_device = {
139 .name = "msm_fb",
140 .id = 0,
141 .num_resources = ARRAY_SIZE(msm_fb_resources),
142 .resource = msm_fb_resources,
143 .dev.platform_data = &msm_fb_pdata,
144};
145
146static bool dsi_power_on;
147
Jay Chokshi06fa7542011-12-07 13:09:17 -0800148/*
149 * TODO: When physical 8930/PM8038 hardware becomes
150 * available, replace mipi_dsi_cdp_panel_power with
151 * appropriate function.
152 */
153#ifndef MSM8930_PHASE_2
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800154static int mipi_dsi_cdp_panel_power(int on)
155{
156 static struct regulator *reg_l8, *reg_l23, *reg_l2;
157 static int gpio43;
158 int rc;
159
160 pr_info("%s: state : %d\n", __func__, on);
161
162 if (!dsi_power_on) {
163
164 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
165 "dsi_vdc");
166 if (IS_ERR(reg_l8)) {
167 pr_err("could not get 8921_l8, rc = %ld\n",
168 PTR_ERR(reg_l8));
169 return -ENODEV;
170 }
171 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
172 "dsi_vddio");
173 if (IS_ERR(reg_l23)) {
174 pr_err("could not get 8921_l23, rc = %ld\n",
175 PTR_ERR(reg_l23));
176 return -ENODEV;
177 }
178 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
179 "dsi_vdda");
180 if (IS_ERR(reg_l2)) {
181 pr_err("could not get 8921_l2, rc = %ld\n",
182 PTR_ERR(reg_l2));
183 return -ENODEV;
184 }
185 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
186 if (rc) {
187 pr_err("set_voltage l8 failed, rc=%d\n", rc);
188 return -EINVAL;
189 }
190 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
191 if (rc) {
192 pr_err("set_voltage l23 failed, rc=%d\n", rc);
193 return -EINVAL;
194 }
195 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
196 if (rc) {
197 pr_err("set_voltage l2 failed, rc=%d\n", rc);
198 return -EINVAL;
199 }
200 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
201 rc = gpio_request(gpio43, "disp_rst_n");
202 if (rc) {
203 pr_err("request gpio 43 failed, rc=%d\n", rc);
204 return -ENODEV;
205 }
206 dsi_power_on = true;
207 }
208 if (on) {
209 rc = regulator_set_optimum_mode(reg_l8, 100000);
210 if (rc < 0) {
211 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
212 return -EINVAL;
213 }
214 rc = regulator_set_optimum_mode(reg_l23, 100000);
215 if (rc < 0) {
216 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
217 return -EINVAL;
218 }
219 rc = regulator_set_optimum_mode(reg_l2, 100000);
220 if (rc < 0) {
221 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
222 return -EINVAL;
223 }
224 rc = regulator_enable(reg_l8);
225 if (rc) {
226 pr_err("enable l8 failed, rc=%d\n", rc);
227 return -ENODEV;
228 }
229 rc = regulator_enable(reg_l23);
230 if (rc) {
231 pr_err("enable l8 failed, rc=%d\n", rc);
232 return -ENODEV;
233 }
234 rc = regulator_enable(reg_l2);
235 if (rc) {
236 pr_err("enable l2 failed, rc=%d\n", rc);
237 return -ENODEV;
238 }
239 gpio_set_value_cansleep(gpio43, 1);
240 } else {
241 rc = regulator_disable(reg_l2);
242 if (rc) {
243 pr_err("disable reg_l2 failed, rc=%d\n", rc);
244 return -ENODEV;
245 }
246 rc = regulator_disable(reg_l8);
247 if (rc) {
248 pr_err("disable reg_l8 failed, rc=%d\n", rc);
249 return -ENODEV;
250 }
251 rc = regulator_disable(reg_l23);
252 if (rc) {
253 pr_err("disable reg_l23 failed, rc=%d\n", rc);
254 return -ENODEV;
255 }
256 rc = regulator_set_optimum_mode(reg_l8, 100);
257 if (rc < 0) {
258 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
259 return -EINVAL;
260 }
261 rc = regulator_set_optimum_mode(reg_l23, 100);
262 if (rc < 0) {
263 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
264 return -EINVAL;
265 }
266 rc = regulator_set_optimum_mode(reg_l2, 100);
267 if (rc < 0) {
268 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
269 return -EINVAL;
270 }
271 gpio_set_value_cansleep(gpio43, 0);
272 }
273 return 0;
274}
Jay Chokshi06fa7542011-12-07 13:09:17 -0800275#endif
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800276
277static int mipi_dsi_panel_power(int on)
278{
279 pr_info("%s: on=%d\n", __func__, on);
280
281 return mipi_dsi_cdp_panel_power(on);
282}
283
284static struct mipi_dsi_platform_data mipi_dsi_pdata = {
285 .vsync_gpio = MDP_VSYNC_GPIO,
286 .dsi_power_save = mipi_dsi_panel_power,
287};
288
289#ifdef CONFIG_MSM_BUS_SCALING
290
291static struct msm_bus_vectors mdp_init_vectors[] = {
292 {
293 .src = MSM_BUS_MASTER_MDP_PORT0,
294 .dst = MSM_BUS_SLAVE_EBI_CH0,
295 .ab = 0,
296 .ib = 0,
297 },
298};
299
300#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
301static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
302 /* If HDMI is used as primary */
303 {
304 .src = MSM_BUS_MASTER_MDP_PORT0,
305 .dst = MSM_BUS_SLAVE_EBI_CH0,
306 .ab = 2000000000,
307 .ib = 2000000000,
308 },
309};
310static struct msm_bus_paths mdp_bus_scale_usecases[] = {
311 {
312 ARRAY_SIZE(mdp_init_vectors),
313 mdp_init_vectors,
314 },
315 {
316 ARRAY_SIZE(hdmi_as_primary_vectors),
317 hdmi_as_primary_vectors,
318 },
319 {
320 ARRAY_SIZE(hdmi_as_primary_vectors),
321 hdmi_as_primary_vectors,
322 },
323 {
324 ARRAY_SIZE(hdmi_as_primary_vectors),
325 hdmi_as_primary_vectors,
326 },
327 {
328 ARRAY_SIZE(hdmi_as_primary_vectors),
329 hdmi_as_primary_vectors,
330 },
331 {
332 ARRAY_SIZE(hdmi_as_primary_vectors),
333 hdmi_as_primary_vectors,
334 },
335};
336#else
337static struct msm_bus_vectors mdp_ui_vectors[] = {
338 {
339 .src = MSM_BUS_MASTER_MDP_PORT0,
340 .dst = MSM_BUS_SLAVE_EBI_CH0,
341 .ab = 216000000 * 2,
342 .ib = 270000000 * 2,
343 },
344};
345
346static struct msm_bus_vectors mdp_vga_vectors[] = {
347 /* VGA and less video */
348 {
349 .src = MSM_BUS_MASTER_MDP_PORT0,
350 .dst = MSM_BUS_SLAVE_EBI_CH0,
351 .ab = 216000000 * 2,
352 .ib = 270000000 * 2,
353 },
354};
355
356static struct msm_bus_vectors mdp_720p_vectors[] = {
357 /* 720p and less video */
358 {
359 .src = MSM_BUS_MASTER_MDP_PORT0,
360 .dst = MSM_BUS_SLAVE_EBI_CH0,
361 .ab = 230400000 * 2,
362 .ib = 288000000 * 2,
363 },
364};
365
366static struct msm_bus_vectors mdp_1080p_vectors[] = {
367 /* 1080p and less video */
368 {
369 .src = MSM_BUS_MASTER_MDP_PORT0,
370 .dst = MSM_BUS_SLAVE_EBI_CH0,
371 .ab = 334080000 * 2,
372 .ib = 417600000 * 2,
373 },
374};
375
376static struct msm_bus_paths mdp_bus_scale_usecases[] = {
377 {
378 ARRAY_SIZE(mdp_init_vectors),
379 mdp_init_vectors,
380 },
381 {
382 ARRAY_SIZE(mdp_ui_vectors),
383 mdp_ui_vectors,
384 },
385 {
386 ARRAY_SIZE(mdp_ui_vectors),
387 mdp_ui_vectors,
388 },
389 {
390 ARRAY_SIZE(mdp_vga_vectors),
391 mdp_vga_vectors,
392 },
393 {
394 ARRAY_SIZE(mdp_720p_vectors),
395 mdp_720p_vectors,
396 },
397 {
398 ARRAY_SIZE(mdp_1080p_vectors),
399 mdp_1080p_vectors,
400 },
401};
402#endif
403
404static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
405 mdp_bus_scale_usecases,
406 ARRAY_SIZE(mdp_bus_scale_usecases),
407 .name = "mdp",
408};
409
410#endif
411
412#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
413static int mdp_core_clk_rate_table[] = {
414 200000000,
415 200000000,
416 200000000,
417 200000000,
418};
419#else
420static int mdp_core_clk_rate_table[] = {
421 85330000,
422 85330000,
423 160000000,
424 200000000,
425};
426#endif
427
428static struct msm_panel_common_pdata mdp_pdata = {
429 .gpio = MDP_VSYNC_GPIO,
430#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
431 .mdp_core_clk_rate = 200000000,
432#else
433 .mdp_core_clk_rate = 85330000,
434#endif
435 .mdp_core_clk_table = mdp_core_clk_rate_table,
436 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
437#ifdef CONFIG_MSM_BUS_SCALING
438 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
439#endif
440 .mdp_rev = MDP_REV_42,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -0800441#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
442 .mem_hid = ION_CP_MM_HEAP_ID,
443#else
444 .mem_hid = MEMTYPE_EBI1,
445#endif
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800446};
447
Huaibin Yanga5419422011-12-08 23:52:10 -0800448void __init msm8930_mdp_writeback(struct memtype_reserve* reserve_table)
449{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -0800450 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
451 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
452#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
453 reserve_table[mdp_pdata.mem_hid].size +=
454 mdp_pdata.ov0_wb_size;
455 reserve_table[mdp_pdata.mem_hid].size +=
456 mdp_pdata.ov1_wb_size;
457#endif
Huaibin Yanga5419422011-12-08 23:52:10 -0800458}
459
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800460#define LPM_CHANNEL0 0
461static int toshiba_gpio[] = {LPM_CHANNEL0};
462
463static struct mipi_dsi_panel_platform_data toshiba_pdata = {
464 .gpio = toshiba_gpio,
465};
466
467static struct platform_device mipi_dsi_toshiba_panel_device = {
468 .name = "mipi_toshiba",
469 .id = 0,
470 .dev = {
471 .platform_data = &toshiba_pdata,
472 }
473};
474
475#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
476
477static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
478
479/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
480 {0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
481 /* timing */
482 {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
483 0x0c, 0x03, 0x04, 0xa0},
484 {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
485 {0xff, 0x00, 0x06, 0x00}, /* strength */
486 /* pll control */
487 {0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
488 0x40, 0x07, 0x03,
489 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
490};
491
492static struct mipi_dsi_panel_platform_data novatek_pdata = {
493 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
494 .fpga_ctrl_mode = FPGA_SPI_INTF,
495 .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
496};
497
498static struct platform_device mipi_dsi_novatek_panel_device = {
499 .name = "mipi_novatek",
500 .id = 0,
501 .dev = {
502 .platform_data = &novatek_pdata,
503 }
504};
505
506#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
507static struct resource hdmi_msm_resources[] = {
508 {
509 .name = "hdmi_msm_qfprom_addr",
510 .start = 0x00700000,
511 .end = 0x007060FF,
512 .flags = IORESOURCE_MEM,
513 },
514 {
515 .name = "hdmi_msm_hdmi_addr",
516 .start = 0x04A00000,
517 .end = 0x04A00FFF,
518 .flags = IORESOURCE_MEM,
519 },
520 {
521 .name = "hdmi_msm_irq",
522 .start = HDMI_IRQ,
523 .end = HDMI_IRQ,
524 .flags = IORESOURCE_IRQ,
525 },
526};
527
528static int hdmi_enable_5v(int on);
529static int hdmi_core_power(int on, int show);
530static int hdmi_cec_power(int on);
531
532static struct msm_hdmi_platform_data hdmi_msm_data = {
533 .irq = HDMI_IRQ,
534 .enable_5v = hdmi_enable_5v,
535 .core_power = hdmi_core_power,
536 .cec_power = hdmi_cec_power,
537};
538
539static struct platform_device hdmi_msm_device = {
540 .name = "hdmi_msm",
541 .id = 0,
542 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
543 .resource = hdmi_msm_resources,
544 .dev.platform_data = &hdmi_msm_data,
545};
546#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
547
548#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
549static struct platform_device wfd_panel_device = {
550 .name = "wfd_panel",
551 .id = 0,
552 .dev.platform_data = NULL,
553};
554
555static struct platform_device wfd_device = {
556 .name = "msm_wfd",
557 .id = -1,
558};
559#endif
560
561#ifdef CONFIG_MSM_BUS_SCALING
562static struct msm_bus_vectors dtv_bus_init_vectors[] = {
563 {
564 .src = MSM_BUS_MASTER_MDP_PORT0,
565 .dst = MSM_BUS_SLAVE_EBI_CH0,
566 .ab = 0,
567 .ib = 0,
568 },
569};
570
571#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
572static struct msm_bus_vectors dtv_bus_def_vectors[] = {
573 {
574 .src = MSM_BUS_MASTER_MDP_PORT0,
575 .dst = MSM_BUS_SLAVE_EBI_CH0,
576 .ab = 2000000000,
577 .ib = 2000000000,
578 },
579};
580#else
581static struct msm_bus_vectors dtv_bus_def_vectors[] = {
582 {
583 .src = MSM_BUS_MASTER_MDP_PORT0,
584 .dst = MSM_BUS_SLAVE_EBI_CH0,
585 .ab = 566092800 * 2,
586 .ib = 707616000 * 2,
587 },
588};
589#endif
590
591static struct msm_bus_paths dtv_bus_scale_usecases[] = {
592 {
593 ARRAY_SIZE(dtv_bus_init_vectors),
594 dtv_bus_init_vectors,
595 },
596 {
597 ARRAY_SIZE(dtv_bus_def_vectors),
598 dtv_bus_def_vectors,
599 },
600};
601static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
602 dtv_bus_scale_usecases,
603 ARRAY_SIZE(dtv_bus_scale_usecases),
604 .name = "dtv",
605};
606
607static struct lcdc_platform_data dtv_pdata = {
608 .bus_scale_table = &dtv_bus_scale_pdata,
609};
610#endif
611
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800612#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800613static int hdmi_enable_5v(int on)
614{
615 /* TBD: PM8921 regulator instead of 8901 */
616 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
617 static int prev_on;
618 int rc;
619
620 if (on == prev_on)
621 return 0;
622
623 if (!reg_8921_hdmi_mvs)
624 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
625 "hdmi_mvs");
626
627 if (on) {
628 rc = regulator_enable(reg_8921_hdmi_mvs);
629 if (rc) {
630 pr_err("'%s' regulator enable failed, rc=%d\n",
631 "8921_hdmi_mvs", rc);
632 return rc;
633 }
634 pr_debug("%s(on): success\n", __func__);
635 } else {
636 rc = regulator_disable(reg_8921_hdmi_mvs);
637 if (rc)
638 pr_warning("'%s' regulator disable failed, rc=%d\n",
639 "8921_hdmi_mvs", rc);
640 pr_debug("%s(off): success\n", __func__);
641 }
642
643 prev_on = on;
644
645 return 0;
646}
647
648static int hdmi_core_power(int on, int show)
649{
650 static struct regulator *reg_8921_l23, *reg_8921_s4;
651 static int prev_on;
652 int rc;
653
654 if (on == prev_on)
655 return 0;
656
657 /* TBD: PM8921 regulator instead of 8901 */
658 if (!reg_8921_l23) {
659 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
660 if (IS_ERR(reg_8921_l23)) {
661 pr_err("could not get reg_8921_l23, rc = %ld\n",
662 PTR_ERR(reg_8921_l23));
663 return -ENODEV;
664 }
665 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
666 if (rc) {
667 pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
668 return -EINVAL;
669 }
670 }
671 if (!reg_8921_s4) {
672 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
673 if (IS_ERR(reg_8921_s4)) {
674 pr_err("could not get reg_8921_s4, rc = %ld\n",
675 PTR_ERR(reg_8921_s4));
676 return -ENODEV;
677 }
678 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
679 if (rc) {
680 pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
681 return -EINVAL;
682 }
683 }
684
685 if (on) {
686 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
687 if (rc < 0) {
688 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
689 return -EINVAL;
690 }
691 rc = regulator_enable(reg_8921_l23);
692 if (rc) {
693 pr_err("'%s' regulator enable failed, rc=%d\n",
694 "hdmi_avdd", rc);
695 return rc;
696 }
697 rc = regulator_enable(reg_8921_s4);
698 if (rc) {
699 pr_err("'%s' regulator enable failed, rc=%d\n",
700 "hdmi_vcc", rc);
701 return rc;
702 }
703 rc = gpio_request(100, "HDMI_DDC_CLK");
704 if (rc) {
705 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
706 "HDMI_DDC_CLK", 100, rc);
707 goto error1;
708 }
709 rc = gpio_request(101, "HDMI_DDC_DATA");
710 if (rc) {
711 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
712 "HDMI_DDC_DATA", 101, rc);
713 goto error2;
714 }
715 rc = gpio_request(102, "HDMI_HPD");
716 if (rc) {
717 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
718 "HDMI_HPD", 102, rc);
719 goto error3;
720 }
721 pr_debug("%s(on): success\n", __func__);
722 } else {
723 gpio_free(100);
724 gpio_free(101);
725 gpio_free(102);
726
727 rc = regulator_disable(reg_8921_l23);
728 if (rc) {
729 pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
730 return -ENODEV;
731 }
732 rc = regulator_disable(reg_8921_s4);
733 if (rc) {
734 pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
735 return -ENODEV;
736 }
737 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
738 if (rc < 0) {
739 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
740 return -EINVAL;
741 }
742 pr_debug("%s(off): success\n", __func__);
743 }
744
745 prev_on = on;
746
747 return 0;
748
749error3:
750 gpio_free(101);
751error2:
752 gpio_free(100);
753error1:
754 regulator_disable(reg_8921_l23);
755 regulator_disable(reg_8921_s4);
756 return rc;
757}
758
759static int hdmi_cec_power(int on)
760{
761 static int prev_on;
762 int rc;
763
764 if (on == prev_on)
765 return 0;
766
767 if (on) {
768 rc = gpio_request(99, "HDMI_CEC_VAR");
769 if (rc) {
770 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
771 "HDMI_CEC_VAR", 99, rc);
772 goto error;
773 }
774 pr_debug("%s(on): success\n", __func__);
775 } else {
776 gpio_free(99);
777 pr_debug("%s(off): success\n", __func__);
778 }
779
780 prev_on = on;
781
782 return 0;
783error:
784 return rc;
785}
786#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
787
788void __init msm8930_init_fb(void)
789{
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800790 platform_device_register(&msm_fb_device);
791
792#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
793 platform_device_register(&wfd_panel_device);
794 platform_device_register(&wfd_device);
795#endif
796
797 platform_device_register(&mipi_dsi_novatek_panel_device);
798
799#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Ajay Dudani52e88232011-12-13 13:33:10 -0800800 if (!cpu_is_msm8930())
Ajay Dudani9114be72011-12-03 07:46:35 -0800801 platform_device_register(&hdmi_msm_device);
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800802#endif
803
804 platform_device_register(&mipi_dsi_toshiba_panel_device);
805
806 msm_fb_register_device("mdp", &mdp_pdata);
807 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
808#ifdef CONFIG_MSM_BUS_SCALING
809 msm_fb_register_device("dtv", &dtv_pdata);
810#endif
811}
812
813void __init msm8930_allocate_fb_region(void)
814{
815 void *addr;
816 unsigned long size;
817
818 size = MSM_FB_SIZE;
819 addr = alloc_bootmem_align(size, 0x1000);
820 msm_fb_resources[0].start = __pa(addr);
821 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
822 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
823 size, addr, __pa(addr));
824}