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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/include/asm-arm/arch-omap/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from linux/include/asm-arm/arch-sa1100/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Modifications:
30 * 06-12-1997 RMK Created.
31 * 07-04-1999 RMK Major cleanup
32 */
33
34#ifndef __ASM_ARM_ARCH_IO_H
35#define __ASM_ARM_ARCH_IO_H
36
37#define IO_SPACE_LIMIT 0xffffffff
38
39/*
40 * We don't actually have real ISA nor PCI buses, but there is so many
41 * drivers out there that might just work if we fake them...
42 */
43#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
44#define __mem_pci(a) (a)
45#define __mem_isa(a) (a)
46
47/*
48 * ----------------------------------------------------------------------------
49 * I/O mapping
50 * ----------------------------------------------------------------------------
51 */
52#define IO_PHYS 0xFFFB0000
53#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
54#define IO_VIRT (IO_PHYS - IO_OFFSET)
55#define IO_SIZE 0x40000
56#define IO_ADDRESS(x) ((x) - IO_OFFSET)
57
58#define PCIO_BASE 0
59
60#define io_p2v(x) ((x) - IO_OFFSET)
61#define io_v2p(x) ((x) + IO_OFFSET)
62
63#ifndef __ASSEMBLER__
64
65/*
66 * Functions to access the OMAP IO region
67 *
68 * NOTE: - Use omap_read/write[bwl] for physical register addresses
69 * - Use __raw_read/write[bwl]() for virtual register addresses
70 * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
71 * - DO NOT use hardcoded virtual addresses to allow changing the
72 * IO address space again if needed
73 */
74#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a))
75#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a))
76#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a))
77
78#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
79#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
80#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
81
82/* 16 bit uses LDRH/STRH, base +/- offset_8 */
83typedef struct { volatile u16 offset[256]; } __regbase16;
84#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
85 ->offset[((vaddr)&0xff)>>1]
86#define __REG16(paddr) __REGV16(io_p2v(paddr))
87
88/* 8/32 bit uses LDR/STR, base +/- offset_12 */
89typedef struct { volatile u8 offset[4096]; } __regbase8;
90#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
91 ->offset[((vaddr)&4095)>>0]
92#define __REG8(paddr) __REGV8(io_p2v(paddr))
93
94typedef struct { volatile u32 offset[4096]; } __regbase32;
95#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
96 ->offset[((vaddr)&4095)>>2]
97#define __REG32(paddr) __REGV32(io_p2v(paddr))
98
99#else
100
101#define __REG8(paddr) io_p2v(paddr)
102#define __REG16(paddr) io_p2v(paddr)
103#define __REG32(paddr) io_p2v(paddr)
104
105#endif
106
107#endif