Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Dave DNET Ethernet Controller driver |
| 3 | * |
| 4 | * Copyright (C) 2008 Dave S.r.l. <www.dave.eu> |
| 5 | * Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
Geert Uytterhoeven | 142071b | 2009-03-24 13:19:50 -0700 | [diff] [blame] | 11 | #include <linux/io.h> |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 12 | #include <linux/module.h> |
| 13 | #include <linux/moduleparam.h> |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/types.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/netdevice.h> |
| 20 | #include <linux/etherdevice.h> |
| 21 | #include <linux/dma-mapping.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/phy.h> |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 24 | |
| 25 | #include "dnet.h" |
| 26 | |
| 27 | #undef DEBUG |
| 28 | |
| 29 | /* function for reading internal MAC register */ |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 30 | static u16 dnet_readw_mac(struct dnet *bp, u16 reg) |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 31 | { |
| 32 | u16 data_read; |
| 33 | |
| 34 | /* issue a read */ |
| 35 | dnet_writel(bp, reg, MACREG_ADDR); |
| 36 | |
| 37 | /* since a read/write op to the MAC is very slow, |
| 38 | * we must wait before reading the data */ |
| 39 | ndelay(500); |
| 40 | |
| 41 | /* read data read from the MAC register */ |
| 42 | data_read = dnet_readl(bp, MACREG_DATA); |
| 43 | |
| 44 | /* all done */ |
| 45 | return data_read; |
| 46 | } |
| 47 | |
| 48 | /* function for writing internal MAC register */ |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 49 | static void dnet_writew_mac(struct dnet *bp, u16 reg, u16 val) |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 50 | { |
| 51 | /* load data to write */ |
| 52 | dnet_writel(bp, val, MACREG_DATA); |
| 53 | |
| 54 | /* issue a write */ |
| 55 | dnet_writel(bp, reg | DNET_INTERNAL_WRITE, MACREG_ADDR); |
| 56 | |
| 57 | /* since a read/write op to the MAC is very slow, |
| 58 | * we must wait before exiting */ |
| 59 | ndelay(500); |
| 60 | } |
| 61 | |
| 62 | static void __dnet_set_hwaddr(struct dnet *bp) |
| 63 | { |
| 64 | u16 tmp; |
| 65 | |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 66 | tmp = be16_to_cpup((__be16 *)bp->dev->dev_addr); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 67 | dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG, tmp); |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 68 | tmp = be16_to_cpup((__be16 *)(bp->dev->dev_addr + 2)); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 69 | dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG, tmp); |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 70 | tmp = be16_to_cpup((__be16 *)(bp->dev->dev_addr + 4)); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 71 | dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG, tmp); |
| 72 | } |
| 73 | |
| 74 | static void __devinit dnet_get_hwaddr(struct dnet *bp) |
| 75 | { |
| 76 | u16 tmp; |
| 77 | u8 addr[6]; |
| 78 | |
| 79 | /* |
| 80 | * from MAC docs: |
| 81 | * "Note that the MAC address is stored in the registers in Hexadecimal |
| 82 | * form. For example, to set the MAC Address to: AC-DE-48-00-00-80 |
| 83 | * would require writing 0xAC (octet 0) to address 0x0B (high byte of |
| 84 | * Mac_addr[15:0]), 0xDE (octet 1) to address 0x0A (Low byte of |
| 85 | * Mac_addr[15:0]), 0x48 (octet 2) to address 0x0D (high byte of |
| 86 | * Mac_addr[15:0]), 0x00 (octet 3) to address 0x0C (Low byte of |
| 87 | * Mac_addr[15:0]), 0x00 (octet 4) to address 0x0F (high byte of |
| 88 | * Mac_addr[15:0]), and 0x80 (octet 5) to address * 0x0E (Low byte of |
| 89 | * Mac_addr[15:0]). |
| 90 | */ |
| 91 | tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG); |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 92 | *((__be16 *)addr) = cpu_to_be16(tmp); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 93 | tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG); |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 94 | *((__be16 *)(addr + 2)) = cpu_to_be16(tmp); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 95 | tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG); |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 96 | *((__be16 *)(addr + 4)) = cpu_to_be16(tmp); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 97 | |
| 98 | if (is_valid_ether_addr(addr)) |
| 99 | memcpy(bp->dev->dev_addr, addr, sizeof(addr)); |
| 100 | } |
| 101 | |
| 102 | static int dnet_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
| 103 | { |
| 104 | struct dnet *bp = bus->priv; |
| 105 | u16 value; |
| 106 | |
| 107 | while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG) |
| 108 | & DNET_INTERNAL_GMII_MNG_CMD_FIN)) |
| 109 | cpu_relax(); |
| 110 | |
| 111 | /* only 5 bits allowed for phy-addr and reg_offset */ |
| 112 | mii_id &= 0x1f; |
| 113 | regnum &= 0x1f; |
| 114 | |
| 115 | /* prepare reg_value for a read */ |
| 116 | value = (mii_id << 8); |
| 117 | value |= regnum; |
| 118 | |
| 119 | /* write control word */ |
| 120 | dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, value); |
| 121 | |
| 122 | /* wait for end of transfer */ |
| 123 | while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG) |
| 124 | & DNET_INTERNAL_GMII_MNG_CMD_FIN)) |
| 125 | cpu_relax(); |
| 126 | |
| 127 | value = dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG); |
| 128 | |
| 129 | pr_debug("mdio_read %02x:%02x <- %04x\n", mii_id, regnum, value); |
| 130 | |
| 131 | return value; |
| 132 | } |
| 133 | |
| 134 | static int dnet_mdio_write(struct mii_bus *bus, int mii_id, int regnum, |
| 135 | u16 value) |
| 136 | { |
| 137 | struct dnet *bp = bus->priv; |
| 138 | u16 tmp; |
| 139 | |
| 140 | pr_debug("mdio_write %02x:%02x <- %04x\n", mii_id, regnum, value); |
| 141 | |
| 142 | while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG) |
| 143 | & DNET_INTERNAL_GMII_MNG_CMD_FIN)) |
| 144 | cpu_relax(); |
| 145 | |
| 146 | /* prepare for a write operation */ |
| 147 | tmp = (1 << 13); |
| 148 | |
| 149 | /* only 5 bits allowed for phy-addr and reg_offset */ |
| 150 | mii_id &= 0x1f; |
| 151 | regnum &= 0x1f; |
| 152 | |
| 153 | /* only 16 bits on data */ |
| 154 | value &= 0xffff; |
| 155 | |
| 156 | /* prepare reg_value for a write */ |
| 157 | tmp |= (mii_id << 8); |
| 158 | tmp |= regnum; |
| 159 | |
| 160 | /* write data to write first */ |
| 161 | dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG, value); |
| 162 | |
| 163 | /* write control word */ |
| 164 | dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, tmp); |
| 165 | |
| 166 | while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG) |
| 167 | & DNET_INTERNAL_GMII_MNG_CMD_FIN)) |
| 168 | cpu_relax(); |
| 169 | |
| 170 | return 0; |
| 171 | } |
| 172 | |
| 173 | static int dnet_mdio_reset(struct mii_bus *bus) |
| 174 | { |
| 175 | return 0; |
| 176 | } |
| 177 | |
| 178 | static void dnet_handle_link_change(struct net_device *dev) |
| 179 | { |
| 180 | struct dnet *bp = netdev_priv(dev); |
| 181 | struct phy_device *phydev = bp->phy_dev; |
| 182 | unsigned long flags; |
| 183 | u32 mode_reg, ctl_reg; |
| 184 | |
| 185 | int status_change = 0; |
| 186 | |
| 187 | spin_lock_irqsave(&bp->lock, flags); |
| 188 | |
| 189 | mode_reg = dnet_readw_mac(bp, DNET_INTERNAL_MODE_REG); |
| 190 | ctl_reg = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG); |
| 191 | |
| 192 | if (phydev->link) { |
| 193 | if (bp->duplex != phydev->duplex) { |
| 194 | if (phydev->duplex) |
| 195 | ctl_reg &= |
| 196 | ~(DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP); |
| 197 | else |
| 198 | ctl_reg |= |
| 199 | DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP; |
| 200 | |
| 201 | bp->duplex = phydev->duplex; |
| 202 | status_change = 1; |
| 203 | } |
| 204 | |
| 205 | if (bp->speed != phydev->speed) { |
| 206 | status_change = 1; |
| 207 | switch (phydev->speed) { |
| 208 | case 1000: |
| 209 | mode_reg |= DNET_INTERNAL_MODE_GBITEN; |
| 210 | break; |
| 211 | case 100: |
| 212 | case 10: |
| 213 | mode_reg &= ~DNET_INTERNAL_MODE_GBITEN; |
| 214 | break; |
| 215 | default: |
| 216 | printk(KERN_WARNING |
| 217 | "%s: Ack! Speed (%d) is not " |
| 218 | "10/100/1000!\n", dev->name, |
| 219 | phydev->speed); |
| 220 | break; |
| 221 | } |
| 222 | bp->speed = phydev->speed; |
| 223 | } |
| 224 | } |
| 225 | |
| 226 | if (phydev->link != bp->link) { |
| 227 | if (phydev->link) { |
| 228 | mode_reg |= |
| 229 | (DNET_INTERNAL_MODE_RXEN | DNET_INTERNAL_MODE_TXEN); |
| 230 | } else { |
| 231 | mode_reg &= |
| 232 | ~(DNET_INTERNAL_MODE_RXEN | |
| 233 | DNET_INTERNAL_MODE_TXEN); |
| 234 | bp->speed = 0; |
| 235 | bp->duplex = -1; |
| 236 | } |
| 237 | bp->link = phydev->link; |
| 238 | |
| 239 | status_change = 1; |
| 240 | } |
| 241 | |
| 242 | if (status_change) { |
| 243 | dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg); |
| 244 | dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, mode_reg); |
| 245 | } |
| 246 | |
| 247 | spin_unlock_irqrestore(&bp->lock, flags); |
| 248 | |
| 249 | if (status_change) { |
| 250 | if (phydev->link) |
| 251 | printk(KERN_INFO "%s: link up (%d/%s)\n", |
| 252 | dev->name, phydev->speed, |
| 253 | DUPLEX_FULL == phydev->duplex ? "Full" : "Half"); |
| 254 | else |
| 255 | printk(KERN_INFO "%s: link down\n", dev->name); |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | static int dnet_mii_probe(struct net_device *dev) |
| 260 | { |
| 261 | struct dnet *bp = netdev_priv(dev); |
| 262 | struct phy_device *phydev = NULL; |
| 263 | int phy_addr; |
| 264 | |
| 265 | /* find the first phy */ |
| 266 | for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { |
| 267 | if (bp->mii_bus->phy_map[phy_addr]) { |
| 268 | phydev = bp->mii_bus->phy_map[phy_addr]; |
| 269 | break; |
| 270 | } |
| 271 | } |
| 272 | |
| 273 | if (!phydev) { |
| 274 | printk(KERN_ERR "%s: no PHY found\n", dev->name); |
| 275 | return -ENODEV; |
| 276 | } |
| 277 | |
| 278 | /* TODO : add pin_irq */ |
| 279 | |
| 280 | /* attach the mac to the phy */ |
| 281 | if (bp->capabilities & DNET_HAS_RMII) { |
Stephen Rothwell | 6580f57 | 2009-03-22 21:22:48 -0700 | [diff] [blame] | 282 | phydev = phy_connect(dev, dev_name(&phydev->dev), |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 283 | &dnet_handle_link_change, 0, |
| 284 | PHY_INTERFACE_MODE_RMII); |
| 285 | } else { |
Stephen Rothwell | 6580f57 | 2009-03-22 21:22:48 -0700 | [diff] [blame] | 286 | phydev = phy_connect(dev, dev_name(&phydev->dev), |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 287 | &dnet_handle_link_change, 0, |
| 288 | PHY_INTERFACE_MODE_MII); |
| 289 | } |
| 290 | |
| 291 | if (IS_ERR(phydev)) { |
| 292 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); |
| 293 | return PTR_ERR(phydev); |
| 294 | } |
| 295 | |
| 296 | /* mask with MAC supported features */ |
| 297 | if (bp->capabilities & DNET_HAS_GIGABIT) |
| 298 | phydev->supported &= PHY_GBIT_FEATURES; |
| 299 | else |
| 300 | phydev->supported &= PHY_BASIC_FEATURES; |
| 301 | |
| 302 | phydev->supported |= SUPPORTED_Asym_Pause | SUPPORTED_Pause; |
| 303 | |
| 304 | phydev->advertising = phydev->supported; |
| 305 | |
| 306 | bp->link = 0; |
| 307 | bp->speed = 0; |
| 308 | bp->duplex = -1; |
| 309 | bp->phy_dev = phydev; |
| 310 | |
| 311 | return 0; |
| 312 | } |
| 313 | |
| 314 | static int dnet_mii_init(struct dnet *bp) |
| 315 | { |
| 316 | int err, i; |
| 317 | |
| 318 | bp->mii_bus = mdiobus_alloc(); |
| 319 | if (bp->mii_bus == NULL) |
| 320 | return -ENOMEM; |
| 321 | |
| 322 | bp->mii_bus->name = "dnet_mii_bus"; |
| 323 | bp->mii_bus->read = &dnet_mdio_read; |
| 324 | bp->mii_bus->write = &dnet_mdio_write; |
| 325 | bp->mii_bus->reset = &dnet_mdio_reset; |
| 326 | |
| 327 | snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0); |
| 328 | |
| 329 | bp->mii_bus->priv = bp; |
| 330 | |
| 331 | bp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); |
| 332 | if (!bp->mii_bus->irq) { |
| 333 | err = -ENOMEM; |
| 334 | goto err_out; |
| 335 | } |
| 336 | |
| 337 | for (i = 0; i < PHY_MAX_ADDR; i++) |
| 338 | bp->mii_bus->irq[i] = PHY_POLL; |
| 339 | |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 340 | if (mdiobus_register(bp->mii_bus)) { |
| 341 | err = -ENXIO; |
| 342 | goto err_out_free_mdio_irq; |
| 343 | } |
| 344 | |
| 345 | if (dnet_mii_probe(bp->dev) != 0) { |
| 346 | err = -ENXIO; |
| 347 | goto err_out_unregister_bus; |
| 348 | } |
| 349 | |
| 350 | return 0; |
| 351 | |
| 352 | err_out_unregister_bus: |
| 353 | mdiobus_unregister(bp->mii_bus); |
| 354 | err_out_free_mdio_irq: |
| 355 | kfree(bp->mii_bus->irq); |
| 356 | err_out: |
| 357 | mdiobus_free(bp->mii_bus); |
| 358 | return err; |
| 359 | } |
| 360 | |
| 361 | /* For Neptune board: LINK1000 as Link LED and TX as activity LED */ |
Harvey Harrison | 35f2516 | 2010-10-12 22:20:34 +0000 | [diff] [blame] | 362 | static int dnet_phy_marvell_fixup(struct phy_device *phydev) |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 363 | { |
| 364 | return phy_write(phydev, 0x18, 0x4148); |
| 365 | } |
| 366 | |
| 367 | static void dnet_update_stats(struct dnet *bp) |
| 368 | { |
| 369 | u32 __iomem *reg = bp->regs + DNET_RX_PKT_IGNR_CNT; |
| 370 | u32 *p = &bp->hw_stats.rx_pkt_ignr; |
| 371 | u32 *end = &bp->hw_stats.rx_byte + 1; |
| 372 | |
| 373 | WARN_ON((unsigned long)(end - p - 1) != |
| 374 | (DNET_RX_BYTE_CNT - DNET_RX_PKT_IGNR_CNT) / 4); |
| 375 | |
| 376 | for (; p < end; p++, reg++) |
| 377 | *p += readl(reg); |
| 378 | |
| 379 | reg = bp->regs + DNET_TX_UNICAST_CNT; |
| 380 | p = &bp->hw_stats.tx_unicast; |
| 381 | end = &bp->hw_stats.tx_byte + 1; |
| 382 | |
| 383 | WARN_ON((unsigned long)(end - p - 1) != |
| 384 | (DNET_TX_BYTE_CNT - DNET_TX_UNICAST_CNT) / 4); |
| 385 | |
| 386 | for (; p < end; p++, reg++) |
| 387 | *p += readl(reg); |
| 388 | } |
| 389 | |
| 390 | static int dnet_poll(struct napi_struct *napi, int budget) |
| 391 | { |
| 392 | struct dnet *bp = container_of(napi, struct dnet, napi); |
| 393 | struct net_device *dev = bp->dev; |
| 394 | int npackets = 0; |
| 395 | unsigned int pkt_len; |
| 396 | struct sk_buff *skb; |
| 397 | unsigned int *data_ptr; |
| 398 | u32 int_enable; |
| 399 | u32 cmd_word; |
| 400 | int i; |
| 401 | |
| 402 | while (npackets < budget) { |
| 403 | /* |
| 404 | * break out of while loop if there are no more |
| 405 | * packets waiting |
| 406 | */ |
| 407 | if (!(dnet_readl(bp, RX_FIFO_WCNT) >> 16)) { |
Ilya Yanok | 9fae6c3 | 2009-03-13 09:51:46 -0700 | [diff] [blame] | 408 | napi_complete(napi); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 409 | int_enable = dnet_readl(bp, INTR_ENB); |
| 410 | int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF; |
| 411 | dnet_writel(bp, int_enable, INTR_ENB); |
| 412 | return 0; |
| 413 | } |
| 414 | |
| 415 | cmd_word = dnet_readl(bp, RX_LEN_FIFO); |
| 416 | pkt_len = cmd_word & 0xFFFF; |
| 417 | |
| 418 | if (cmd_word & 0xDF180000) |
| 419 | printk(KERN_ERR "%s packet receive error %x\n", |
| 420 | __func__, cmd_word); |
| 421 | |
| 422 | skb = dev_alloc_skb(pkt_len + 5); |
| 423 | if (skb != NULL) { |
| 424 | /* Align IP on 16 byte boundaries */ |
| 425 | skb_reserve(skb, 2); |
| 426 | /* |
| 427 | * 'skb_put()' points to the start of sk_buff |
| 428 | * data area. |
| 429 | */ |
| 430 | data_ptr = (unsigned int *)skb_put(skb, pkt_len); |
| 431 | for (i = 0; i < (pkt_len + 3) >> 2; i++) |
| 432 | *data_ptr++ = dnet_readl(bp, RX_DATA_FIFO); |
| 433 | skb->protocol = eth_type_trans(skb, dev); |
| 434 | netif_receive_skb(skb); |
| 435 | npackets++; |
| 436 | } else |
| 437 | printk(KERN_NOTICE |
| 438 | "%s: No memory to allocate a sk_buff of " |
| 439 | "size %u.\n", dev->name, pkt_len); |
| 440 | } |
| 441 | |
| 442 | budget -= npackets; |
| 443 | |
| 444 | if (npackets < budget) { |
| 445 | /* We processed all packets available. Tell NAPI it can |
| 446 | * stop polling then re-enable rx interrupts */ |
Ilya Yanok | 9fae6c3 | 2009-03-13 09:51:46 -0700 | [diff] [blame] | 447 | napi_complete(napi); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 448 | int_enable = dnet_readl(bp, INTR_ENB); |
| 449 | int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF; |
| 450 | dnet_writel(bp, int_enable, INTR_ENB); |
| 451 | return 0; |
| 452 | } |
| 453 | |
| 454 | /* There are still packets waiting */ |
| 455 | return 1; |
| 456 | } |
| 457 | |
| 458 | static irqreturn_t dnet_interrupt(int irq, void *dev_id) |
| 459 | { |
| 460 | struct net_device *dev = dev_id; |
| 461 | struct dnet *bp = netdev_priv(dev); |
| 462 | u32 int_src, int_enable, int_current; |
| 463 | unsigned long flags; |
| 464 | unsigned int handled = 0; |
| 465 | |
| 466 | spin_lock_irqsave(&bp->lock, flags); |
| 467 | |
| 468 | /* read and clear the DNET irq (clear on read) */ |
| 469 | int_src = dnet_readl(bp, INTR_SRC); |
| 470 | int_enable = dnet_readl(bp, INTR_ENB); |
| 471 | int_current = int_src & int_enable; |
| 472 | |
| 473 | /* restart the queue if we had stopped it for TX fifo almost full */ |
| 474 | if (int_current & DNET_INTR_SRC_TX_FIFOAE) { |
| 475 | int_enable = dnet_readl(bp, INTR_ENB); |
| 476 | int_enable &= ~DNET_INTR_ENB_TX_FIFOAE; |
| 477 | dnet_writel(bp, int_enable, INTR_ENB); |
| 478 | netif_wake_queue(dev); |
| 479 | handled = 1; |
| 480 | } |
| 481 | |
| 482 | /* RX FIFO error checking */ |
| 483 | if (int_current & |
| 484 | (DNET_INTR_SRC_RX_CMDFIFOFF | DNET_INTR_SRC_RX_DATAFIFOFF)) { |
| 485 | printk(KERN_ERR "%s: RX fifo error %x, irq %x\n", __func__, |
| 486 | dnet_readl(bp, RX_STATUS), int_current); |
| 487 | /* we can only flush the RX FIFOs */ |
| 488 | dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH, SYS_CTL); |
| 489 | ndelay(500); |
| 490 | dnet_writel(bp, 0, SYS_CTL); |
| 491 | handled = 1; |
| 492 | } |
| 493 | |
| 494 | /* TX FIFO error checking */ |
| 495 | if (int_current & |
| 496 | (DNET_INTR_SRC_TX_FIFOFULL | DNET_INTR_SRC_TX_DISCFRM)) { |
| 497 | printk(KERN_ERR "%s: TX fifo error %x, irq %x\n", __func__, |
| 498 | dnet_readl(bp, TX_STATUS), int_current); |
| 499 | /* we can only flush the TX FIFOs */ |
| 500 | dnet_writel(bp, DNET_SYS_CTL_TXFIFOFLUSH, SYS_CTL); |
| 501 | ndelay(500); |
| 502 | dnet_writel(bp, 0, SYS_CTL); |
| 503 | handled = 1; |
| 504 | } |
| 505 | |
| 506 | if (int_current & DNET_INTR_SRC_RX_CMDFIFOAF) { |
Ilya Yanok | 9fae6c3 | 2009-03-13 09:51:46 -0700 | [diff] [blame] | 507 | if (napi_schedule_prep(&bp->napi)) { |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 508 | /* |
| 509 | * There's no point taking any more interrupts |
| 510 | * until we have processed the buffers |
| 511 | */ |
| 512 | /* Disable Rx interrupts and schedule NAPI poll */ |
| 513 | int_enable = dnet_readl(bp, INTR_ENB); |
| 514 | int_enable &= ~DNET_INTR_SRC_RX_CMDFIFOAF; |
| 515 | dnet_writel(bp, int_enable, INTR_ENB); |
Ilya Yanok | 9fae6c3 | 2009-03-13 09:51:46 -0700 | [diff] [blame] | 516 | __napi_schedule(&bp->napi); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 517 | } |
| 518 | handled = 1; |
| 519 | } |
| 520 | |
| 521 | if (!handled) |
| 522 | pr_debug("%s: irq %x remains\n", __func__, int_current); |
| 523 | |
| 524 | spin_unlock_irqrestore(&bp->lock, flags); |
| 525 | |
| 526 | return IRQ_RETVAL(handled); |
| 527 | } |
| 528 | |
| 529 | #ifdef DEBUG |
| 530 | static inline void dnet_print_skb(struct sk_buff *skb) |
| 531 | { |
| 532 | int k; |
| 533 | printk(KERN_DEBUG PFX "data:"); |
| 534 | for (k = 0; k < skb->len; k++) |
| 535 | printk(" %02x", (unsigned int)skb->data[k]); |
| 536 | printk("\n"); |
| 537 | } |
| 538 | #else |
| 539 | #define dnet_print_skb(skb) do {} while (0) |
| 540 | #endif |
| 541 | |
Stephen Hemminger | 61357325 | 2009-08-31 19:50:58 +0000 | [diff] [blame] | 542 | static netdev_tx_t dnet_start_xmit(struct sk_buff *skb, struct net_device *dev) |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 543 | { |
| 544 | |
| 545 | struct dnet *bp = netdev_priv(dev); |
| 546 | u32 tx_status, irq_enable; |
| 547 | unsigned int len, i, tx_cmd, wrsz; |
| 548 | unsigned long flags; |
| 549 | unsigned int *bufp; |
| 550 | |
| 551 | tx_status = dnet_readl(bp, TX_STATUS); |
| 552 | |
David S. Miller | 2c5849e | 2009-03-11 23:28:57 -0700 | [diff] [blame] | 553 | pr_debug("start_xmit: len %u head %p data %p\n", |
| 554 | skb->len, skb->head, skb->data); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 555 | dnet_print_skb(skb); |
| 556 | |
| 557 | /* frame size (words) */ |
| 558 | len = (skb->len + 3) >> 2; |
| 559 | |
| 560 | spin_lock_irqsave(&bp->lock, flags); |
| 561 | |
| 562 | tx_status = dnet_readl(bp, TX_STATUS); |
| 563 | |
David S. Miller | 2c5849e | 2009-03-11 23:28:57 -0700 | [diff] [blame] | 564 | bufp = (unsigned int *)(((unsigned long) skb->data) & ~0x3UL); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 565 | wrsz = (u32) skb->len + 3; |
David S. Miller | 2c5849e | 2009-03-11 23:28:57 -0700 | [diff] [blame] | 566 | wrsz += ((unsigned long) skb->data) & 0x3; |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 567 | wrsz >>= 2; |
David S. Miller | 2c5849e | 2009-03-11 23:28:57 -0700 | [diff] [blame] | 568 | tx_cmd = ((((unsigned long)(skb->data)) & 0x03) << 16) | (u32) skb->len; |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 569 | |
| 570 | /* check if there is enough room for the current frame */ |
| 571 | if (wrsz < (DNET_FIFO_SIZE - dnet_readl(bp, TX_FIFO_WCNT))) { |
| 572 | for (i = 0; i < wrsz; i++) |
| 573 | dnet_writel(bp, *bufp++, TX_DATA_FIFO); |
| 574 | |
| 575 | /* |
| 576 | * inform MAC that a packet's written and ready to be |
| 577 | * shipped out |
| 578 | */ |
| 579 | dnet_writel(bp, tx_cmd, TX_LEN_FIFO); |
| 580 | } |
| 581 | |
| 582 | if (dnet_readl(bp, TX_FIFO_WCNT) > DNET_FIFO_TX_DATA_AF_TH) { |
| 583 | netif_stop_queue(dev); |
| 584 | tx_status = dnet_readl(bp, INTR_SRC); |
| 585 | irq_enable = dnet_readl(bp, INTR_ENB); |
| 586 | irq_enable |= DNET_INTR_ENB_TX_FIFOAE; |
| 587 | dnet_writel(bp, irq_enable, INTR_ENB); |
| 588 | } |
| 589 | |
| 590 | /* free the buffer */ |
| 591 | dev_kfree_skb(skb); |
| 592 | |
| 593 | spin_unlock_irqrestore(&bp->lock, flags); |
| 594 | |
Patrick McHardy | 6ed1065 | 2009-06-23 06:03:08 +0000 | [diff] [blame] | 595 | return NETDEV_TX_OK; |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 596 | } |
| 597 | |
| 598 | static void dnet_reset_hw(struct dnet *bp) |
| 599 | { |
| 600 | /* put ts_mac in IDLE state i.e. disable rx/tx */ |
| 601 | dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, DNET_INTERNAL_MODE_FCEN); |
| 602 | |
| 603 | /* |
| 604 | * RX FIFO almost full threshold: only cmd FIFO almost full is |
| 605 | * implemented for RX side |
| 606 | */ |
| 607 | dnet_writel(bp, DNET_FIFO_RX_CMD_AF_TH, RX_FIFO_TH); |
| 608 | /* |
| 609 | * TX FIFO almost empty threshold: only data FIFO almost empty |
| 610 | * is implemented for TX side |
| 611 | */ |
| 612 | dnet_writel(bp, DNET_FIFO_TX_DATA_AE_TH, TX_FIFO_TH); |
| 613 | |
| 614 | /* flush rx/tx fifos */ |
| 615 | dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH | DNET_SYS_CTL_TXFIFOFLUSH, |
| 616 | SYS_CTL); |
| 617 | msleep(1); |
| 618 | dnet_writel(bp, 0, SYS_CTL); |
| 619 | } |
| 620 | |
| 621 | static void dnet_init_hw(struct dnet *bp) |
| 622 | { |
| 623 | u32 config; |
| 624 | |
| 625 | dnet_reset_hw(bp); |
| 626 | __dnet_set_hwaddr(bp); |
| 627 | |
| 628 | config = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG); |
| 629 | |
| 630 | if (bp->dev->flags & IFF_PROMISC) |
| 631 | /* Copy All Frames */ |
| 632 | config |= DNET_INTERNAL_RXTX_CONTROL_ENPROMISC; |
| 633 | if (!(bp->dev->flags & IFF_BROADCAST)) |
| 634 | /* No BroadCast */ |
| 635 | config |= DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST; |
| 636 | |
| 637 | config |= DNET_INTERNAL_RXTX_CONTROL_RXPAUSE | |
| 638 | DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST | |
| 639 | DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL | |
| 640 | DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS; |
| 641 | |
| 642 | dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, config); |
| 643 | |
| 644 | /* clear irq before enabling them */ |
| 645 | config = dnet_readl(bp, INTR_SRC); |
| 646 | |
| 647 | /* enable RX/TX interrupt, recv packet ready interrupt */ |
| 648 | dnet_writel(bp, DNET_INTR_ENB_GLOBAL_ENABLE | DNET_INTR_ENB_RX_SUMMARY | |
| 649 | DNET_INTR_ENB_TX_SUMMARY | DNET_INTR_ENB_RX_FIFOERR | |
| 650 | DNET_INTR_ENB_RX_ERROR | DNET_INTR_ENB_RX_FIFOFULL | |
| 651 | DNET_INTR_ENB_TX_FIFOFULL | DNET_INTR_ENB_TX_DISCFRM | |
| 652 | DNET_INTR_ENB_RX_PKTRDY, INTR_ENB); |
| 653 | } |
| 654 | |
| 655 | static int dnet_open(struct net_device *dev) |
| 656 | { |
| 657 | struct dnet *bp = netdev_priv(dev); |
| 658 | |
| 659 | /* if the phy is not yet register, retry later */ |
| 660 | if (!bp->phy_dev) |
| 661 | return -EAGAIN; |
| 662 | |
| 663 | if (!is_valid_ether_addr(dev->dev_addr)) |
| 664 | return -EADDRNOTAVAIL; |
| 665 | |
| 666 | napi_enable(&bp->napi); |
| 667 | dnet_init_hw(bp); |
| 668 | |
| 669 | phy_start_aneg(bp->phy_dev); |
| 670 | |
| 671 | /* schedule a link state check */ |
| 672 | phy_start(bp->phy_dev); |
| 673 | |
| 674 | netif_start_queue(dev); |
| 675 | |
| 676 | return 0; |
| 677 | } |
| 678 | |
| 679 | static int dnet_close(struct net_device *dev) |
| 680 | { |
| 681 | struct dnet *bp = netdev_priv(dev); |
| 682 | |
| 683 | netif_stop_queue(dev); |
| 684 | napi_disable(&bp->napi); |
| 685 | |
| 686 | if (bp->phy_dev) |
| 687 | phy_stop(bp->phy_dev); |
| 688 | |
| 689 | dnet_reset_hw(bp); |
| 690 | netif_carrier_off(dev); |
| 691 | |
| 692 | return 0; |
| 693 | } |
| 694 | |
| 695 | static inline void dnet_print_pretty_hwstats(struct dnet_stats *hwstat) |
| 696 | { |
| 697 | pr_debug("%s\n", __func__); |
| 698 | pr_debug("----------------------------- RX statistics " |
| 699 | "-------------------------------\n"); |
| 700 | pr_debug("RX_PKT_IGNR_CNT %-8x\n", hwstat->rx_pkt_ignr); |
| 701 | pr_debug("RX_LEN_CHK_ERR_CNT %-8x\n", hwstat->rx_len_chk_err); |
| 702 | pr_debug("RX_LNG_FRM_CNT %-8x\n", hwstat->rx_lng_frm); |
| 703 | pr_debug("RX_SHRT_FRM_CNT %-8x\n", hwstat->rx_shrt_frm); |
| 704 | pr_debug("RX_IPG_VIOL_CNT %-8x\n", hwstat->rx_ipg_viol); |
| 705 | pr_debug("RX_CRC_ERR_CNT %-8x\n", hwstat->rx_crc_err); |
| 706 | pr_debug("RX_OK_PKT_CNT %-8x\n", hwstat->rx_ok_pkt); |
| 707 | pr_debug("RX_CTL_FRM_CNT %-8x\n", hwstat->rx_ctl_frm); |
| 708 | pr_debug("RX_PAUSE_FRM_CNT %-8x\n", hwstat->rx_pause_frm); |
| 709 | pr_debug("RX_MULTICAST_CNT %-8x\n", hwstat->rx_multicast); |
| 710 | pr_debug("RX_BROADCAST_CNT %-8x\n", hwstat->rx_broadcast); |
| 711 | pr_debug("RX_VLAN_TAG_CNT %-8x\n", hwstat->rx_vlan_tag); |
| 712 | pr_debug("RX_PRE_SHRINK_CNT %-8x\n", hwstat->rx_pre_shrink); |
| 713 | pr_debug("RX_DRIB_NIB_CNT %-8x\n", hwstat->rx_drib_nib); |
| 714 | pr_debug("RX_UNSUP_OPCD_CNT %-8x\n", hwstat->rx_unsup_opcd); |
| 715 | pr_debug("RX_BYTE_CNT %-8x\n", hwstat->rx_byte); |
| 716 | pr_debug("----------------------------- TX statistics " |
| 717 | "-------------------------------\n"); |
| 718 | pr_debug("TX_UNICAST_CNT %-8x\n", hwstat->tx_unicast); |
| 719 | pr_debug("TX_PAUSE_FRM_CNT %-8x\n", hwstat->tx_pause_frm); |
| 720 | pr_debug("TX_MULTICAST_CNT %-8x\n", hwstat->tx_multicast); |
| 721 | pr_debug("TX_BRDCAST_CNT %-8x\n", hwstat->tx_brdcast); |
| 722 | pr_debug("TX_VLAN_TAG_CNT %-8x\n", hwstat->tx_vlan_tag); |
| 723 | pr_debug("TX_BAD_FCS_CNT %-8x\n", hwstat->tx_bad_fcs); |
| 724 | pr_debug("TX_JUMBO_CNT %-8x\n", hwstat->tx_jumbo); |
| 725 | pr_debug("TX_BYTE_CNT %-8x\n", hwstat->tx_byte); |
| 726 | } |
| 727 | |
| 728 | static struct net_device_stats *dnet_get_stats(struct net_device *dev) |
| 729 | { |
| 730 | |
| 731 | struct dnet *bp = netdev_priv(dev); |
| 732 | struct net_device_stats *nstat = &dev->stats; |
| 733 | struct dnet_stats *hwstat = &bp->hw_stats; |
| 734 | |
| 735 | /* read stats from hardware */ |
| 736 | dnet_update_stats(bp); |
| 737 | |
| 738 | /* Convert HW stats into netdevice stats */ |
| 739 | nstat->rx_errors = (hwstat->rx_len_chk_err + |
| 740 | hwstat->rx_lng_frm + hwstat->rx_shrt_frm + |
| 741 | /* ignore IGP violation error |
| 742 | hwstat->rx_ipg_viol + */ |
| 743 | hwstat->rx_crc_err + |
| 744 | hwstat->rx_pre_shrink + |
| 745 | hwstat->rx_drib_nib + hwstat->rx_unsup_opcd); |
| 746 | nstat->tx_errors = hwstat->tx_bad_fcs; |
| 747 | nstat->rx_length_errors = (hwstat->rx_len_chk_err + |
| 748 | hwstat->rx_lng_frm + |
| 749 | hwstat->rx_shrt_frm + hwstat->rx_pre_shrink); |
| 750 | nstat->rx_crc_errors = hwstat->rx_crc_err; |
| 751 | nstat->rx_frame_errors = hwstat->rx_pre_shrink + hwstat->rx_drib_nib; |
| 752 | nstat->rx_packets = hwstat->rx_ok_pkt; |
| 753 | nstat->tx_packets = (hwstat->tx_unicast + |
| 754 | hwstat->tx_multicast + hwstat->tx_brdcast); |
| 755 | nstat->rx_bytes = hwstat->rx_byte; |
| 756 | nstat->tx_bytes = hwstat->tx_byte; |
| 757 | nstat->multicast = hwstat->rx_multicast; |
| 758 | nstat->rx_missed_errors = hwstat->rx_pkt_ignr; |
| 759 | |
| 760 | dnet_print_pretty_hwstats(hwstat); |
| 761 | |
| 762 | return nstat; |
| 763 | } |
| 764 | |
| 765 | static int dnet_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 766 | { |
| 767 | struct dnet *bp = netdev_priv(dev); |
| 768 | struct phy_device *phydev = bp->phy_dev; |
| 769 | |
| 770 | if (!phydev) |
| 771 | return -ENODEV; |
| 772 | |
| 773 | return phy_ethtool_gset(phydev, cmd); |
| 774 | } |
| 775 | |
| 776 | static int dnet_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 777 | { |
| 778 | struct dnet *bp = netdev_priv(dev); |
| 779 | struct phy_device *phydev = bp->phy_dev; |
| 780 | |
| 781 | if (!phydev) |
| 782 | return -ENODEV; |
| 783 | |
| 784 | return phy_ethtool_sset(phydev, cmd); |
| 785 | } |
| 786 | |
| 787 | static int dnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
| 788 | { |
| 789 | struct dnet *bp = netdev_priv(dev); |
| 790 | struct phy_device *phydev = bp->phy_dev; |
| 791 | |
| 792 | if (!netif_running(dev)) |
| 793 | return -EINVAL; |
| 794 | |
| 795 | if (!phydev) |
| 796 | return -ENODEV; |
| 797 | |
Richard Cochran | 28b0411 | 2010-07-17 08:48:55 +0000 | [diff] [blame] | 798 | return phy_mii_ioctl(phydev, rq, cmd); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 799 | } |
| 800 | |
| 801 | static void dnet_get_drvinfo(struct net_device *dev, |
| 802 | struct ethtool_drvinfo *info) |
| 803 | { |
| 804 | strcpy(info->driver, DRV_NAME); |
| 805 | strcpy(info->version, DRV_VERSION); |
| 806 | strcpy(info->bus_info, "0"); |
| 807 | } |
| 808 | |
| 809 | static const struct ethtool_ops dnet_ethtool_ops = { |
| 810 | .get_settings = dnet_get_settings, |
| 811 | .set_settings = dnet_set_settings, |
| 812 | .get_drvinfo = dnet_get_drvinfo, |
| 813 | .get_link = ethtool_op_get_link, |
| 814 | }; |
| 815 | |
| 816 | static const struct net_device_ops dnet_netdev_ops = { |
| 817 | .ndo_open = dnet_open, |
| 818 | .ndo_stop = dnet_close, |
| 819 | .ndo_get_stats = dnet_get_stats, |
| 820 | .ndo_start_xmit = dnet_start_xmit, |
| 821 | .ndo_do_ioctl = dnet_ioctl, |
| 822 | .ndo_set_mac_address = eth_mac_addr, |
| 823 | .ndo_validate_addr = eth_validate_addr, |
| 824 | .ndo_change_mtu = eth_change_mtu, |
| 825 | }; |
| 826 | |
| 827 | static int __devinit dnet_probe(struct platform_device *pdev) |
| 828 | { |
| 829 | struct resource *res; |
| 830 | struct net_device *dev; |
| 831 | struct dnet *bp; |
| 832 | struct phy_device *phydev; |
| 833 | int err = -ENXIO; |
| 834 | unsigned int mem_base, mem_size, irq; |
| 835 | |
| 836 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 837 | if (!res) { |
| 838 | dev_err(&pdev->dev, "no mmio resource defined\n"); |
| 839 | goto err_out; |
| 840 | } |
| 841 | mem_base = res->start; |
| 842 | mem_size = resource_size(res); |
| 843 | irq = platform_get_irq(pdev, 0); |
| 844 | |
| 845 | if (!request_mem_region(mem_base, mem_size, DRV_NAME)) { |
| 846 | dev_err(&pdev->dev, "no memory region available\n"); |
| 847 | err = -EBUSY; |
| 848 | goto err_out; |
| 849 | } |
| 850 | |
| 851 | err = -ENOMEM; |
| 852 | dev = alloc_etherdev(sizeof(*bp)); |
| 853 | if (!dev) { |
| 854 | dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n"); |
Dan Carpenter | de140b0 | 2010-07-28 22:27:29 +0000 | [diff] [blame] | 855 | goto err_out_release_mem; |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 856 | } |
| 857 | |
| 858 | /* TODO: Actually, we have some interesting features... */ |
| 859 | dev->features |= 0; |
| 860 | |
| 861 | bp = netdev_priv(dev); |
| 862 | bp->dev = dev; |
| 863 | |
Ilya Yanok | b093dd9 | 2011-02-21 10:20:30 +0000 | [diff] [blame] | 864 | platform_set_drvdata(pdev, dev); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 865 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 866 | |
| 867 | spin_lock_init(&bp->lock); |
| 868 | |
| 869 | bp->regs = ioremap(mem_base, mem_size); |
| 870 | if (!bp->regs) { |
| 871 | dev_err(&pdev->dev, "failed to map registers, aborting.\n"); |
| 872 | err = -ENOMEM; |
| 873 | goto err_out_free_dev; |
| 874 | } |
| 875 | |
| 876 | dev->irq = irq; |
| 877 | err = request_irq(dev->irq, dnet_interrupt, 0, DRV_NAME, dev); |
| 878 | if (err) { |
| 879 | dev_err(&pdev->dev, "Unable to request IRQ %d (error %d)\n", |
| 880 | irq, err); |
| 881 | goto err_out_iounmap; |
| 882 | } |
| 883 | |
| 884 | dev->netdev_ops = &dnet_netdev_ops; |
| 885 | netif_napi_add(dev, &bp->napi, dnet_poll, 64); |
| 886 | dev->ethtool_ops = &dnet_ethtool_ops; |
| 887 | |
| 888 | dev->base_addr = (unsigned long)bp->regs; |
| 889 | |
| 890 | bp->capabilities = dnet_readl(bp, VERCAPS) & DNET_CAPS_MASK; |
| 891 | |
| 892 | dnet_get_hwaddr(bp); |
| 893 | |
| 894 | if (!is_valid_ether_addr(dev->dev_addr)) { |
| 895 | /* choose a random ethernet address */ |
| 896 | random_ether_addr(dev->dev_addr); |
| 897 | __dnet_set_hwaddr(bp); |
| 898 | } |
| 899 | |
| 900 | err = register_netdev(dev); |
| 901 | if (err) { |
| 902 | dev_err(&pdev->dev, "Cannot register net device, aborting.\n"); |
| 903 | goto err_out_free_irq; |
| 904 | } |
| 905 | |
| 906 | /* register the PHY board fixup (for Marvell 88E1111) */ |
| 907 | err = phy_register_fixup_for_uid(0x01410cc0, 0xfffffff0, |
| 908 | dnet_phy_marvell_fixup); |
| 909 | /* we can live without it, so just issue a warning */ |
| 910 | if (err) |
| 911 | dev_warn(&pdev->dev, "Cannot register PHY board fixup.\n"); |
| 912 | |
Dan Carpenter | de140b0 | 2010-07-28 22:27:29 +0000 | [diff] [blame] | 913 | err = dnet_mii_init(bp); |
| 914 | if (err) |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 915 | goto err_out_unregister_netdev; |
| 916 | |
| 917 | dev_info(&pdev->dev, "Dave DNET at 0x%p (0x%08x) irq %d %pM\n", |
| 918 | bp->regs, mem_base, dev->irq, dev->dev_addr); |
Frans Pop | 2381a55 | 2010-03-24 07:57:36 +0000 | [diff] [blame] | 919 | dev_info(&pdev->dev, "has %smdio, %sirq, %sgigabit, %sdma\n", |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 920 | (bp->capabilities & DNET_HAS_MDIO) ? "" : "no ", |
| 921 | (bp->capabilities & DNET_HAS_IRQ) ? "" : "no ", |
| 922 | (bp->capabilities & DNET_HAS_GIGABIT) ? "" : "no ", |
| 923 | (bp->capabilities & DNET_HAS_DMA) ? "" : "no "); |
| 924 | phydev = bp->phy_dev; |
| 925 | dev_info(&pdev->dev, "attached PHY driver [%s] " |
| 926 | "(mii_bus:phy_addr=%s, irq=%d)\n", |
Stephen Rothwell | 6580f57 | 2009-03-22 21:22:48 -0700 | [diff] [blame] | 927 | phydev->drv->name, dev_name(&phydev->dev), phydev->irq); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 928 | |
| 929 | return 0; |
| 930 | |
| 931 | err_out_unregister_netdev: |
| 932 | unregister_netdev(dev); |
| 933 | err_out_free_irq: |
| 934 | free_irq(dev->irq, dev); |
| 935 | err_out_iounmap: |
| 936 | iounmap(bp->regs); |
| 937 | err_out_free_dev: |
| 938 | free_netdev(dev); |
Dan Carpenter | de140b0 | 2010-07-28 22:27:29 +0000 | [diff] [blame] | 939 | err_out_release_mem: |
| 940 | release_mem_region(mem_base, mem_size); |
Ilya Yanok | 4796417 | 2009-03-11 23:26:02 -0700 | [diff] [blame] | 941 | err_out: |
| 942 | return err; |
| 943 | } |
| 944 | |
| 945 | static int __devexit dnet_remove(struct platform_device *pdev) |
| 946 | { |
| 947 | |
| 948 | struct net_device *dev; |
| 949 | struct dnet *bp; |
| 950 | |
| 951 | dev = platform_get_drvdata(pdev); |
| 952 | |
| 953 | if (dev) { |
| 954 | bp = netdev_priv(dev); |
| 955 | if (bp->phy_dev) |
| 956 | phy_disconnect(bp->phy_dev); |
| 957 | mdiobus_unregister(bp->mii_bus); |
| 958 | kfree(bp->mii_bus->irq); |
| 959 | mdiobus_free(bp->mii_bus); |
| 960 | unregister_netdev(dev); |
| 961 | free_irq(dev->irq, dev); |
| 962 | iounmap(bp->regs); |
| 963 | free_netdev(dev); |
| 964 | } |
| 965 | |
| 966 | return 0; |
| 967 | } |
| 968 | |
| 969 | static struct platform_driver dnet_driver = { |
| 970 | .probe = dnet_probe, |
| 971 | .remove = __devexit_p(dnet_remove), |
| 972 | .driver = { |
| 973 | .name = "dnet", |
| 974 | }, |
| 975 | }; |
| 976 | |
| 977 | static int __init dnet_init(void) |
| 978 | { |
| 979 | return platform_driver_register(&dnet_driver); |
| 980 | } |
| 981 | |
| 982 | static void __exit dnet_exit(void) |
| 983 | { |
| 984 | platform_driver_unregister(&dnet_driver); |
| 985 | } |
| 986 | |
| 987 | module_init(dnet_init); |
| 988 | module_exit(dnet_exit); |
| 989 | |
| 990 | MODULE_LICENSE("GPL"); |
| 991 | MODULE_DESCRIPTION("Dave DNET Ethernet driver"); |
| 992 | MODULE_AUTHOR("Ilya Yanok <yanok@emcraft.com>, " |
| 993 | "Matteo Vit <matteo.vit@dave.eu>"); |