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Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070013#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/mm.h>
17#include <linux/rbtree.h>
18#include <linux/genalloc.h>
19#include <linux/of.h>
Naveen Ramaraj8ad63602012-05-09 20:50:39 -070020#include <linux/of_address.h>
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070021#include <linux/io.h>
22#include <linux/platform_device.h>
23#include <linux/debugfs.h>
24#include <linux/seq_file.h>
Naveen Ramaraj8ad63602012-05-09 20:50:39 -070025#include <mach/ocmem_priv.h>
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070026
Naveen Ramaraj5b0982b2012-06-20 23:02:33 -070027#define OCMEM_REGION_CTL_BASE 0xFDD0003C
Naveen Ramaraj1ebbfad2012-07-20 19:05:59 -070028#define OCMEM_REGION_CTL_SIZE 0xFD0
Naveen Ramaraj1ebbfad2012-07-20 19:05:59 -070029#define GRAPHICS_REGION_CTL (0x17F000)
Naveen Ramaraj5b0982b2012-06-20 23:02:33 -070030
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070031struct ocmem_partition {
32 const char *name;
33 int id;
34 unsigned long p_start;
35 unsigned long p_size;
36 unsigned long p_min;
Naveen Ramaraj135cd672012-04-23 12:13:28 -070037 unsigned int p_tail;
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070038};
39
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070040struct ocmem_zone zones[OCMEM_CLIENT_MAX];
41
42struct ocmem_zone *get_zone(unsigned id)
43{
44 if (id < OCMEM_GRAPHICS || id >= OCMEM_CLIENT_MAX)
45 return NULL;
46 else
47 return &zones[id];
48}
49
50static struct ocmem_plat_data *ocmem_pdata;
51
52#define CLIENT_NAME_MAX 10
Naveen Ramarajcc4ec152012-05-14 09:55:29 -070053
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070054/* Must be in sync with enum ocmem_client */
55static const char *client_names[OCMEM_CLIENT_MAX] = {
56 "graphics",
57 "video",
58 "camera",
59 "hp_audio",
60 "voice",
61 "lp_audio",
62 "sensors",
Naveen Ramarajcc4ec152012-05-14 09:55:29 -070063 "other_os",
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070064};
65
66struct ocmem_quota_table {
67 const char *name;
68 int id;
69 unsigned long start;
70 unsigned long size;
71 unsigned long min;
Naveen Ramaraj135cd672012-04-23 12:13:28 -070072 unsigned int tail;
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070073};
74
75/* This static table will go away with device tree support */
76static struct ocmem_quota_table qt[OCMEM_CLIENT_MAX] = {
Naveen Ramaraj135cd672012-04-23 12:13:28 -070077 /* name, id, start, size, min, tail */
78 { "graphics", OCMEM_GRAPHICS, 0x0, 0x100000, 0x80000, 0},
79 { "video", OCMEM_VIDEO, 0x100000, 0x80000, 0x55000, 1},
80 { "camera", OCMEM_CAMERA, 0x0, 0x0, 0x0, 0},
81 { "voice", OCMEM_VOICE, 0x0, 0x0, 0x0, 0 },
82 { "hp_audio", OCMEM_HP_AUDIO, 0x0, 0x0, 0x0, 0},
83 { "lp_audio", OCMEM_LP_AUDIO, 0x80000, 0xA0000, 0xA0000, 0},
Naveen Ramarajcc4ec152012-05-14 09:55:29 -070084 { "other_os", OCMEM_OTHER_OS, 0x120000, 0x20000, 0x20000, 0},
Naveen Ramaraj135cd672012-04-23 12:13:28 -070085 { "sensors", OCMEM_SENSORS, 0x140000, 0x40000, 0x40000, 0},
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -070086};
87
88static inline int get_id(const char *name)
89{
90 int i = 0;
91 for (i = 0 ; i < OCMEM_CLIENT_MAX; i++) {
92 if (strncmp(name, client_names[i], CLIENT_NAME_MAX) == 0)
93 return i;
94 }
95 return -EINVAL;
96}
97
Naveen Ramarajcc4ec152012-05-14 09:55:29 -070098int check_id(int id)
99{
100 return (id < OCMEM_CLIENT_MAX && id >= OCMEM_GRAPHICS);
101}
102
103const char *get_name(int id)
104{
105 if (!check_id(id))
106 return NULL;
107 return client_names[id];
108}
109
Naveen Ramarajb9da05782012-05-07 09:07:35 -0700110inline unsigned long phys_to_offset(unsigned long addr)
111{
112 if (!ocmem_pdata)
113 return 0;
114 if (addr < ocmem_pdata->base ||
115 addr > (ocmem_pdata->base + ocmem_pdata->size))
116 return 0;
117 return addr - ocmem_pdata->base;
118}
119
120inline unsigned long offset_to_phys(unsigned long offset)
121{
122 if (!ocmem_pdata)
123 return 0;
124 if (offset > ocmem_pdata->size)
125 return 0;
126 return offset + ocmem_pdata->base;
127}
128
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700129static struct ocmem_plat_data *parse_static_config(struct platform_device *pdev)
130{
131 struct ocmem_plat_data *pdata = NULL;
132 struct ocmem_partition *parts = NULL;
133 struct device *dev = &pdev->dev;
Naveen Ramaraje653c2b2012-05-30 12:59:25 -0700134 unsigned nr_parts = 0;
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700135 int i;
136 int j;
137
138 pdata = devm_kzalloc(dev, sizeof(struct ocmem_plat_data),
139 GFP_KERNEL);
140
141 if (!pdata) {
142 dev_err(dev, "Unable to allocate memory for"
143 " platform data\n");
144 return NULL;
145 }
146
147 for (i = 0 ; i < ARRAY_SIZE(qt); i++)
148 if (qt[i].size != 0x0)
149 nr_parts++;
150
151 if (nr_parts == 0x0) {
152 dev_err(dev, "No valid ocmem partitions\n");
153 return NULL;
154 } else
155 dev_info(dev, "Total partitions = %d\n", nr_parts);
156
157 parts = devm_kzalloc(dev, sizeof(struct ocmem_partition) * nr_parts,
158 GFP_KERNEL);
159
160 if (!parts) {
161 dev_err(dev, "Unable to allocate memory for"
162 " partition data\n");
163 return NULL;
164 }
165
166 for (i = 0, j = 0; i < ARRAY_SIZE(qt); i++) {
167 if (qt[i].size == 0x0) {
168 dev_dbg(dev, "Skipping creation of pool for %s\n",
169 qt[i].name);
170 continue;
171 }
172 parts[j].id = qt[i].id;
173 parts[j].p_size = qt[i].size;
174 parts[j].p_start = qt[i].start;
175 parts[j].p_min = qt[i].min;
Naveen Ramaraj135cd672012-04-23 12:13:28 -0700176 parts[j].p_tail = qt[i].tail;
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700177 j++;
178 }
179 BUG_ON(j != nr_parts);
180 pdata->nr_parts = nr_parts;
181 pdata->parts = parts;
182 pdata->base = OCMEM_PHYS_BASE;
183 pdata->size = OCMEM_PHYS_SIZE;
184 return pdata;
185}
186
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700187int __devinit of_ocmem_parse_regions(struct device *dev,
188 struct ocmem_partition **part)
189{
190 const char *name;
191 struct device_node *child = NULL;
192 int nr_parts = 0;
193 int i = 0;
194 int rc = 0;
195 int id = -1;
196
197 /*Compute total partitions */
198 for_each_child_of_node(dev->of_node, child)
199 nr_parts++;
200
201 if (nr_parts == 0)
202 return 0;
203
204 *part = devm_kzalloc(dev, nr_parts * sizeof(**part),
205 GFP_KERNEL);
206
207 if (!*part)
208 return -ENOMEM;
209
210 for_each_child_of_node(dev->of_node, child)
211 {
212 const u32 *addr;
213 u32 min;
214 u64 size;
215 u64 p_start;
216
217 addr = of_get_address(child, 0, &size, NULL);
218
219 if (!addr) {
220 dev_err(dev, "Invalid addr for partition %d, ignored\n",
221 i);
222 continue;
223 }
224
225 rc = of_property_read_u32(child, "qcom,ocmem-part-min", &min);
226
227 if (rc) {
228 dev_err(dev, "No min for partition %d, ignored\n", i);
229 continue;
230 }
231
232 rc = of_property_read_string(child, "qcom,ocmem-part-name",
233 &name);
234
235 if (rc) {
236 dev_err(dev, "No name for partition %d, ignored\n", i);
237 continue;
238 }
239
240 id = get_id(name);
241
242 if (id < 0) {
243 dev_err(dev, "Ignoring invalid partition %s\n", name);
244 continue;
245 }
246
247 p_start = of_translate_address(child, addr);
248
249 if (p_start == OF_BAD_ADDR) {
250 dev_err(dev, "Invalid offset for partition %d\n", i);
251 continue;
252 }
253
254 (*part)[i].p_start = p_start;
255 (*part)[i].p_size = size;
256 (*part)[i].id = id;
257 (*part)[i].name = name;
258 (*part)[i].p_min = min;
259 (*part)[i].p_tail = of_property_read_bool(child, "tail");
260 i++;
261 }
262
263 return i;
264}
265
Naveen Ramaraj99b07562012-05-28 20:57:09 -0700266#if defined(CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL)
267static int parse_power_ctrl_config(struct ocmem_plat_data *pdata,
268 struct device_node *node)
269{
270 pdata->rpm_pwr_ctrl = false;
271 pdata->rpm_rsc_type = ~0x0;
272 return 0;
273}
274#else
275static int parse_power_ctrl_config(struct ocmem_plat_data *pdata,
276 struct device_node *node)
277{
278 unsigned rsc_type = ~0x0;
279 pdata->rpm_pwr_ctrl = false;
280 if (of_property_read_u32(node, "qcom,resource-type",
281 &rsc_type))
282 return -EINVAL;
283 pdata->rpm_pwr_ctrl = true;
284 pdata->rpm_rsc_type = rsc_type;
285 return 0;
286
287}
288#endif /* CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL */
289
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700290static struct ocmem_plat_data *parse_dt_config(struct platform_device *pdev)
291{
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700292 struct device *dev = &pdev->dev;
293 struct device_node *node = pdev->dev.of_node;
294 struct ocmem_plat_data *pdata = NULL;
295 struct ocmem_partition *parts = NULL;
296 struct resource *ocmem_irq;
297 struct resource *dm_irq;
298 struct resource *ocmem_mem;
299 struct resource *reg_base;
300 struct resource *br_base;
301 struct resource *dm_base;
302 struct resource *ocmem_mem_io;
303 unsigned nr_parts = 0;
304 unsigned nr_regions = 0;
305
306 pdata = devm_kzalloc(dev, sizeof(struct ocmem_plat_data),
307 GFP_KERNEL);
308
309 if (!pdata) {
310 dev_err(dev, "Unable to allocate memory for platform data\n");
311 return NULL;
312 }
313
314 ocmem_mem = platform_get_resource_byname(pdev, IORESOURCE_MEM,
315 "ocmem_physical");
316 if (!ocmem_mem) {
317 dev_err(dev, "No OCMEM memory resource\n");
318 return NULL;
319 }
320
321 ocmem_mem_io = request_mem_region(ocmem_mem->start,
322 resource_size(ocmem_mem), pdev->name);
323
324 if (!ocmem_mem_io) {
325 dev_err(dev, "Could not claim OCMEM memory\n");
326 return NULL;
327 }
328
329 pdata->base = ocmem_mem->start;
330 pdata->size = resource_size(ocmem_mem);
331 pdata->vbase = devm_ioremap_nocache(dev, ocmem_mem->start,
332 resource_size(ocmem_mem));
333 if (!pdata->vbase) {
334 dev_err(dev, "Could not ioremap ocmem memory\n");
335 return NULL;
336 }
337
338 reg_base = platform_get_resource_byname(pdev, IORESOURCE_MEM,
339 "ocmem_ctrl_physical");
340 if (!reg_base) {
341 dev_err(dev, "No OCMEM register resource\n");
342 return NULL;
343 }
344
345 pdata->reg_base = devm_ioremap_nocache(dev, reg_base->start,
346 resource_size(reg_base));
347 if (!pdata->reg_base) {
348 dev_err(dev, "Could not ioremap register map\n");
349 return NULL;
350 }
351
352 br_base = platform_get_resource_byname(pdev, IORESOURCE_MEM,
353 "br_ctrl_physical");
354 if (!br_base) {
355 dev_err(dev, "No OCMEM BR resource\n");
356 return NULL;
357 }
358
359 pdata->br_base = devm_ioremap_nocache(dev, br_base->start,
360 resource_size(br_base));
361 if (!pdata->br_base) {
362 dev_err(dev, "Could not ioremap BR resource\n");
363 return NULL;
364 }
365
366 dm_base = platform_get_resource_byname(pdev, IORESOURCE_MEM,
367 "dm_ctrl_physical");
368 if (!dm_base) {
369 dev_err(dev, "No OCMEM DM resource\n");
370 return NULL;
371 }
372
373 pdata->dm_base = devm_ioremap_nocache(dev, dm_base->start,
374 resource_size(dm_base));
375 if (!pdata->dm_base) {
376 dev_err(dev, "Could not ioremap DM resource\n");
377 return NULL;
378 }
379
380 ocmem_irq = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
381 "ocmem_irq");
382
383 if (!ocmem_irq) {
384 dev_err(dev, "No OCMEM IRQ resource\n");
385 return NULL;
386 }
387
388 dm_irq = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
389 "dm_irq");
390
391 if (!dm_irq) {
392 dev_err(dev, "No DM IRQ resource\n");
393 return NULL;
394 }
395
396 if (of_property_read_u32(node, "qcom,ocmem-num-regions",
397 &nr_regions)) {
398 dev_err(dev, "No OCMEM memory regions specified\n");
399 }
400
401 if (nr_regions == 0) {
402 dev_err(dev, "No hardware memory regions found\n");
403 return NULL;
404 }
405
406 /* Figure out the number of partititons */
407 nr_parts = of_ocmem_parse_regions(dev, &parts);
408 if (nr_parts <= 0) {
409 dev_err(dev, "No valid OCMEM partitions found\n");
410 goto pdata_error;
411 } else
412 dev_dbg(dev, "Found %d ocmem partitions\n", nr_parts);
413
Naveen Ramaraj99b07562012-05-28 20:57:09 -0700414 if (parse_power_ctrl_config(pdata, node)) {
415 dev_err(dev, "No OCMEM RPM Resource specified\n");
416 return NULL;
417 }
418
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700419 pdata->nr_parts = nr_parts;
420 pdata->parts = parts;
421 pdata->nr_regions = nr_regions;
422 pdata->ocmem_irq = ocmem_irq->start;
423 pdata->dm_irq = dm_irq->start;
424 return pdata;
425pdata_error:
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700426 return NULL;
427}
428
429static int ocmem_zone_init(struct platform_device *pdev)
430{
431
432 int ret = -1;
433 int i = 0;
434 unsigned active_zones = 0;
435
436 struct ocmem_zone *zone = NULL;
437 struct ocmem_zone_ops *z_ops = NULL;
438 struct device *dev = &pdev->dev;
439 unsigned long start;
440 struct ocmem_plat_data *pdata = NULL;
441
442 pdata = platform_get_drvdata(pdev);
443
444 for (i = 0; i < pdata->nr_parts; i++) {
445 struct ocmem_partition *part = &pdata->parts[i];
446 zone = get_zone(part->id);
447
448 dev_dbg(dev, "Partition %d, start %lx, size %lx for %s\n",
449 i, part->p_start, part->p_size,
450 client_names[part->id]);
451
452 if (part->p_size > pdata->size) {
453 dev_alert(dev, "Quota > ocmem_size for id:%d\n",
454 part->id);
455 continue;
456 }
457
458 zone->z_pool = gen_pool_create(PAGE_SHIFT, -1);
459
460 if (!zone->z_pool) {
461 dev_alert(dev, "Creating pool failed for id:%d\n",
462 part->id);
463 return -EBUSY;
464 }
465
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700466 start = part->p_start;
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700467 ret = gen_pool_add(zone->z_pool, start,
468 part->p_size, -1);
469
470 if (ret < 0) {
471 gen_pool_destroy(zone->z_pool);
472 dev_alert(dev, "Unable to back pool %d with "
473 "buffer:%lx\n", part->id, part->p_size);
474 return -EBUSY;
475 }
476
477 /* Initialize zone allocators */
478 z_ops = devm_kzalloc(dev, sizeof(struct ocmem_zone_ops),
479 GFP_KERNEL);
480 if (!z_ops) {
481 pr_alert("ocmem: Unable to allocate memory for"
482 "zone ops:%d\n", i);
483 return -EBUSY;
484 }
485
486 /* Initialize zone parameters */
487 zone->z_start = start;
488 zone->z_head = zone->z_start;
489 zone->z_end = start + part->p_size;
490 zone->z_tail = zone->z_end;
491 zone->z_free = part->p_size;
492 zone->owner = part->id;
493 zone->active_regions = 0;
494 zone->max_regions = 0;
Naveen Ramarajcc4ec152012-05-14 09:55:29 -0700495 INIT_LIST_HEAD(&zone->req_list);
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700496 zone->z_ops = z_ops;
Naveen Ramaraj135cd672012-04-23 12:13:28 -0700497 if (part->p_tail) {
498 z_ops->allocate = allocate_tail;
499 z_ops->free = free_tail;
500 } else {
501 z_ops->allocate = allocate_head;
502 z_ops->free = free_head;
503 }
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700504 active_zones++;
505
506 if (active_zones == 1)
507 pr_info("Physical OCMEM zone layout:\n");
508
509 pr_info(" zone %s\t: 0x%08lx - 0x%08lx (%4ld KB)\n",
510 client_names[part->id], zone->z_start,
511 zone->z_end, part->p_size/SZ_1K);
512 }
513
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700514 dev_dbg(dev, "Total active zones = %d\n", active_zones);
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700515 return 0;
516}
517
518static int __devinit msm_ocmem_probe(struct platform_device *pdev)
519{
520 struct device *dev = &pdev->dev;
Naveen Ramaraj5b0982b2012-06-20 23:02:33 -0700521 void *ocmem_region_vbase = NULL;
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700522
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700523 if (!pdev->dev.of_node) {
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700524 dev_info(dev, "Missing Configuration in Device Tree\n");
525 ocmem_pdata = parse_static_config(pdev);
526 } else {
527 ocmem_pdata = parse_dt_config(pdev);
528 }
529
530 /* Check if we have some configuration data to start */
531 if (!ocmem_pdata)
532 return -ENODEV;
533
534 /* Sanity Checks */
535 BUG_ON(!IS_ALIGNED(ocmem_pdata->size, PAGE_SIZE));
536 BUG_ON(!IS_ALIGNED(ocmem_pdata->base, PAGE_SIZE));
537
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700538 dev_info(dev, "OCMEM Virtual addr %p\n", ocmem_pdata->vbase);
539
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700540 platform_set_drvdata(pdev, ocmem_pdata);
541
Naveen Ramaraj99b07562012-05-28 20:57:09 -0700542 if (ocmem_core_init(pdev))
543 return -EBUSY;
544
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700545 if (ocmem_zone_init(pdev))
546 return -EBUSY;
547
Naveen Ramarajbdf4dfe2012-04-23 14:09:50 -0700548 if (ocmem_notifier_init())
549 return -EBUSY;
550
Naveen Ramarajb9da05782012-05-07 09:07:35 -0700551 if (ocmem_sched_init())
552 return -EBUSY;
Naveen Ramaraj5b0982b2012-06-20 23:02:33 -0700553
554 ocmem_region_vbase = devm_ioremap_nocache(dev, OCMEM_REGION_CTL_BASE,
555 OCMEM_REGION_CTL_SIZE);
556 if (!ocmem_region_vbase)
557 return -EBUSY;
Naveen Ramaraj99b07562012-05-28 20:57:09 -0700558
Naveen Ramaraj1ebbfad2012-07-20 19:05:59 -0700559 /* Enable the ocmem graphics mpU as a workaround in Virtio */
560 /* This will be programmed by TZ after TZ support is integrated */
561 writel_relaxed(GRAPHICS_REGION_CTL, ocmem_region_vbase + 0xFCC);
Naveen Ramarajcc4ec152012-05-14 09:55:29 -0700562
563 if (ocmem_rdm_init(pdev))
564 return -EBUSY;
565
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700566 dev_dbg(dev, "initialized successfully\n");
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700567 return 0;
568}
569
570static int __devexit msm_ocmem_remove(struct platform_device *pdev)
571{
572 return 0;
573}
574
575static struct of_device_id msm_ocmem_dt_match[] = {
Naveen Ramaraj8ad63602012-05-09 20:50:39 -0700576 { .compatible = "qcom,msm-ocmem",
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700577 },
578 {}
579};
580
581static struct platform_driver msm_ocmem_driver = {
582 .probe = msm_ocmem_probe,
583 .remove = __devexit_p(msm_ocmem_remove),
584 .driver = {
585 .name = "msm_ocmem",
586 .owner = THIS_MODULE,
587 .of_match_table = msm_ocmem_dt_match,
588 },
589};
590
591static int __init ocmem_init(void)
592{
593 return platform_driver_register(&msm_ocmem_driver);
594}
595subsys_initcall(ocmem_init);
596
597static void __exit ocmem_exit(void)
598{
599 platform_driver_unregister(&msm_ocmem_driver);
600}
601module_exit(ocmem_exit);
602
603MODULE_LICENSE("GPL v2");
604MODULE_DESCRIPTION("Support for On-Chip Memory on MSM");