blob: 212d97084bd71dc11bbda9308574f1c3cbc4ea3e [file] [log] [blame]
Mark A. Greer85937902009-06-03 18:41:53 -07001/*
2 * TI DA830/OMAP L137 EVM board
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
6 *
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12#include <linux/kernel.h>
Mark A. Greer85937902009-06-03 18:41:53 -070013#include <linux/init.h>
14#include <linux/console.h>
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +040015#include <linux/interrupt.h>
Steve Chen13e1f042009-09-15 18:15:06 -070016#include <linux/gpio.h>
David A. Griego733975a2009-09-18 14:15:18 -070017#include <linux/platform_device.h>
Mark A. Greer85937902009-06-03 18:41:53 -070018#include <linux/i2c.h>
Steve Chen13e1f042009-09-15 18:15:06 -070019#include <linux/i2c/pcf857x.h>
Mark A. Greer85937902009-06-03 18:41:53 -070020#include <linux/i2c/at24.h>
David A. Griego733975a2009-09-18 14:15:18 -070021#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h>
Mark A. Greer85937902009-06-03 18:41:53 -070023
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26
Mark A. Greer85937902009-06-03 18:41:53 -070027#include <mach/cp_intc.h>
Mark A. Greer32bf0782009-08-28 15:05:21 -070028#include <mach/mux.h>
David A. Griego733975a2009-09-18 14:15:18 -070029#include <mach/nand.h>
Mark A. Greer85937902009-06-03 18:41:53 -070030#include <mach/da8xx.h>
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +040031#include <mach/usb.h>
Mark A. Greer85937902009-06-03 18:41:53 -070032
33#define DA830_EVM_PHY_MASK 0x0
34#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
35
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +040036/*
37 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
38 */
39#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
40#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
41
42static const short da830_evm_usb11_pins[] = {
43 DA830_GPIO1_15, DA830_GPIO2_4,
44 -1
45};
46
47static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
48
49static int da830_evm_usb_set_power(unsigned port, int on)
50{
51 gpio_set_value(ON_BD_USB_DRV, on);
52 return 0;
53}
54
55static int da830_evm_usb_get_power(unsigned port)
56{
57 return gpio_get_value(ON_BD_USB_DRV);
58}
59
60static int da830_evm_usb_get_oci(unsigned port)
61{
62 return !gpio_get_value(ON_BD_USB_OVC);
63}
64
65static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
66
67static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
68{
69 int irq = gpio_to_irq(ON_BD_USB_OVC);
70 int error = 0;
71
72 if (handler != NULL) {
73 da830_evm_usb_ocic_handler = handler;
74
75 error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
76 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
77 "OHCI over-current indicator", NULL);
78 if (error)
79 printk(KERN_ERR "%s: could not request IRQ to watch "
80 "over-current indicator changes\n", __func__);
81 } else
82 free_irq(irq, NULL);
83
84 return error;
85}
86
87static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
88 .set_power = da830_evm_usb_set_power,
89 .get_power = da830_evm_usb_get_power,
90 .get_oci = da830_evm_usb_get_oci,
91 .ocic_notify = da830_evm_usb_ocic_notify,
92
93 /* TPS2065 switch @ 5V */
94 .potpgt = (3 + 1) / 2, /* 3 ms max */
95};
96
97static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
98{
99 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
100 return IRQ_HANDLED;
101}
102
103static __init void da830_evm_usb_init(void)
104{
105 u32 cfgchip2;
106 int ret;
107
108 /*
109 * Set up USB clock/mode in the CFGCHIP2 register.
110 * FYI: CFGCHIP2 is 0x0000ef00 initially.
111 */
Sekhar Norid2de0582009-11-16 17:21:32 +0530112 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +0400113
114 /* USB2.0 PHY reference clock is 24 MHz */
115 cfgchip2 &= ~CFGCHIP2_REFFREQ;
116 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
117
118 /*
119 * Select internal reference clock for USB 2.0 PHY
120 * and use it as a clock source for USB 1.1 PHY
121 * (this is the default setting anyway).
122 */
123 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
124 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
125
Sergei Shtylyovca6a2722009-10-30 23:52:04 +0400126 /*
127 * We have to override VBUS/ID signals when MUSB is configured into the
128 * host-only mode -- ID pin will float if no cable is connected, so the
129 * controller won't be able to drive VBUS thinking that it's a B-device.
130 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
131 */
132 cfgchip2 &= ~CFGCHIP2_OTGMODE;
133#ifdef CONFIG_USB_MUSB_HOST
134 cfgchip2 |= CFGCHIP2_FORCE_HOST;
135#else
136 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
137#endif
138
Sekhar Norid2de0582009-11-16 17:21:32 +0530139 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +0400140
Sergei Shtylyovca6a2722009-10-30 23:52:04 +0400141 /* USB_REFCLKIN is not used. */
142 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
143 if (ret)
144 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
145 __func__, ret);
146 else {
147 /*
148 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
149 * with the power on to power good time of 3 ms.
150 */
151 ret = da8xx_register_usb20(1000, 3);
152 if (ret)
153 pr_warning("%s: USB 2.0 registration failed: %d\n",
154 __func__, ret);
155 }
156
Cyril Chemparathy3821d102010-03-25 17:43:48 -0400157 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +0400158 if (ret) {
159 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
160 __func__, ret);
161 return;
162 }
163
164 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
165 if (ret) {
166 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
167 "power control: %d\n", __func__, ret);
168 return;
169 }
170 gpio_direction_output(ON_BD_USB_DRV, 0);
171
172 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
173 if (ret) {
174 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
175 "over-current indicator: %d\n", __func__, ret);
176 return;
177 }
178 gpio_direction_input(ON_BD_USB_OVC);
179
180 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
181 if (ret)
182 pr_warning("%s: USB 1.1 registration failed: %d\n",
183 __func__, ret);
184}
185
Mark A. Greer85937902009-06-03 18:41:53 -0700186static struct davinci_uart_config da830_evm_uart_config __initdata = {
187 .enabled_uarts = 0x7,
188};
189
Mark A. Greer32bf0782009-08-28 15:05:21 -0700190static const short da830_evm_mcasp1_pins[] = {
191 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
192 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
193 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
194 DA830_AXR1_11,
195 -1
196};
197
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400198static u8 da830_iis_serializer_direction[] = {
199 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
200 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
201 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
202};
203
204static struct snd_platform_data da830_evm_snd_data = {
205 .tx_dma_offset = 0x2000,
206 .rx_dma_offset = 0x2000,
207 .op_mode = DAVINCI_MCASP_IIS_MODE,
208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
209 .tdm_slots = 2,
210 .serial_dir = da830_iis_serializer_direction,
211 .eventq_no = EVENTQ_0,
212 .version = MCASP_VERSION_2,
213 .txnumevt = 1,
214 .rxnumevt = 1,
215};
216
David A. Griego2eb30c82009-09-15 18:10:20 -0700217/*
218 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
219 */
220static const short da830_evm_mmc_sd_pins[] = {
221 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
222 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
223 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
224 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
225 -1
226};
227
228#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
Vipin Bhandari8ccfd3f2010-03-10 14:03:01 +0530229#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
David A. Griego2eb30c82009-09-15 18:10:20 -0700230
231static int da830_evm_mmc_get_ro(int index)
232{
233 return gpio_get_value(DA830_MMCSD_WP_PIN);
234}
235
Vipin Bhandari8ccfd3f2010-03-10 14:03:01 +0530236static int da830_evm_mmc_get_cd(int index)
237{
238 return !gpio_get_value(DA830_MMCSD_CD_PIN);
239}
240
David A. Griego2eb30c82009-09-15 18:10:20 -0700241static struct davinci_mmc_config da830_evm_mmc_config = {
242 .get_ro = da830_evm_mmc_get_ro,
Vipin Bhandari8ccfd3f2010-03-10 14:03:01 +0530243 .get_cd = da830_evm_mmc_get_cd,
Vipin Bhandarid154fed2010-03-10 14:03:02 +0530244 .wires = 8,
Chaithrika U S0046d0b2009-11-03 15:46:14 +0530245 .max_freq = 50000000,
246 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
David A. Griego2eb30c82009-09-15 18:10:20 -0700247 .version = MMC_CTLR_VERSION_2,
248};
249
250static inline void da830_evm_init_mmc(void)
251{
252 int ret;
253
Cyril Chemparathy3821d102010-03-25 17:43:48 -0400254 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
David A. Griego2eb30c82009-09-15 18:10:20 -0700255 if (ret) {
256 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
257 ret);
258 return;
259 }
260
261 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
262 if (ret) {
263 pr_warning("da830_evm_init: can not open GPIO %d\n",
264 DA830_MMCSD_WP_PIN);
265 return;
266 }
267 gpio_direction_input(DA830_MMCSD_WP_PIN);
268
Vipin Bhandari8ccfd3f2010-03-10 14:03:01 +0530269 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
270 if (ret) {
271 pr_warning("da830_evm_init: can not open GPIO %d\n",
272 DA830_MMCSD_CD_PIN);
273 return;
274 }
275 gpio_direction_input(DA830_MMCSD_CD_PIN);
276
David A. Griego2eb30c82009-09-15 18:10:20 -0700277 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
278 if (ret) {
279 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
280 ret);
281 gpio_free(DA830_MMCSD_WP_PIN);
282 }
283}
284
Sekhar Noria0433ac2009-10-09 20:55:43 +0530285/*
286 * UI board NAND/NOR flashes only use 8-bit data bus.
287 */
288static const short da830_evm_emif25_pins[] = {
289 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
290 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
291 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
292 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
293 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
294 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
295 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
296 -1
297};
298
Sekhar Norib5ebe4e2009-10-21 21:18:21 +0530299#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
300#define HAS_MMC 1
301#else
302#define HAS_MMC 0
303#endif
304
David A. Griego733975a2009-09-18 14:15:18 -0700305#ifdef CONFIG_DA830_UI_NAND
306static struct mtd_partition da830_evm_nand_partitions[] = {
307 /* bootloader (U-Boot, etc) in first sector */
308 [0] = {
309 .name = "bootloader",
310 .offset = 0,
311 .size = SZ_128K,
312 .mask_flags = MTD_WRITEABLE, /* force read-only */
313 },
314 /* bootloader params in the next sector */
315 [1] = {
316 .name = "params",
317 .offset = MTDPART_OFS_APPEND,
318 .size = SZ_128K,
319 .mask_flags = MTD_WRITEABLE, /* force read-only */
320 },
321 /* kernel */
322 [2] = {
323 .name = "kernel",
324 .offset = MTDPART_OFS_APPEND,
325 .size = SZ_2M,
326 .mask_flags = 0,
327 },
328 /* file system */
329 [3] = {
330 .name = "filesystem",
331 .offset = MTDPART_OFS_APPEND,
332 .size = MTDPART_SIZ_FULL,
333 .mask_flags = 0,
334 }
335};
336
337/* flash bbt decriptors */
338static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
339static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
340
341static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
342 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
343 NAND_BBT_WRITE | NAND_BBT_2BIT |
344 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
345 .offs = 2,
346 .len = 4,
347 .veroffs = 16,
348 .maxblocks = 4,
349 .pattern = da830_evm_nand_bbt_pattern
350};
351
352static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
353 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
354 NAND_BBT_WRITE | NAND_BBT_2BIT |
355 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
356 .offs = 2,
357 .len = 4,
358 .veroffs = 16,
359 .maxblocks = 4,
360 .pattern = da830_evm_nand_mirror_pattern
361};
362
363static struct davinci_nand_pdata da830_evm_nand_pdata = {
364 .parts = da830_evm_nand_partitions,
365 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
366 .ecc_mode = NAND_ECC_HW,
367 .ecc_bits = 4,
368 .options = NAND_USE_FLASH_BBT,
369 .bbt_td = &da830_evm_nand_bbt_main_descr,
370 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
371};
372
373static struct resource da830_evm_nand_resources[] = {
374 [0] = { /* First memory resource is NAND I/O window */
Sergei Shtylyov002cb2d2010-04-16 21:29:20 +0400375 .start = DA8XX_AEMIF_CS3_BASE,
376 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
David A. Griego733975a2009-09-18 14:15:18 -0700377 .flags = IORESOURCE_MEM,
378 },
379 [1] = { /* Second memory resource is AEMIF control registers */
Sergei Shtylyov002cb2d2010-04-16 21:29:20 +0400380 .start = DA8XX_AEMIF_CTL_BASE,
381 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
David A. Griego733975a2009-09-18 14:15:18 -0700382 .flags = IORESOURCE_MEM,
383 },
384};
385
386static struct platform_device da830_evm_nand_device = {
387 .name = "davinci_nand",
388 .id = 1,
389 .dev = {
390 .platform_data = &da830_evm_nand_pdata,
391 },
392 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
393 .resource = da830_evm_nand_resources,
394};
Sekhar Noria0433ac2009-10-09 20:55:43 +0530395
Sekhar Nori77316f02009-10-21 21:18:20 +0530396static inline void da830_evm_init_nand(int mux_mode)
Sekhar Noria0433ac2009-10-09 20:55:43 +0530397{
398 int ret;
399
Sekhar Norib5ebe4e2009-10-21 21:18:21 +0530400 if (HAS_MMC) {
401 pr_warning("WARNING: both MMC/SD and NAND are "
402 "enabled, but they share AEMIF pins.\n"
403 "\tDisable MMC/SD for NAND support.\n");
404 return;
405 }
406
Cyril Chemparathy3821d102010-03-25 17:43:48 -0400407 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
Sekhar Noria0433ac2009-10-09 20:55:43 +0530408 if (ret)
409 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
410 ret);
411
412 ret = platform_device_register(&da830_evm_nand_device);
413 if (ret)
414 pr_warning("da830_evm_init: NAND device not registered.\n");
Sekhar Nori77316f02009-10-21 21:18:20 +0530415
416 gpio_direction_output(mux_mode, 1);
Sekhar Noria0433ac2009-10-09 20:55:43 +0530417}
418#else
Sekhar Nori77316f02009-10-21 21:18:20 +0530419static inline void da830_evm_init_nand(int mux_mode) { }
David A. Griego733975a2009-09-18 14:15:18 -0700420#endif
421
Sekhar Noria0433ac2009-10-09 20:55:43 +0530422#ifdef CONFIG_DA830_UI_LCD
Sekhar Nori77316f02009-10-21 21:18:20 +0530423static inline void da830_evm_init_lcdc(int mux_mode)
Sekhar Noria0433ac2009-10-09 20:55:43 +0530424{
425 int ret;
426
Cyril Chemparathy3821d102010-03-25 17:43:48 -0400427 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
Sekhar Noria0433ac2009-10-09 20:55:43 +0530428 if (ret)
429 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
430 ret);
431
432 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
433 if (ret)
434 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
Sekhar Nori77316f02009-10-21 21:18:20 +0530435
436 gpio_direction_output(mux_mode, 0);
Sekhar Noria0433ac2009-10-09 20:55:43 +0530437}
438#else
Sekhar Nori77316f02009-10-21 21:18:20 +0530439static inline void da830_evm_init_lcdc(int mux_mode) { }
Sekhar Noria0433ac2009-10-09 20:55:43 +0530440#endif
David A. Griego733975a2009-09-18 14:15:18 -0700441
Sekhar Nori77316f02009-10-21 21:18:20 +0530442static struct at24_platform_data da830_evm_i2c_eeprom_info = {
443 .byte_len = SZ_256K / 8,
444 .page_size = 64,
445 .flags = AT24_FLAG_ADDR16,
446 .setup = davinci_get_mac_addr,
447 .context = (void *)0x7f00,
448};
449
Sudhakar Rajashekhara1ef203c2009-11-03 11:51:19 +0530450static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
451 int gpio, unsigned ngpio, void *context)
Sekhar Nori77316f02009-10-21 21:18:20 +0530452{
453 gpio_request(gpio + 6, "UI MUX_MODE");
454
Sekhar Norib5ebe4e2009-10-21 21:18:21 +0530455 /* Drive mux mode low to match the default without UI card */
456 gpio_direction_output(gpio + 6, 0);
457
Sekhar Nori77316f02009-10-21 21:18:20 +0530458 da830_evm_init_lcdc(gpio + 6);
459
460 da830_evm_init_nand(gpio + 6);
461
462 return 0;
463}
464
465static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
466 unsigned ngpio, void *context)
467{
468 gpio_free(gpio + 6);
469 return 0;
470}
471
Sudhakar Rajashekhara1ef203c2009-11-03 11:51:19 +0530472static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
Sekhar Nori77316f02009-10-21 21:18:20 +0530473 .gpio_base = DAVINCI_N_GPIO,
474 .setup = da830_evm_ui_expander_setup,
475 .teardown = da830_evm_ui_expander_teardown,
476};
477
478static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
479 {
480 I2C_BOARD_INFO("24c256", 0x50),
481 .platform_data = &da830_evm_i2c_eeprom_info,
482 },
483 {
484 I2C_BOARD_INFO("tlv320aic3x", 0x18),
485 },
486 {
487 I2C_BOARD_INFO("pcf8574", 0x3f),
488 .platform_data = &da830_evm_ui_expander_info,
489 },
490};
491
492static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
493 .bus_freq = 100, /* kHz */
494 .bus_delay = 0, /* usec */
495};
496
Mark A. Greer85937902009-06-03 18:41:53 -0700497static __init void da830_evm_init(void)
498{
499 struct davinci_soc_info *soc_info = &davinci_soc_info;
500 int ret;
501
502 ret = da8xx_register_edma();
503 if (ret)
504 pr_warning("da830_evm_init: edma registration failed: %d\n",
505 ret);
506
Cyril Chemparathy3821d102010-03-25 17:43:48 -0400507 ret = davinci_cfg_reg_list(da830_i2c0_pins);
Mark A. Greer85937902009-06-03 18:41:53 -0700508 if (ret)
509 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
510 ret);
511
512 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
513 if (ret)
514 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
515 ret);
516
Sergei Shtylyov0e9a3dd2009-09-25 23:28:13 +0400517 da830_evm_usb_init();
518
Mark A. Greer85937902009-06-03 18:41:53 -0700519 soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
520 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
521 soc_info->emac_pdata->rmii_en = 1;
522
Cyril Chemparathy3821d102010-03-25 17:43:48 -0400523 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
Mark A. Greer85937902009-06-03 18:41:53 -0700524 if (ret)
525 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
526 ret);
527
528 ret = da8xx_register_emac();
529 if (ret)
530 pr_warning("da830_evm_init: emac registration failed: %d\n",
531 ret);
532
533 ret = da8xx_register_watchdog();
534 if (ret)
535 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
536 ret);
537
538 davinci_serial_init(&da830_evm_uart_config);
539 i2c_register_board_info(1, da830_evm_i2c_devices,
540 ARRAY_SIZE(da830_evm_i2c_devices));
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400541
Cyril Chemparathy3821d102010-03-25 17:43:48 -0400542 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400543 if (ret)
544 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
545 ret);
546
Mark A. Greerb8864aa2009-08-28 15:05:02 -0700547 da8xx_register_mcasp(1, &da830_evm_snd_data);
David A. Griego2eb30c82009-09-15 18:10:20 -0700548
549 da830_evm_init_mmc();
Steve Chen13e1f042009-09-15 18:15:06 -0700550
Mark A. Greerc51df702009-09-15 18:15:54 -0700551 ret = da8xx_register_rtc();
552 if (ret)
553 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
Mark A. Greer85937902009-06-03 18:41:53 -0700554}
555
556#ifdef CONFIG_SERIAL_8250_CONSOLE
557static int __init da830_evm_console_init(void)
558{
559 return add_preferred_console("ttyS", 2, "115200");
560}
561console_initcall(da830_evm_console_init);
562#endif
563
Mark A. Greer85937902009-06-03 18:41:53 -0700564static void __init da830_evm_map_io(void)
565{
566 da830_init();
567}
568
Kevin Hilman6af65642009-09-29 11:49:46 -0700569MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
Mark A. Greer85937902009-06-03 18:41:53 -0700570 .phys_io = IO_PHYS,
571 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
572 .boot_params = (DA8XX_DDR_BASE + 0x100),
573 .map_io = da830_evm_map_io,
Cyril Chemparathybd808942010-05-07 17:06:37 -0400574 .init_irq = cp_intc_init,
Mark A. Greer85937902009-06-03 18:41:53 -0700575 .timer = &davinci_timer,
576 .init_machine = da830_evm_init,
577MACHINE_END