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Kevin Hilman7c6337e2007-04-30 19:37:19 +01001/*
2 * TI DaVinci EVM board support
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <linux/kernel.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010012#include <linux/init.h>
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
David Brownell7bff3c42008-09-07 23:43:02 -070015#include <linux/gpio.h>
David Brownell7bff3c42008-09-07 23:43:02 -070016#include <linux/i2c.h>
17#include <linux/i2c/pcf857x.h>
18#include <linux/i2c/at24.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010019#include <linux/mtd/mtd.h>
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050020#include <linux/mtd/nand.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010021#include <linux/mtd/partitions.h>
22#include <linux/mtd/physmap.h>
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050023#include <linux/phy.h>
24#include <linux/clk.h>
Muralidharan Karicheriab8e8df2009-09-16 11:53:18 -040025#include <linux/videodev2.h>
26
27#include <media/tvp514x.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010028
Kevin Hilman7c6337e2007-04-30 19:37:19 +010029#include <asm/mach-types.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010030#include <asm/mach/arch.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010031
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050032#include <mach/dm644x.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010033#include <mach/common.h>
David Brownell7bff3c42008-09-07 23:43:02 -070034#include <mach/i2c.h>
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050035#include <mach/serial.h>
36#include <mach/mux.h>
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050037#include <mach/nand.h>
Kevin Hilman2dbf56ae2009-05-11 15:55:03 -070038#include <mach/mmc.h>
Sergei Shtylyov355fb4e2009-10-30 23:46:14 +040039#include <mach/usb.h>
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050040
41#define DM644X_EVM_PHY_MASK (0x2)
42#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
Kevin Hilman7c6337e2007-04-30 19:37:19 +010043
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050044#define LXT971_PHY_ID (0x001378e2)
45#define LXT971_PHY_MASK (0xfffffff0)
Kevin Hilman7c6337e2007-04-30 19:37:19 +010046
David Brownell7bff3c42008-09-07 23:43:02 -070047static struct mtd_partition davinci_evm_norflash_partitions[] = {
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050048 /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
Kevin Hilman7c6337e2007-04-30 19:37:19 +010049 {
50 .name = "bootloader",
51 .offset = 0,
Kevin Hilmand0e47fb2009-04-14 11:30:11 -050052 .size = 5 * SZ_64K,
Kevin Hilman7c6337e2007-04-30 19:37:19 +010053 .mask_flags = MTD_WRITEABLE, /* force read-only */
54 },
55 /* bootloader params in the next 1 sectors */
56 {
57 .name = "params",
58 .offset = MTDPART_OFS_APPEND,
59 .size = SZ_64K,
60 .mask_flags = 0,
61 },
62 /* kernel */
63 {
64 .name = "kernel",
65 .offset = MTDPART_OFS_APPEND,
66 .size = SZ_2M,
67 .mask_flags = 0
68 },
69 /* file system */
70 {
71 .name = "filesystem",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL,
74 .mask_flags = 0
75 }
76};
77
David Brownell7bff3c42008-09-07 23:43:02 -070078static struct physmap_flash_data davinci_evm_norflash_data = {
Kevin Hilman7c6337e2007-04-30 19:37:19 +010079 .width = 2,
David Brownell7bff3c42008-09-07 23:43:02 -070080 .parts = davinci_evm_norflash_partitions,
81 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
Kevin Hilman7c6337e2007-04-30 19:37:19 +010082};
83
84/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
85 * limits addresses to 16M, so using addresses past 16M will wrap */
David Brownell7bff3c42008-09-07 23:43:02 -070086static struct resource davinci_evm_norflash_resource = {
Sergei Shtylyov70342172010-04-16 21:29:11 +040087 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
88 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
Kevin Hilman7c6337e2007-04-30 19:37:19 +010089 .flags = IORESOURCE_MEM,
90};
91
David Brownell7bff3c42008-09-07 23:43:02 -070092static struct platform_device davinci_evm_norflash_device = {
Kevin Hilman7c6337e2007-04-30 19:37:19 +010093 .name = "physmap-flash",
94 .id = 0,
95 .dev = {
David Brownell7bff3c42008-09-07 23:43:02 -070096 .platform_data = &davinci_evm_norflash_data,
Kevin Hilman7c6337e2007-04-30 19:37:19 +010097 },
98 .num_resources = 1,
David Brownell7bff3c42008-09-07 23:43:02 -070099 .resource = &davinci_evm_norflash_resource,
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100100};
101
David Brownell3e9c18e2009-04-15 14:19:21 -0500102/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
103 * It may used instead of the (default) NOR chip to boot, using TI's
104 * tools to install the secondary boot loader (UBL) and U-Boot.
105 */
Kevin Hilman28552c22010-02-25 15:36:38 -0800106static struct mtd_partition davinci_evm_nandflash_partition[] = {
David Brownell3e9c18e2009-04-15 14:19:21 -0500107 /* Bootloader layout depends on whose u-boot is installed, but we
108 * can hide all the details.
109 * - block 0 for u-boot environment ... in mainline u-boot
110 * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
111 * - blocks 6...? for u-boot
112 * - blocks 16..23 for u-boot environment ... in TI's u-boot
113 */
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500114 {
David Brownell3e9c18e2009-04-15 14:19:21 -0500115 .name = "bootloader",
116 .offset = 0,
117 .size = SZ_256K + SZ_128K,
118 .mask_flags = MTD_WRITEABLE, /* force read-only */
119 },
120 /* Kernel */
121 {
122 .name = "kernel",
123 .offset = MTDPART_OFS_APPEND,
124 .size = SZ_4M,
125 .mask_flags = 0,
126 },
127 /* File system (older GIT kernels started this on the 5MB mark) */
128 {
129 .name = "filesystem",
130 .offset = MTDPART_OFS_APPEND,
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500131 .size = MTDPART_SIZ_FULL,
132 .mask_flags = 0,
133 }
David Brownell3e9c18e2009-04-15 14:19:21 -0500134 /* A few blocks at end hold a flash BBT ... created by TI's CCS
135 * using flashwriter_nand.out, but ignored by TI's versions of
136 * Linux and u-boot. We boot faster by using them.
137 */
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500138};
David Brownell7bff3c42008-09-07 23:43:02 -0700139
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500140static struct davinci_nand_pdata davinci_evm_nandflash_data = {
141 .parts = davinci_evm_nandflash_partition,
142 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
143 .ecc_mode = NAND_ECC_HW,
David Brownell3e9c18e2009-04-15 14:19:21 -0500144 .options = NAND_USE_FLASH_BBT,
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500145};
146
147static struct resource davinci_evm_nandflash_resource[] = {
148 {
Sergei Shtylyov70342172010-04-16 21:29:11 +0400149 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
150 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500151 .flags = IORESOURCE_MEM,
152 }, {
Sergei Shtylyov70342172010-04-16 21:29:11 +0400153 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
154 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500155 .flags = IORESOURCE_MEM,
156 },
157};
158
159static struct platform_device davinci_evm_nandflash_device = {
160 .name = "davinci_nand",
161 .id = 0,
162 .dev = {
163 .platform_data = &davinci_evm_nandflash_data,
164 },
165 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
166 .resource = davinci_evm_nandflash_resource,
167};
168
David Brownell3e9c18e2009-04-15 14:19:21 -0500169static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500170
171static struct platform_device davinci_fb_device = {
172 .name = "davincifb",
173 .id = -1,
174 .dev = {
175 .dma_mask = &davinci_fb_dma_mask,
David Brownell3e9c18e2009-04-15 14:19:21 -0500176 .coherent_dma_mask = DMA_BIT_MASK(32),
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500177 },
178 .num_resources = 0,
179};
180
Muralidharan Karicheriab8e8df2009-09-16 11:53:18 -0400181static struct tvp514x_platform_data tvp5146_pdata = {
182 .clk_polarity = 0,
183 .hs_polarity = 1,
184 .vs_polarity = 1
185};
186
187#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
188/* Inputs available at the TVP5146 */
189static struct v4l2_input tvp5146_inputs[] = {
190 {
191 .index = 0,
192 .name = "Composite",
193 .type = V4L2_INPUT_TYPE_CAMERA,
194 .std = TVP514X_STD_ALL,
195 },
196 {
197 .index = 1,
198 .name = "S-Video",
199 .type = V4L2_INPUT_TYPE_CAMERA,
200 .std = TVP514X_STD_ALL,
201 },
202};
203
204/*
205 * this is the route info for connecting each input to decoder
206 * ouput that goes to vpfe. There is a one to one correspondence
207 * with tvp5146_inputs
208 */
209static struct vpfe_route tvp5146_routes[] = {
210 {
211 .input = INPUT_CVBS_VI2B,
212 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
213 },
214 {
215 .input = INPUT_SVIDEO_VI2C_VI1C,
216 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
217 },
218};
219
220static struct vpfe_subdev_info vpfe_sub_devs[] = {
221 {
222 .name = "tvp5146",
223 .grp_id = 0,
224 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
225 .inputs = tvp5146_inputs,
226 .routes = tvp5146_routes,
227 .can_route = 1,
228 .ccdc_if_params = {
229 .if_type = VPFE_BT656,
230 .hdpol = VPFE_PINPOL_POSITIVE,
231 .vdpol = VPFE_PINPOL_POSITIVE,
232 },
233 .board_info = {
234 I2C_BOARD_INFO("tvp5146", 0x5d),
235 .platform_data = &tvp5146_pdata,
236 },
237 },
238};
239
240static struct vpfe_config vpfe_cfg = {
241 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
Vaibhav Hiremath077639f2009-10-13 15:08:54 +0000242 .i2c_adapter_id = 1,
Muralidharan Karicheriab8e8df2009-09-16 11:53:18 -0400243 .sub_devs = vpfe_sub_devs,
244 .card_name = "DM6446 EVM",
245 .ccdc = "DM6446 CCDC",
246};
247
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500248static struct platform_device rtc_dev = {
249 .name = "rtc_davinci_evm",
250 .id = -1,
251};
David Brownell7bff3c42008-09-07 23:43:02 -0700252
Kevin Hilman61aa0732009-07-15 08:47:48 -0700253static struct snd_platform_data dm644x_evm_snd_data;
Chaithrika U S25acf552009-06-05 06:28:08 -0400254
David Brownell7bff3c42008-09-07 23:43:02 -0700255/*----------------------------------------------------------------------*/
256
257/*
258 * I2C GPIO expanders
259 */
260
261#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
262
263
264/* U2 -- LEDs */
265
266static struct gpio_led evm_leds[] = {
267 { .name = "DS8", .active_low = 1,
268 .default_trigger = "heartbeat", },
269 { .name = "DS7", .active_low = 1, },
270 { .name = "DS6", .active_low = 1, },
271 { .name = "DS5", .active_low = 1, },
272 { .name = "DS4", .active_low = 1, },
273 { .name = "DS3", .active_low = 1, },
274 { .name = "DS2", .active_low = 1,
275 .default_trigger = "mmc0", },
276 { .name = "DS1", .active_low = 1,
277 .default_trigger = "ide-disk", },
278};
279
280static const struct gpio_led_platform_data evm_led_data = {
281 .num_leds = ARRAY_SIZE(evm_leds),
282 .leds = evm_leds,
283};
284
285static struct platform_device *evm_led_dev;
286
287static int
288evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
289{
290 struct gpio_led *leds = evm_leds;
291 int status;
292
293 while (ngpio--) {
294 leds->gpio = gpio++;
295 leds++;
296 }
297
298 /* what an extremely annoying way to be forced to handle
299 * device unregistration ...
300 */
301 evm_led_dev = platform_device_alloc("leds-gpio", 0);
302 platform_device_add_data(evm_led_dev,
303 &evm_led_data, sizeof evm_led_data);
304
305 evm_led_dev->dev.parent = &client->dev;
306 status = platform_device_add(evm_led_dev);
307 if (status < 0) {
308 platform_device_put(evm_led_dev);
309 evm_led_dev = NULL;
310 }
311 return status;
312}
313
314static int
315evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
316{
317 if (evm_led_dev) {
318 platform_device_unregister(evm_led_dev);
319 evm_led_dev = NULL;
320 }
321 return 0;
322}
323
324static struct pcf857x_platform_data pcf_data_u2 = {
325 .gpio_base = PCF_Uxx_BASE(0),
326 .setup = evm_led_setup,
327 .teardown = evm_led_teardown,
328};
329
330
331/* U18 - A/V clock generator and user switch */
332
333static int sw_gpio;
334
335static ssize_t
336sw_show(struct device *d, struct device_attribute *a, char *buf)
337{
338 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
339
340 strcpy(buf, s);
341 return strlen(s);
342}
343
344static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
345
346static int
347evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
348{
349 int status;
350
351 /* export dip switch option */
352 sw_gpio = gpio + 7;
353 status = gpio_request(sw_gpio, "user_sw");
354 if (status == 0)
355 status = gpio_direction_input(sw_gpio);
356 if (status == 0)
357 status = device_create_file(&client->dev, &dev_attr_user_sw);
358 else
359 gpio_free(sw_gpio);
360 if (status != 0)
361 sw_gpio = -EINVAL;
362
363 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
364 gpio_request(gpio + 3, "pll_fs2");
365 gpio_direction_output(gpio + 3, 0);
366
367 gpio_request(gpio + 2, "pll_fs1");
368 gpio_direction_output(gpio + 2, 0);
369
370 gpio_request(gpio + 1, "pll_sr");
371 gpio_direction_output(gpio + 1, 0);
372
373 return 0;
374}
375
376static int
377evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
378{
379 gpio_free(gpio + 1);
380 gpio_free(gpio + 2);
381 gpio_free(gpio + 3);
382
383 if (sw_gpio > 0) {
384 device_remove_file(&client->dev, &dev_attr_user_sw);
385 gpio_free(sw_gpio);
386 }
387 return 0;
388}
389
390static struct pcf857x_platform_data pcf_data_u18 = {
391 .gpio_base = PCF_Uxx_BASE(1),
392 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
393 .setup = evm_u18_setup,
394 .teardown = evm_u18_teardown,
395};
396
397
398/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
399
400static int
401evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
402{
403 /* p0 = nDRV_VBUS (initial: don't supply it) */
404 gpio_request(gpio + 0, "nDRV_VBUS");
405 gpio_direction_output(gpio + 0, 1);
406
407 /* p1 = VDDIMX_EN */
408 gpio_request(gpio + 1, "VDDIMX_EN");
409 gpio_direction_output(gpio + 1, 1);
410
411 /* p2 = VLYNQ_EN */
412 gpio_request(gpio + 2, "VLYNQ_EN");
413 gpio_direction_output(gpio + 2, 1);
414
415 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
416 gpio_request(gpio + 3, "nCF_RESET");
417 gpio_direction_output(gpio + 3, 0);
418
419 /* (p4 unused) */
420
421 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
422 gpio_request(gpio + 5, "WLAN_RESET");
423 gpio_direction_output(gpio + 5, 1);
424
425 /* p6 = nATA_SEL (initial: select) */
426 gpio_request(gpio + 6, "nATA_SEL");
427 gpio_direction_output(gpio + 6, 0);
428
429 /* p7 = nCF_SEL (initial: deselect) */
430 gpio_request(gpio + 7, "nCF_SEL");
431 gpio_direction_output(gpio + 7, 1);
432
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500433 /* irlml6401 switches over 1A, in under 8 msec;
434 * now it can be managed by nDRV_VBUS ...
435 */
Sergei Shtylyov355fb4e2009-10-30 23:46:14 +0400436 davinci_setup_usb(1000, 8);
David Brownell34f32c92009-02-20 13:45:17 -0800437
David Brownell7bff3c42008-09-07 23:43:02 -0700438 return 0;
439}
440
441static int
442evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
443{
444 gpio_free(gpio + 7);
445 gpio_free(gpio + 6);
446 gpio_free(gpio + 5);
447 gpio_free(gpio + 3);
448 gpio_free(gpio + 2);
449 gpio_free(gpio + 1);
450 gpio_free(gpio + 0);
451 return 0;
452}
453
454static struct pcf857x_platform_data pcf_data_u35 = {
455 .gpio_base = PCF_Uxx_BASE(2),
456 .setup = evm_u35_setup,
457 .teardown = evm_u35_teardown,
458};
459
460/*----------------------------------------------------------------------*/
461
462/* Most of this EEPROM is unused, but U-Boot uses some data:
463 * - 0x7f00, 6 bytes Ethernet Address
464 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
465 * - ... newer boards may have more
466 */
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500467
David Brownell7bff3c42008-09-07 23:43:02 -0700468static struct at24_platform_data eeprom_info = {
469 .byte_len = (256*1024) / 8,
470 .page_size = 64,
471 .flags = AT24_FLAG_ADDR16,
Mark A. Greerb14dc0f2009-04-15 12:41:27 -0700472 .setup = davinci_get_mac_addr,
473 .context = (void *)0x7f00,
David Brownell7bff3c42008-09-07 23:43:02 -0700474};
475
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500476/*
477 * MSP430 supports RTC, card detection, input from IR remote, and
478 * a bit more. It triggers interrupts on GPIO(7) from pressing
479 * buttons on the IR remote, and for card detect switches.
480 */
481static struct i2c_client *dm6446evm_msp;
482
483static int dm6446evm_msp_probe(struct i2c_client *client,
484 const struct i2c_device_id *id)
485{
486 dm6446evm_msp = client;
487 return 0;
488}
489
490static int dm6446evm_msp_remove(struct i2c_client *client)
491{
492 dm6446evm_msp = NULL;
493 return 0;
494}
495
496static const struct i2c_device_id dm6446evm_msp_ids[] = {
497 { "dm6446evm_msp", 0, },
498 { /* end of list */ },
499};
500
501static struct i2c_driver dm6446evm_msp_driver = {
502 .driver.name = "dm6446evm_msp",
503 .id_table = dm6446evm_msp_ids,
504 .probe = dm6446evm_msp_probe,
505 .remove = dm6446evm_msp_remove,
506};
507
508static int dm6444evm_msp430_get_pins(void)
509{
510 static const char txbuf[2] = { 2, 4, };
511 char buf[4];
512 struct i2c_msg msg[2] = {
513 {
514 .addr = dm6446evm_msp->addr,
515 .flags = 0,
516 .len = 2,
517 .buf = (void __force *)txbuf,
518 },
519 {
520 .addr = dm6446evm_msp->addr,
521 .flags = I2C_M_RD,
522 .len = 4,
523 .buf = buf,
524 },
525 };
526 int status;
527
528 if (!dm6446evm_msp)
529 return -ENXIO;
530
531 /* Command 4 == get input state, returns port 2 and port3 data
532 * S Addr W [A] len=2 [A] cmd=4 [A]
533 * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
534 */
535 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
536 if (status < 0)
537 return status;
538
539 dev_dbg(&dm6446evm_msp->dev,
540 "PINS: %02x %02x %02x %02x\n",
541 buf[0], buf[1], buf[2], buf[3]);
542
543 return (buf[3] << 8) | buf[2];
544}
545
Kevin Hilman2dbf56ae2009-05-11 15:55:03 -0700546static int dm6444evm_mmc_get_cd(int module)
547{
548 int status = dm6444evm_msp430_get_pins();
549
550 return (status < 0) ? status : !(status & BIT(1));
551}
552
553static int dm6444evm_mmc_get_ro(int module)
554{
555 int status = dm6444evm_msp430_get_pins();
556
557 return (status < 0) ? status : status & BIT(6 + 8);
558}
559
560static struct davinci_mmc_config dm6446evm_mmc_config = {
561 .get_cd = dm6444evm_mmc_get_cd,
562 .get_ro = dm6444evm_mmc_get_ro,
563 .wires = 4,
564 .version = MMC_CTLR_VERSION_1
565};
566
David Brownell7bff3c42008-09-07 23:43:02 -0700567static struct i2c_board_info __initdata i2c_info[] = {
568 {
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500569 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
570 },
571 {
David Brownell7bff3c42008-09-07 23:43:02 -0700572 I2C_BOARD_INFO("pcf8574", 0x38),
573 .platform_data = &pcf_data_u2,
574 },
575 {
576 I2C_BOARD_INFO("pcf8574", 0x39),
577 .platform_data = &pcf_data_u18,
578 },
579 {
580 I2C_BOARD_INFO("pcf8574", 0x3a),
581 .platform_data = &pcf_data_u35,
582 },
583 {
584 I2C_BOARD_INFO("24c256", 0x50),
585 .platform_data = &eeprom_info,
586 },
Chaithrika U S1a7ff8f2009-08-25 15:20:05 +0300587 {
588 I2C_BOARD_INFO("tlv320aic33", 0x1b),
589 },
David Brownell7bff3c42008-09-07 23:43:02 -0700590};
591
592/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
593 * which requires 100 usec of idle bus after i2c writes sent to it.
594 */
595static struct davinci_i2c_platform_data i2c_pdata = {
596 .bus_freq = 20 /* kHz */,
597 .bus_delay = 100 /* usec */,
Philby John00642f62010-01-11 15:53:31 +0530598 .sda_pin = 44,
599 .scl_pin = 43,
David Brownell7bff3c42008-09-07 23:43:02 -0700600};
601
602static void __init evm_init_i2c(void)
603{
604 davinci_init_i2c(&i2c_pdata);
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500605 i2c_add_driver(&dm6446evm_msp_driver);
David Brownell7bff3c42008-09-07 23:43:02 -0700606 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
607}
608
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100609static struct platform_device *davinci_evm_devices[] __initdata = {
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500610 &davinci_fb_device,
611 &rtc_dev,
612};
613
614static struct davinci_uart_config uart_config __initdata = {
615 .enabled_uarts = (1 << 0),
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100616};
617
618static void __init
619davinci_evm_map_io(void)
620{
Muralidharan Karicheriab8e8df2009-09-16 11:53:18 -0400621 /* setup input configuration for VPFE input devices */
622 dm644x_set_vpfe_config(&vpfe_cfg);
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500623 dm644x_init();
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100624}
625
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500626static int davinci_phy_fixup(struct phy_device *phydev)
627{
628 unsigned int control;
629 /* CRITICAL: Fix for increasing PHY signal drive strength for
630 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
631 * signal strength was low causing TX to fail randomly. The
632 * fix is to Set bit 11 (Increased MII drive strength) of PHY
633 * register 26 (Digital Config register) on this phy. */
634 control = phy_read(phydev, 26);
635 phy_write(phydev, 26, (control | 0x800));
636 return 0;
637}
638
639#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
640 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
641#define HAS_ATA 1
642#else
643#define HAS_ATA 0
644#endif
645
646#if defined(CONFIG_MTD_PHYSMAP) || \
647 defined(CONFIG_MTD_PHYSMAP_MODULE)
648#define HAS_NOR 1
649#else
650#define HAS_NOR 0
651#endif
652
653#if defined(CONFIG_MTD_NAND_DAVINCI) || \
654 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
655#define HAS_NAND 1
656#else
657#define HAS_NAND 0
658#endif
659
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100660static __init void davinci_evm_init(void)
661{
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500662 struct clk *aemif_clk;
Mark A. Greer972412b2009-04-15 12:40:56 -0700663 struct davinci_soc_info *soc_info = &davinci_soc_info;
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500664
665 aemif_clk = clk_get(NULL, "aemif");
666 clk_enable(aemif_clk);
667
668 if (HAS_ATA) {
669 if (HAS_NAND || HAS_NOR)
670 pr_warning("WARNING: both IDE and Flash are "
671 "enabled, but they share AEMIF pins.\n"
672 "\tDisable IDE for NAND/NOR support.\n");
Sergei Shtylyov7a9978a2010-04-21 18:11:33 +0400673 davinci_init_ide();
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500674 } else if (HAS_NAND || HAS_NOR) {
675 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
676 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
677
678 /* only one device will be jumpered and detected */
679 if (HAS_NAND) {
680 platform_device_register(&davinci_evm_nandflash_device);
681 evm_leds[7].default_trigger = "nand-disk";
682 if (HAS_NOR)
683 pr_warning("WARNING: both NAND and NOR flash "
684 "are enabled; disable one of them.\n");
685 } else if (HAS_NOR)
686 platform_device_register(&davinci_evm_norflash_device);
687 }
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100688
689 platform_add_devices(davinci_evm_devices,
690 ARRAY_SIZE(davinci_evm_devices));
David Brownell7bff3c42008-09-07 23:43:02 -0700691 evm_init_i2c();
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500692
Kevin Hilman2dbf56ae2009-05-11 15:55:03 -0700693 davinci_setup_mmc(0, &dm6446evm_mmc_config);
694
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500695 davinci_serial_init(&uart_config);
Chaithrika U S25acf552009-06-05 06:28:08 -0400696 dm644x_init_asp(&dm644x_evm_snd_data);
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500697
Mark A. Greer972412b2009-04-15 12:40:56 -0700698 soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
699 soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
Kevin Hilmanac7b75b2009-05-07 06:19:40 -0700700
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500701 /* Register the fixup for PHY on DaVinci */
702 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
703 davinci_phy_fixup);
704
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100705}
706
Kevin Hilmand0e47fb2009-04-14 11:30:11 -0500707MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100708 /* Maintainer: MontaVista Software <source@mvista.com> */
709 .phys_io = IO_PHYS,
Kevin Hilmanac7643e2008-09-15 04:09:14 -0700710 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100711 .boot_params = (DAVINCI_DDR_BASE + 0x100),
712 .map_io = davinci_evm_map_io,
Cyril Chemparathybd808942010-05-07 17:06:37 -0400713 .init_irq = davinci_irq_init,
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100714 .timer = &davinci_timer,
715 .init_machine = davinci_evm_init,
716MACHINE_END