Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 1 | /* |
| 2 | * DA8XX/OMAP L1XX platform device data |
| 3 | * |
| 4 | * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com> |
| 5 | * Derived from code that was: |
| 6 | * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/dma-mapping.h> |
| 16 | #include <linux/serial_8250.h> |
| 17 | |
| 18 | #include <mach/cputype.h> |
| 19 | #include <mach/common.h> |
| 20 | #include <mach/time.h> |
| 21 | #include <mach/da8xx.h> |
Sekhar Nori | 1960e69 | 2009-10-22 15:12:14 +0530 | [diff] [blame] | 22 | #include <mach/cpuidle.h> |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 23 | |
| 24 | #include "clock.h" |
| 25 | |
| 26 | #define DA8XX_TPCC_BASE 0x01c00000 |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 27 | #define DA850_TPCC1_BASE 0x01e30000 |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 28 | #define DA8XX_TPTC0_BASE 0x01c08000 |
| 29 | #define DA8XX_TPTC1_BASE 0x01c08400 |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 30 | #define DA850_TPTC2_BASE 0x01e38000 |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 31 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ |
| 32 | #define DA8XX_I2C0_BASE 0x01c22000 |
Mark A. Greer | c51df70 | 2009-09-15 18:15:54 -0700 | [diff] [blame] | 33 | #define DA8XX_RTC_BASE 0x01C23000 |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 34 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 |
| 35 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 |
| 36 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 |
| 37 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 |
| 38 | #define DA8XX_GPIO_BASE 0x01e26000 |
| 39 | #define DA8XX_I2C1_BASE 0x01e28000 |
| 40 | |
| 41 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 |
| 42 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 |
| 43 | #define DA8XX_EMAC_RAM_OFFSET 0x0000 |
| 44 | #define DA8XX_MDIO_REG_OFFSET 0x4000 |
| 45 | #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K |
| 46 | |
Sekhar Nori | d2de058 | 2009-11-16 17:21:32 +0530 | [diff] [blame] | 47 | void __iomem *da8xx_syscfg0_base; |
| 48 | void __iomem *da8xx_syscfg1_base; |
Sekhar Nori | 6a28ade | 2009-08-31 15:47:59 +0530 | [diff] [blame] | 49 | |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 50 | static struct plat_serial8250_port da8xx_serial_pdata[] = { |
| 51 | { |
| 52 | .mapbase = DA8XX_UART0_BASE, |
| 53 | .irq = IRQ_DA8XX_UARTINT0, |
| 54 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
| 55 | UPF_IOREMAP, |
| 56 | .iotype = UPIO_MEM, |
| 57 | .regshift = 2, |
| 58 | }, |
| 59 | { |
| 60 | .mapbase = DA8XX_UART1_BASE, |
| 61 | .irq = IRQ_DA8XX_UARTINT1, |
| 62 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
| 63 | UPF_IOREMAP, |
| 64 | .iotype = UPIO_MEM, |
| 65 | .regshift = 2, |
| 66 | }, |
| 67 | { |
| 68 | .mapbase = DA8XX_UART2_BASE, |
| 69 | .irq = IRQ_DA8XX_UARTINT2, |
| 70 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
| 71 | UPF_IOREMAP, |
| 72 | .iotype = UPIO_MEM, |
| 73 | .regshift = 2, |
| 74 | }, |
| 75 | { |
| 76 | .flags = 0, |
| 77 | }, |
| 78 | }; |
| 79 | |
| 80 | struct platform_device da8xx_serial_device = { |
| 81 | .name = "serial8250", |
| 82 | .id = PLAT8250_DEV_PLATFORM, |
| 83 | .dev = { |
| 84 | .platform_data = da8xx_serial_pdata, |
| 85 | }, |
| 86 | }; |
| 87 | |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 88 | static const s8 da8xx_queue_tc_mapping[][2] = { |
| 89 | /* {event queue no, TC no} */ |
| 90 | {0, 0}, |
| 91 | {1, 1}, |
| 92 | {-1, -1} |
| 93 | }; |
| 94 | |
| 95 | static const s8 da8xx_queue_priority_mapping[][2] = { |
| 96 | /* {event queue no, Priority} */ |
| 97 | {0, 3}, |
| 98 | {1, 7}, |
| 99 | {-1, -1} |
| 100 | }; |
| 101 | |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 102 | static const s8 da850_queue_tc_mapping[][2] = { |
| 103 | /* {event queue no, TC no} */ |
| 104 | {0, 0}, |
| 105 | {-1, -1} |
| 106 | }; |
| 107 | |
| 108 | static const s8 da850_queue_priority_mapping[][2] = { |
| 109 | /* {event queue no, Priority} */ |
| 110 | {0, 3}, |
| 111 | {-1, -1} |
| 112 | }; |
| 113 | |
| 114 | static struct edma_soc_info da830_edma_info[] = { |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 115 | { |
| 116 | .n_channel = 32, |
| 117 | .n_region = 4, |
| 118 | .n_slot = 128, |
| 119 | .n_tc = 2, |
| 120 | .n_cc = 1, |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 121 | .queue_tc_mapping = da8xx_queue_tc_mapping, |
| 122 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
| 123 | }, |
| 124 | }; |
| 125 | |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 126 | static struct edma_soc_info da850_edma_info[] = { |
| 127 | { |
| 128 | .n_channel = 32, |
| 129 | .n_region = 4, |
| 130 | .n_slot = 128, |
| 131 | .n_tc = 2, |
| 132 | .n_cc = 1, |
| 133 | .queue_tc_mapping = da8xx_queue_tc_mapping, |
| 134 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
| 135 | }, |
| 136 | { |
| 137 | .n_channel = 32, |
| 138 | .n_region = 4, |
| 139 | .n_slot = 128, |
| 140 | .n_tc = 1, |
| 141 | .n_cc = 1, |
| 142 | .queue_tc_mapping = da850_queue_tc_mapping, |
| 143 | .queue_priority_mapping = da850_queue_priority_mapping, |
| 144 | }, |
| 145 | }; |
| 146 | |
| 147 | static struct resource da830_edma_resources[] = { |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 148 | { |
| 149 | .name = "edma_cc0", |
| 150 | .start = DA8XX_TPCC_BASE, |
| 151 | .end = DA8XX_TPCC_BASE + SZ_32K - 1, |
| 152 | .flags = IORESOURCE_MEM, |
| 153 | }, |
| 154 | { |
| 155 | .name = "edma_tc0", |
| 156 | .start = DA8XX_TPTC0_BASE, |
| 157 | .end = DA8XX_TPTC0_BASE + SZ_1K - 1, |
| 158 | .flags = IORESOURCE_MEM, |
| 159 | }, |
| 160 | { |
| 161 | .name = "edma_tc1", |
| 162 | .start = DA8XX_TPTC1_BASE, |
| 163 | .end = DA8XX_TPTC1_BASE + SZ_1K - 1, |
| 164 | .flags = IORESOURCE_MEM, |
| 165 | }, |
| 166 | { |
| 167 | .name = "edma0", |
Sudhakar Rajashekhara | 2259bbd | 2009-07-10 06:28:52 -0400 | [diff] [blame] | 168 | .start = IRQ_DA8XX_CCINT0, |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 169 | .flags = IORESOURCE_IRQ, |
| 170 | }, |
| 171 | { |
| 172 | .name = "edma0_err", |
| 173 | .start = IRQ_DA8XX_CCERRINT, |
| 174 | .flags = IORESOURCE_IRQ, |
| 175 | }, |
| 176 | }; |
| 177 | |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 178 | static struct resource da850_edma_resources[] = { |
| 179 | { |
| 180 | .name = "edma_cc0", |
| 181 | .start = DA8XX_TPCC_BASE, |
| 182 | .end = DA8XX_TPCC_BASE + SZ_32K - 1, |
| 183 | .flags = IORESOURCE_MEM, |
| 184 | }, |
| 185 | { |
| 186 | .name = "edma_tc0", |
| 187 | .start = DA8XX_TPTC0_BASE, |
| 188 | .end = DA8XX_TPTC0_BASE + SZ_1K - 1, |
| 189 | .flags = IORESOURCE_MEM, |
| 190 | }, |
| 191 | { |
| 192 | .name = "edma_tc1", |
| 193 | .start = DA8XX_TPTC1_BASE, |
| 194 | .end = DA8XX_TPTC1_BASE + SZ_1K - 1, |
| 195 | .flags = IORESOURCE_MEM, |
| 196 | }, |
| 197 | { |
| 198 | .name = "edma_cc1", |
| 199 | .start = DA850_TPCC1_BASE, |
| 200 | .end = DA850_TPCC1_BASE + SZ_32K - 1, |
| 201 | .flags = IORESOURCE_MEM, |
| 202 | }, |
| 203 | { |
| 204 | .name = "edma_tc2", |
| 205 | .start = DA850_TPTC2_BASE, |
| 206 | .end = DA850_TPTC2_BASE + SZ_1K - 1, |
| 207 | .flags = IORESOURCE_MEM, |
| 208 | }, |
| 209 | { |
| 210 | .name = "edma0", |
| 211 | .start = IRQ_DA8XX_CCINT0, |
| 212 | .flags = IORESOURCE_IRQ, |
| 213 | }, |
| 214 | { |
| 215 | .name = "edma0_err", |
| 216 | .start = IRQ_DA8XX_CCERRINT, |
| 217 | .flags = IORESOURCE_IRQ, |
| 218 | }, |
| 219 | { |
| 220 | .name = "edma1", |
| 221 | .start = IRQ_DA850_CCINT1, |
| 222 | .flags = IORESOURCE_IRQ, |
| 223 | }, |
| 224 | { |
| 225 | .name = "edma1_err", |
| 226 | .start = IRQ_DA850_CCERRINT1, |
| 227 | .flags = IORESOURCE_IRQ, |
| 228 | }, |
| 229 | }; |
| 230 | |
| 231 | static struct platform_device da830_edma_device = { |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 232 | .name = "edma", |
| 233 | .id = -1, |
| 234 | .dev = { |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 235 | .platform_data = da830_edma_info, |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 236 | }, |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 237 | .num_resources = ARRAY_SIZE(da830_edma_resources), |
| 238 | .resource = da830_edma_resources, |
| 239 | }; |
| 240 | |
| 241 | static struct platform_device da850_edma_device = { |
| 242 | .name = "edma", |
| 243 | .id = -1, |
| 244 | .dev = { |
| 245 | .platform_data = da850_edma_info, |
| 246 | }, |
| 247 | .num_resources = ARRAY_SIZE(da850_edma_resources), |
| 248 | .resource = da850_edma_resources, |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 249 | }; |
| 250 | |
| 251 | int __init da8xx_register_edma(void) |
| 252 | { |
Sudhakar Rajashekhara | 3f995f2 | 2010-01-06 17:30:06 +0530 | [diff] [blame] | 253 | struct platform_device *pdev; |
| 254 | |
| 255 | if (cpu_is_davinci_da830()) |
| 256 | pdev = &da830_edma_device; |
| 257 | else if (cpu_is_davinci_da850()) |
| 258 | pdev = &da850_edma_device; |
| 259 | else |
| 260 | return -ENODEV; |
| 261 | |
| 262 | return platform_device_register(pdev); |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 263 | } |
| 264 | |
| 265 | static struct resource da8xx_i2c_resources0[] = { |
| 266 | { |
| 267 | .start = DA8XX_I2C0_BASE, |
| 268 | .end = DA8XX_I2C0_BASE + SZ_4K - 1, |
| 269 | .flags = IORESOURCE_MEM, |
| 270 | }, |
| 271 | { |
| 272 | .start = IRQ_DA8XX_I2CINT0, |
| 273 | .end = IRQ_DA8XX_I2CINT0, |
| 274 | .flags = IORESOURCE_IRQ, |
| 275 | }, |
| 276 | }; |
| 277 | |
| 278 | static struct platform_device da8xx_i2c_device0 = { |
| 279 | .name = "i2c_davinci", |
| 280 | .id = 1, |
| 281 | .num_resources = ARRAY_SIZE(da8xx_i2c_resources0), |
| 282 | .resource = da8xx_i2c_resources0, |
| 283 | }; |
| 284 | |
| 285 | static struct resource da8xx_i2c_resources1[] = { |
| 286 | { |
| 287 | .start = DA8XX_I2C1_BASE, |
| 288 | .end = DA8XX_I2C1_BASE + SZ_4K - 1, |
| 289 | .flags = IORESOURCE_MEM, |
| 290 | }, |
| 291 | { |
| 292 | .start = IRQ_DA8XX_I2CINT1, |
| 293 | .end = IRQ_DA8XX_I2CINT1, |
| 294 | .flags = IORESOURCE_IRQ, |
| 295 | }, |
| 296 | }; |
| 297 | |
| 298 | static struct platform_device da8xx_i2c_device1 = { |
| 299 | .name = "i2c_davinci", |
| 300 | .id = 2, |
| 301 | .num_resources = ARRAY_SIZE(da8xx_i2c_resources1), |
| 302 | .resource = da8xx_i2c_resources1, |
| 303 | }; |
| 304 | |
| 305 | int __init da8xx_register_i2c(int instance, |
| 306 | struct davinci_i2c_platform_data *pdata) |
| 307 | { |
| 308 | struct platform_device *pdev; |
| 309 | |
| 310 | if (instance == 0) |
| 311 | pdev = &da8xx_i2c_device0; |
| 312 | else if (instance == 1) |
| 313 | pdev = &da8xx_i2c_device1; |
| 314 | else |
| 315 | return -EINVAL; |
| 316 | |
| 317 | pdev->dev.platform_data = pdata; |
| 318 | return platform_device_register(pdev); |
| 319 | } |
| 320 | |
| 321 | static struct resource da8xx_watchdog_resources[] = { |
| 322 | { |
| 323 | .start = DA8XX_WDOG_BASE, |
| 324 | .end = DA8XX_WDOG_BASE + SZ_4K - 1, |
| 325 | .flags = IORESOURCE_MEM, |
| 326 | }, |
| 327 | }; |
| 328 | |
Cyril Chemparathy | c78a5bc | 2010-05-01 18:38:28 -0400 | [diff] [blame] | 329 | struct platform_device da8xx_wdt_device = { |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 330 | .name = "watchdog", |
| 331 | .id = -1, |
| 332 | .num_resources = ARRAY_SIZE(da8xx_watchdog_resources), |
| 333 | .resource = da8xx_watchdog_resources, |
| 334 | }; |
| 335 | |
| 336 | int __init da8xx_register_watchdog(void) |
| 337 | { |
Cyril Chemparathy | c78a5bc | 2010-05-01 18:38:28 -0400 | [diff] [blame] | 338 | return platform_device_register(&da8xx_wdt_device); |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | static struct resource da8xx_emac_resources[] = { |
| 342 | { |
| 343 | .start = DA8XX_EMAC_CPPI_PORT_BASE, |
| 344 | .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1, |
| 345 | .flags = IORESOURCE_MEM, |
| 346 | }, |
| 347 | { |
| 348 | .start = IRQ_DA8XX_C0_RX_THRESH_PULSE, |
| 349 | .end = IRQ_DA8XX_C0_RX_THRESH_PULSE, |
| 350 | .flags = IORESOURCE_IRQ, |
| 351 | }, |
| 352 | { |
| 353 | .start = IRQ_DA8XX_C0_RX_PULSE, |
| 354 | .end = IRQ_DA8XX_C0_RX_PULSE, |
| 355 | .flags = IORESOURCE_IRQ, |
| 356 | }, |
| 357 | { |
| 358 | .start = IRQ_DA8XX_C0_TX_PULSE, |
| 359 | .end = IRQ_DA8XX_C0_TX_PULSE, |
| 360 | .flags = IORESOURCE_IRQ, |
| 361 | }, |
| 362 | { |
| 363 | .start = IRQ_DA8XX_C0_MISC_PULSE, |
| 364 | .end = IRQ_DA8XX_C0_MISC_PULSE, |
| 365 | .flags = IORESOURCE_IRQ, |
| 366 | }, |
| 367 | }; |
| 368 | |
| 369 | struct emac_platform_data da8xx_emac_pdata = { |
| 370 | .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, |
| 371 | .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, |
| 372 | .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, |
| 373 | .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET, |
| 374 | .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, |
| 375 | .version = EMAC_VERSION_2, |
| 376 | }; |
| 377 | |
| 378 | static struct platform_device da8xx_emac_device = { |
| 379 | .name = "davinci_emac", |
| 380 | .id = 1, |
| 381 | .dev = { |
| 382 | .platform_data = &da8xx_emac_pdata, |
| 383 | }, |
| 384 | .num_resources = ARRAY_SIZE(da8xx_emac_resources), |
| 385 | .resource = da8xx_emac_resources, |
| 386 | }; |
| 387 | |
Mark A. Greer | 31f53cf | 2009-08-28 15:02:54 -0700 | [diff] [blame] | 388 | int __init da8xx_register_emac(void) |
| 389 | { |
| 390 | return platform_device_register(&da8xx_emac_device); |
| 391 | } |
| 392 | |
Chaithrika U S | e33ef5e | 2009-08-11 17:01:59 -0400 | [diff] [blame] | 393 | static struct resource da830_mcasp1_resources[] = { |
| 394 | { |
| 395 | .name = "mcasp1", |
| 396 | .start = DAVINCI_DA830_MCASP1_REG_BASE, |
| 397 | .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1, |
| 398 | .flags = IORESOURCE_MEM, |
| 399 | }, |
| 400 | /* TX event */ |
| 401 | { |
| 402 | .start = DAVINCI_DA830_DMA_MCASP1_AXEVT, |
| 403 | .end = DAVINCI_DA830_DMA_MCASP1_AXEVT, |
| 404 | .flags = IORESOURCE_DMA, |
| 405 | }, |
| 406 | /* RX event */ |
| 407 | { |
| 408 | .start = DAVINCI_DA830_DMA_MCASP1_AREVT, |
| 409 | .end = DAVINCI_DA830_DMA_MCASP1_AREVT, |
| 410 | .flags = IORESOURCE_DMA, |
| 411 | }, |
| 412 | }; |
| 413 | |
| 414 | static struct platform_device da830_mcasp1_device = { |
| 415 | .name = "davinci-mcasp", |
| 416 | .id = 1, |
| 417 | .num_resources = ARRAY_SIZE(da830_mcasp1_resources), |
| 418 | .resource = da830_mcasp1_resources, |
| 419 | }; |
| 420 | |
Chaithrika U S | 491214e | 2009-08-11 17:03:25 -0400 | [diff] [blame] | 421 | static struct resource da850_mcasp_resources[] = { |
| 422 | { |
| 423 | .name = "mcasp", |
| 424 | .start = DAVINCI_DA8XX_MCASP0_REG_BASE, |
| 425 | .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1, |
| 426 | .flags = IORESOURCE_MEM, |
| 427 | }, |
| 428 | /* TX event */ |
| 429 | { |
| 430 | .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, |
| 431 | .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, |
| 432 | .flags = IORESOURCE_DMA, |
| 433 | }, |
| 434 | /* RX event */ |
| 435 | { |
| 436 | .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT, |
| 437 | .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT, |
| 438 | .flags = IORESOURCE_DMA, |
| 439 | }, |
| 440 | }; |
| 441 | |
| 442 | static struct platform_device da850_mcasp_device = { |
| 443 | .name = "davinci-mcasp", |
| 444 | .id = 0, |
| 445 | .num_resources = ARRAY_SIZE(da850_mcasp_resources), |
| 446 | .resource = da850_mcasp_resources, |
| 447 | }; |
| 448 | |
Mark A. Greer | b8864aa | 2009-08-28 15:05:02 -0700 | [diff] [blame] | 449 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) |
Chaithrika U S | e33ef5e | 2009-08-11 17:01:59 -0400 | [diff] [blame] | 450 | { |
Chaithrika U S | 491214e | 2009-08-11 17:03:25 -0400 | [diff] [blame] | 451 | /* DA830/OMAP-L137 has 3 instances of McASP */ |
| 452 | if (cpu_is_davinci_da830() && id == 1) { |
Chaithrika U S | e33ef5e | 2009-08-11 17:01:59 -0400 | [diff] [blame] | 453 | da830_mcasp1_device.dev.platform_data = pdata; |
| 454 | platform_device_register(&da830_mcasp1_device); |
Chaithrika U S | 491214e | 2009-08-11 17:03:25 -0400 | [diff] [blame] | 455 | } else if (cpu_is_davinci_da850()) { |
| 456 | da850_mcasp_device.dev.platform_data = pdata; |
| 457 | platform_device_register(&da850_mcasp_device); |
Chaithrika U S | e33ef5e | 2009-08-11 17:01:59 -0400 | [diff] [blame] | 458 | } |
| 459 | } |
Sudhakar Rajashekhara | 5cbdf27 | 2009-08-13 14:33:14 -0400 | [diff] [blame] | 460 | |
| 461 | static const struct display_panel disp_panel = { |
| 462 | QVGA, |
| 463 | 16, |
| 464 | 16, |
| 465 | COLOR_ACTIVE, |
| 466 | }; |
| 467 | |
| 468 | static struct lcd_ctrl_config lcd_cfg = { |
| 469 | &disp_panel, |
| 470 | .ac_bias = 255, |
| 471 | .ac_bias_intrpt = 0, |
| 472 | .dma_burst_sz = 16, |
| 473 | .bpp = 16, |
| 474 | .fdd = 255, |
| 475 | .tft_alt_mode = 0, |
| 476 | .stn_565_mode = 0, |
| 477 | .mono_8bit_mode = 0, |
| 478 | .invert_line_clock = 1, |
| 479 | .invert_frm_clock = 1, |
| 480 | .sync_edge = 0, |
| 481 | .sync_ctrl = 1, |
| 482 | .raster_order = 0, |
| 483 | }; |
| 484 | |
Mark A. Greer | b9e6342 | 2009-09-15 18:14:19 -0700 | [diff] [blame] | 485 | struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = { |
| 486 | .manu_name = "sharp", |
| 487 | .controller_data = &lcd_cfg, |
| 488 | .type = "Sharp_LCD035Q3DG01", |
| 489 | }; |
| 490 | |
| 491 | struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = { |
| 492 | .manu_name = "sharp", |
| 493 | .controller_data = &lcd_cfg, |
| 494 | .type = "Sharp_LK043T1DG01", |
Sudhakar Rajashekhara | 5cbdf27 | 2009-08-13 14:33:14 -0400 | [diff] [blame] | 495 | }; |
| 496 | |
| 497 | static struct resource da8xx_lcdc_resources[] = { |
| 498 | [0] = { /* registers */ |
| 499 | .start = DA8XX_LCD_CNTRL_BASE, |
| 500 | .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1, |
| 501 | .flags = IORESOURCE_MEM, |
| 502 | }, |
| 503 | [1] = { /* interrupt */ |
| 504 | .start = IRQ_DA8XX_LCDINT, |
| 505 | .end = IRQ_DA8XX_LCDINT, |
| 506 | .flags = IORESOURCE_IRQ, |
| 507 | }, |
| 508 | }; |
| 509 | |
Mark A. Greer | b9e6342 | 2009-09-15 18:14:19 -0700 | [diff] [blame] | 510 | static struct platform_device da8xx_lcdc_device = { |
Sudhakar Rajashekhara | 5cbdf27 | 2009-08-13 14:33:14 -0400 | [diff] [blame] | 511 | .name = "da8xx_lcdc", |
| 512 | .id = 0, |
| 513 | .num_resources = ARRAY_SIZE(da8xx_lcdc_resources), |
| 514 | .resource = da8xx_lcdc_resources, |
Sudhakar Rajashekhara | 5cbdf27 | 2009-08-13 14:33:14 -0400 | [diff] [blame] | 515 | }; |
| 516 | |
Mark A. Greer | b9e6342 | 2009-09-15 18:14:19 -0700 | [diff] [blame] | 517 | int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata) |
Sudhakar Rajashekhara | 5cbdf27 | 2009-08-13 14:33:14 -0400 | [diff] [blame] | 518 | { |
Mark A. Greer | b9e6342 | 2009-09-15 18:14:19 -0700 | [diff] [blame] | 519 | da8xx_lcdc_device.dev.platform_data = pdata; |
| 520 | return platform_device_register(&da8xx_lcdc_device); |
Sudhakar Rajashekhara | 5cbdf27 | 2009-08-13 14:33:14 -0400 | [diff] [blame] | 521 | } |
Sudhakar Rajashekhara | 700691f | 2009-08-13 15:16:23 -0400 | [diff] [blame] | 522 | |
| 523 | static struct resource da8xx_mmcsd0_resources[] = { |
| 524 | { /* registers */ |
| 525 | .start = DA8XX_MMCSD0_BASE, |
| 526 | .end = DA8XX_MMCSD0_BASE + SZ_4K - 1, |
| 527 | .flags = IORESOURCE_MEM, |
| 528 | }, |
| 529 | { /* interrupt */ |
| 530 | .start = IRQ_DA8XX_MMCSDINT0, |
| 531 | .end = IRQ_DA8XX_MMCSDINT0, |
| 532 | .flags = IORESOURCE_IRQ, |
| 533 | }, |
| 534 | { /* DMA RX */ |
| 535 | .start = EDMA_CTLR_CHAN(0, 16), |
| 536 | .end = EDMA_CTLR_CHAN(0, 16), |
| 537 | .flags = IORESOURCE_DMA, |
| 538 | }, |
| 539 | { /* DMA TX */ |
| 540 | .start = EDMA_CTLR_CHAN(0, 17), |
| 541 | .end = EDMA_CTLR_CHAN(0, 17), |
| 542 | .flags = IORESOURCE_DMA, |
| 543 | }, |
| 544 | }; |
| 545 | |
| 546 | static struct platform_device da8xx_mmcsd0_device = { |
| 547 | .name = "davinci_mmc", |
| 548 | .id = 0, |
| 549 | .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources), |
| 550 | .resource = da8xx_mmcsd0_resources, |
| 551 | }; |
| 552 | |
| 553 | int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config) |
| 554 | { |
| 555 | da8xx_mmcsd0_device.dev.platform_data = config; |
| 556 | return platform_device_register(&da8xx_mmcsd0_device); |
| 557 | } |
Mark A. Greer | c51df70 | 2009-09-15 18:15:54 -0700 | [diff] [blame] | 558 | |
| 559 | static struct resource da8xx_rtc_resources[] = { |
| 560 | { |
| 561 | .start = DA8XX_RTC_BASE, |
| 562 | .end = DA8XX_RTC_BASE + SZ_4K - 1, |
| 563 | .flags = IORESOURCE_MEM, |
| 564 | }, |
| 565 | { /* timer irq */ |
| 566 | .start = IRQ_DA8XX_RTC, |
| 567 | .end = IRQ_DA8XX_RTC, |
| 568 | .flags = IORESOURCE_IRQ, |
| 569 | }, |
| 570 | { /* alarm irq */ |
| 571 | .start = IRQ_DA8XX_RTC, |
| 572 | .end = IRQ_DA8XX_RTC, |
| 573 | .flags = IORESOURCE_IRQ, |
| 574 | }, |
| 575 | }; |
| 576 | |
| 577 | static struct platform_device da8xx_rtc_device = { |
| 578 | .name = "omap_rtc", |
| 579 | .id = -1, |
| 580 | .num_resources = ARRAY_SIZE(da8xx_rtc_resources), |
| 581 | .resource = da8xx_rtc_resources, |
| 582 | }; |
| 583 | |
| 584 | int da8xx_register_rtc(void) |
| 585 | { |
Sekhar Nori | 75c99bb | 2009-11-16 17:21:31 +0530 | [diff] [blame] | 586 | int ret; |
Cyril Chemparathy | db6db5d | 2010-05-07 17:06:33 -0400 | [diff] [blame] | 587 | void __iomem *base; |
| 588 | |
| 589 | base = ioremap(DA8XX_RTC_BASE, SZ_4K); |
| 590 | if (WARN_ON(!base)) |
| 591 | return -ENOMEM; |
Sekhar Nori | 75c99bb | 2009-11-16 17:21:31 +0530 | [diff] [blame] | 592 | |
Mark A. Greer | c51df70 | 2009-09-15 18:15:54 -0700 | [diff] [blame] | 593 | /* Unlock the rtc's registers */ |
Cyril Chemparathy | db6db5d | 2010-05-07 17:06:33 -0400 | [diff] [blame] | 594 | __raw_writel(0x83e70b13, base + 0x6c); |
| 595 | __raw_writel(0x95a4f1e0, base + 0x70); |
| 596 | |
| 597 | iounmap(base); |
Mark A. Greer | c51df70 | 2009-09-15 18:15:54 -0700 | [diff] [blame] | 598 | |
Sekhar Nori | 75c99bb | 2009-11-16 17:21:31 +0530 | [diff] [blame] | 599 | ret = platform_device_register(&da8xx_rtc_device); |
| 600 | if (!ret) |
| 601 | /* Atleast on DA850, RTC is a wakeup source */ |
| 602 | device_init_wakeup(&da8xx_rtc_device.dev, true); |
| 603 | |
| 604 | return ret; |
Mark A. Greer | c51df70 | 2009-09-15 18:15:54 -0700 | [diff] [blame] | 605 | } |
Sekhar Nori | 1960e69 | 2009-10-22 15:12:14 +0530 | [diff] [blame] | 606 | |
Sekhar Nori | 948c66d | 2009-11-16 17:21:37 +0530 | [diff] [blame] | 607 | static void __iomem *da8xx_ddr2_ctlr_base; |
| 608 | void __iomem * __init da8xx_get_mem_ctlr(void) |
| 609 | { |
| 610 | if (da8xx_ddr2_ctlr_base) |
| 611 | return da8xx_ddr2_ctlr_base; |
| 612 | |
| 613 | da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K); |
| 614 | if (!da8xx_ddr2_ctlr_base) |
| 615 | pr_warning("%s: Unable to map DDR2 controller", __func__); |
| 616 | |
| 617 | return da8xx_ddr2_ctlr_base; |
| 618 | } |
| 619 | |
Sekhar Nori | 1960e69 | 2009-10-22 15:12:14 +0530 | [diff] [blame] | 620 | static struct resource da8xx_cpuidle_resources[] = { |
| 621 | { |
| 622 | .start = DA8XX_DDR2_CTL_BASE, |
| 623 | .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1, |
| 624 | .flags = IORESOURCE_MEM, |
| 625 | }, |
| 626 | }; |
| 627 | |
| 628 | /* DA8XX devices support DDR2 power down */ |
| 629 | static struct davinci_cpuidle_config da8xx_cpuidle_pdata = { |
| 630 | .ddr2_pdown = 1, |
| 631 | }; |
| 632 | |
| 633 | |
| 634 | static struct platform_device da8xx_cpuidle_device = { |
| 635 | .name = "cpuidle-davinci", |
| 636 | .num_resources = ARRAY_SIZE(da8xx_cpuidle_resources), |
| 637 | .resource = da8xx_cpuidle_resources, |
| 638 | .dev = { |
| 639 | .platform_data = &da8xx_cpuidle_pdata, |
| 640 | }, |
| 641 | }; |
| 642 | |
| 643 | int __init da8xx_register_cpuidle(void) |
| 644 | { |
Sekhar Nori | 948c66d | 2009-11-16 17:21:37 +0530 | [diff] [blame] | 645 | da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr(); |
| 646 | |
Sekhar Nori | 1960e69 | 2009-10-22 15:12:14 +0530 | [diff] [blame] | 647 | return platform_device_register(&da8xx_cpuidle_device); |
| 648 | } |