Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 1 | /* |
| 2 | * mmconfig-shared.c - Low-level direct PCI config space access via |
| 3 | * MMCONFIG - common code between i386 and x86-64. |
| 4 | * |
| 5 | * This code does: |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 6 | * - known chipset handling |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 7 | * - ACPI decoding and validation |
| 8 | * |
| 9 | * Per-architecture code takes care of the mappings and accesses |
| 10 | * themselves. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/pci.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/acpi.h> |
Feng Tang | 5f0db7a | 2009-08-14 15:37:50 -0400 | [diff] [blame] | 16 | #include <linux/sfi_acpi.h> |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 17 | #include <linux/bitmap.h> |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 18 | #include <linux/sort.h> |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 19 | #include <asm/e820.h> |
Jaswinder Singh Rajput | 8248771 | 2008-12-27 18:32:28 +0530 | [diff] [blame] | 20 | #include <asm/pci_x86.h> |
Feng Tang | 5f0db7a | 2009-08-14 15:37:50 -0400 | [diff] [blame] | 21 | #include <asm/acpi.h> |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 22 | |
Len Brown | f4a2d58 | 2009-07-28 16:48:02 -0400 | [diff] [blame] | 23 | #define PREFIX "PCI: " |
Len Brown | a192a95 | 2009-07-28 16:45:54 -0400 | [diff] [blame] | 24 | |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 25 | /* aperture is up to 256MB but BIOS may reserve less */ |
| 26 | #define MMCONFIG_APER_MIN (2 * 1024*1024) |
| 27 | #define MMCONFIG_APER_MAX (256 * 1024*1024) |
| 28 | |
Aaron Durbin | a5ba797 | 2007-07-21 17:10:34 +0200 | [diff] [blame] | 29 | /* Indicate if the mmcfg resources have been placed into the resource table. */ |
| 30 | static int __initdata pci_mmcfg_resources_inserted; |
| 31 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 32 | static __init int extend_mmcfg(int num) |
| 33 | { |
| 34 | struct acpi_mcfg_allocation *new; |
| 35 | int new_num = pci_mmcfg_config_num + num; |
| 36 | |
| 37 | new = kzalloc(sizeof(pci_mmcfg_config[0]) * new_num, GFP_KERNEL); |
| 38 | if (!new) |
| 39 | return -1; |
| 40 | |
| 41 | if (pci_mmcfg_config) { |
| 42 | memcpy(new, pci_mmcfg_config, |
| 43 | sizeof(pci_mmcfg_config[0]) * new_num); |
| 44 | kfree(pci_mmcfg_config); |
| 45 | } |
| 46 | pci_mmcfg_config = new; |
| 47 | |
| 48 | return 0; |
| 49 | } |
| 50 | |
| 51 | static __init void fill_one_mmcfg(u64 addr, int segment, int start, int end) |
| 52 | { |
| 53 | int i = pci_mmcfg_config_num; |
| 54 | |
| 55 | pci_mmcfg_config_num++; |
| 56 | pci_mmcfg_config[i].address = addr; |
| 57 | pci_mmcfg_config[i].pci_segment = segment; |
| 58 | pci_mmcfg_config[i].start_bus_number = start; |
| 59 | pci_mmcfg_config[i].end_bus_number = end; |
| 60 | } |
| 61 | |
OGAWA Hirofumi | 429d512 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 62 | static const char __init *pci_mmcfg_e7520(void) |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 63 | { |
| 64 | u32 win; |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 65 | raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0xce, 2, &win); |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 66 | |
Olivier Galibert | b5229db | 2007-05-02 19:27:22 +0200 | [diff] [blame] | 67 | win = win & 0xf000; |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 68 | if (win == 0x0000 || win == 0xf000) |
| 69 | return NULL; |
| 70 | |
| 71 | if (extend_mmcfg(1) == -1) |
| 72 | return NULL; |
| 73 | |
| 74 | fill_one_mmcfg(win << 16, 0, 0, 255); |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 75 | |
| 76 | return "Intel Corporation E7520 Memory Controller Hub"; |
| 77 | } |
| 78 | |
OGAWA Hirofumi | 429d512 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 79 | static const char __init *pci_mmcfg_intel_945(void) |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 80 | { |
| 81 | u32 pciexbar, mask = 0, len = 0; |
| 82 | |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 83 | raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0x48, 4, &pciexbar); |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 84 | |
| 85 | /* Enable bit */ |
| 86 | if (!(pciexbar & 1)) |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 87 | return NULL; |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 88 | |
| 89 | /* Size bits */ |
| 90 | switch ((pciexbar >> 1) & 3) { |
| 91 | case 0: |
| 92 | mask = 0xf0000000U; |
| 93 | len = 0x10000000U; |
| 94 | break; |
| 95 | case 1: |
| 96 | mask = 0xf8000000U; |
| 97 | len = 0x08000000U; |
| 98 | break; |
| 99 | case 2: |
| 100 | mask = 0xfc000000U; |
| 101 | len = 0x04000000U; |
| 102 | break; |
| 103 | default: |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 104 | return NULL; |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | /* Errata #2, things break when not aligned on a 256Mb boundary */ |
| 108 | /* Can only happen in 64M/128M mode */ |
| 109 | |
| 110 | if ((pciexbar & mask) & 0x0fffffffU) |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 111 | return NULL; |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 112 | |
Olivier Galibert | b5229db | 2007-05-02 19:27:22 +0200 | [diff] [blame] | 113 | /* Don't hit the APIC registers and their friends */ |
| 114 | if ((pciexbar & mask) >= 0xf0000000U) |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 115 | return NULL; |
Olivier Galibert | b5229db | 2007-05-02 19:27:22 +0200 | [diff] [blame] | 116 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 117 | if (extend_mmcfg(1) == -1) |
| 118 | return NULL; |
| 119 | |
| 120 | fill_one_mmcfg(pciexbar & mask, 0, 0, (len >> 20) - 1); |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 121 | |
| 122 | return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub"; |
| 123 | } |
| 124 | |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 125 | static const char __init *pci_mmcfg_amd_fam10h(void) |
| 126 | { |
| 127 | u32 low, high, address; |
| 128 | u64 base, msr; |
| 129 | int i; |
| 130 | unsigned segnbits = 0, busnbits; |
| 131 | |
Yinghai Lu | 5f0b297 | 2008-04-14 16:08:25 -0700 | [diff] [blame] | 132 | if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF)) |
| 133 | return NULL; |
| 134 | |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 135 | address = MSR_FAM10H_MMIO_CONF_BASE; |
| 136 | if (rdmsr_safe(address, &low, &high)) |
| 137 | return NULL; |
| 138 | |
| 139 | msr = high; |
| 140 | msr <<= 32; |
| 141 | msr |= low; |
| 142 | |
| 143 | /* mmconfig is not enable */ |
| 144 | if (!(msr & FAM10H_MMIO_CONF_ENABLE)) |
| 145 | return NULL; |
| 146 | |
| 147 | base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT); |
| 148 | |
| 149 | busnbits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) & |
| 150 | FAM10H_MMIO_CONF_BUSRANGE_MASK; |
| 151 | |
| 152 | /* |
| 153 | * only handle bus 0 ? |
| 154 | * need to skip it |
| 155 | */ |
| 156 | if (!busnbits) |
| 157 | return NULL; |
| 158 | |
| 159 | if (busnbits > 8) { |
| 160 | segnbits = busnbits - 8; |
| 161 | busnbits = 8; |
| 162 | } |
| 163 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 164 | if (extend_mmcfg(1 << segnbits) == -1) |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 165 | return NULL; |
| 166 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 167 | for (i = 0; i < (1 << segnbits); i++) |
| 168 | fill_one_mmcfg(base + (1<<28) * i, i, 0, (1 << busnbits) - 1); |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 169 | |
| 170 | return "AMD Family 10h NB"; |
| 171 | } |
| 172 | |
Ed Swierk | 5546d6f | 2009-03-19 20:57:56 -0700 | [diff] [blame] | 173 | static bool __initdata mcp55_checked; |
| 174 | static const char __init *pci_mmcfg_nvidia_mcp55(void) |
| 175 | { |
| 176 | int bus; |
| 177 | int mcp55_mmconf_found = 0; |
| 178 | |
| 179 | static const u32 extcfg_regnum = 0x90; |
| 180 | static const u32 extcfg_regsize = 4; |
| 181 | static const u32 extcfg_enable_mask = 1<<31; |
| 182 | static const u32 extcfg_start_mask = 0xff<<16; |
| 183 | static const int extcfg_start_shift = 16; |
| 184 | static const u32 extcfg_size_mask = 0x3<<28; |
| 185 | static const int extcfg_size_shift = 28; |
| 186 | static const int extcfg_sizebus[] = {0x100, 0x80, 0x40, 0x20}; |
| 187 | static const u32 extcfg_base_mask[] = {0x7ff8, 0x7ffc, 0x7ffe, 0x7fff}; |
| 188 | static const int extcfg_base_lshift = 25; |
| 189 | |
| 190 | /* |
| 191 | * do check if amd fam10h already took over |
| 192 | */ |
| 193 | if (!acpi_disabled || pci_mmcfg_config_num || mcp55_checked) |
| 194 | return NULL; |
| 195 | |
| 196 | mcp55_checked = true; |
| 197 | for (bus = 0; bus < 256; bus++) { |
| 198 | u64 base; |
| 199 | u32 l, extcfg; |
| 200 | u16 vendor, device; |
| 201 | int start, size_index, end; |
| 202 | |
| 203 | raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), 0, 4, &l); |
| 204 | vendor = l & 0xffff; |
| 205 | device = (l >> 16) & 0xffff; |
| 206 | |
| 207 | if (PCI_VENDOR_ID_NVIDIA != vendor || 0x0369 != device) |
| 208 | continue; |
| 209 | |
| 210 | raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), extcfg_regnum, |
| 211 | extcfg_regsize, &extcfg); |
| 212 | |
| 213 | if (!(extcfg & extcfg_enable_mask)) |
| 214 | continue; |
| 215 | |
| 216 | if (extend_mmcfg(1) == -1) |
| 217 | continue; |
| 218 | |
| 219 | size_index = (extcfg & extcfg_size_mask) >> extcfg_size_shift; |
| 220 | base = extcfg & extcfg_base_mask[size_index]; |
| 221 | /* base could > 4G */ |
| 222 | base <<= extcfg_base_lshift; |
| 223 | start = (extcfg & extcfg_start_mask) >> extcfg_start_shift; |
| 224 | end = start + extcfg_sizebus[size_index] - 1; |
| 225 | fill_one_mmcfg(base, 0, start, end); |
| 226 | mcp55_mmconf_found++; |
| 227 | } |
| 228 | |
| 229 | if (!mcp55_mmconf_found) |
| 230 | return NULL; |
| 231 | |
| 232 | return "nVidia MCP55"; |
| 233 | } |
| 234 | |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 235 | struct pci_mmcfg_hostbridge_probe { |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 236 | u32 bus; |
| 237 | u32 devfn; |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 238 | u32 vendor; |
| 239 | u32 device; |
| 240 | const char *(*probe)(void); |
| 241 | }; |
| 242 | |
OGAWA Hirofumi | 429d512 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 243 | static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = { |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 244 | { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL, |
| 245 | PCI_DEVICE_ID_INTEL_E7520_MCH, pci_mmcfg_e7520 }, |
| 246 | { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL, |
| 247 | PCI_DEVICE_ID_INTEL_82945G_HB, pci_mmcfg_intel_945 }, |
| 248 | { 0, PCI_DEVFN(0x18, 0), PCI_VENDOR_ID_AMD, |
| 249 | 0x1200, pci_mmcfg_amd_fam10h }, |
| 250 | { 0xff, PCI_DEVFN(0, 0), PCI_VENDOR_ID_AMD, |
| 251 | 0x1200, pci_mmcfg_amd_fam10h }, |
Ed Swierk | 5546d6f | 2009-03-19 20:57:56 -0700 | [diff] [blame] | 252 | { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_NVIDIA, |
| 253 | 0x0369, pci_mmcfg_nvidia_mcp55 }, |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 254 | }; |
| 255 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 256 | static int __init cmp_mmcfg(const void *x1, const void *x2) |
| 257 | { |
| 258 | const typeof(pci_mmcfg_config[0]) *m1 = x1; |
| 259 | const typeof(pci_mmcfg_config[0]) *m2 = x2; |
| 260 | int start1, start2; |
| 261 | |
| 262 | start1 = m1->start_bus_number; |
| 263 | start2 = m2->start_bus_number; |
| 264 | |
| 265 | return start1 - start2; |
| 266 | } |
| 267 | |
| 268 | static void __init pci_mmcfg_check_end_bus_number(void) |
| 269 | { |
| 270 | int i; |
| 271 | typeof(pci_mmcfg_config[0]) *cfg, *cfgx; |
| 272 | |
| 273 | /* sort them at first */ |
| 274 | sort(pci_mmcfg_config, pci_mmcfg_config_num, |
| 275 | sizeof(pci_mmcfg_config[0]), cmp_mmcfg, NULL); |
| 276 | |
| 277 | /* last one*/ |
| 278 | if (pci_mmcfg_config_num > 0) { |
| 279 | i = pci_mmcfg_config_num - 1; |
| 280 | cfg = &pci_mmcfg_config[i]; |
| 281 | if (cfg->end_bus_number < cfg->start_bus_number) |
| 282 | cfg->end_bus_number = 255; |
| 283 | } |
| 284 | |
| 285 | /* don't overlap please */ |
| 286 | for (i = 0; i < pci_mmcfg_config_num - 1; i++) { |
| 287 | cfg = &pci_mmcfg_config[i]; |
| 288 | cfgx = &pci_mmcfg_config[i+1]; |
| 289 | |
| 290 | if (cfg->end_bus_number < cfg->start_bus_number) |
| 291 | cfg->end_bus_number = 255; |
| 292 | |
| 293 | if (cfg->end_bus_number >= cfgx->start_bus_number) |
| 294 | cfg->end_bus_number = cfgx->start_bus_number - 1; |
| 295 | } |
| 296 | } |
| 297 | |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 298 | static int __init pci_mmcfg_check_hostbridge(void) |
| 299 | { |
| 300 | u32 l; |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 301 | u32 bus, devfn; |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 302 | u16 vendor, device; |
| 303 | int i; |
| 304 | const char *name; |
| 305 | |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 306 | if (!raw_pci_ops) |
| 307 | return 0; |
| 308 | |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 309 | pci_mmcfg_config_num = 0; |
| 310 | pci_mmcfg_config = NULL; |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 311 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 312 | for (i = 0; i < ARRAY_SIZE(pci_mmcfg_probes); i++) { |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 313 | bus = pci_mmcfg_probes[i].bus; |
| 314 | devfn = pci_mmcfg_probes[i].devfn; |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 315 | raw_pci_ops->read(0, bus, devfn, 0, 4, &l); |
Yinghai Lu | 7fd0da4 | 2008-02-19 03:13:02 -0800 | [diff] [blame] | 316 | vendor = l & 0xffff; |
| 317 | device = (l >> 16) & 0xffff; |
| 318 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 319 | name = NULL; |
OGAWA Hirofumi | 429d512 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 320 | if (pci_mmcfg_probes[i].vendor == vendor && |
| 321 | pci_mmcfg_probes[i].device == device) |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 322 | name = pci_mmcfg_probes[i].probe(); |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 323 | |
| 324 | if (name) |
| 325 | printk(KERN_INFO "PCI: Found %s with MMCONFIG support.\n", |
| 326 | name); |
OGAWA Hirofumi | 429d512 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 327 | } |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 328 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 329 | /* some end_bus_number is crazy, fix it */ |
| 330 | pci_mmcfg_check_end_bus_number(); |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 331 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 332 | return pci_mmcfg_config_num != 0; |
Olivier Galibert | 9358c69 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 333 | } |
| 334 | |
Yinghai Lu | ebd60cd | 2008-09-04 21:04:32 +0200 | [diff] [blame] | 335 | static void __init pci_mmcfg_insert_resources(void) |
Olivier Galibert | 6a0668f | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 336 | { |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 337 | #define PCI_MMCFG_RESOURCE_NAME_LEN 24 |
Olivier Galibert | 6a0668f | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 338 | int i; |
| 339 | struct resource *res; |
| 340 | char *names; |
| 341 | unsigned num_buses; |
| 342 | |
| 343 | res = kcalloc(PCI_MMCFG_RESOURCE_NAME_LEN + sizeof(*res), |
| 344 | pci_mmcfg_config_num, GFP_KERNEL); |
Olivier Galibert | 6a0668f | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 345 | if (!res) { |
| 346 | printk(KERN_ERR "PCI: Unable to allocate MMCONFIG resources\n"); |
| 347 | return; |
| 348 | } |
| 349 | |
| 350 | names = (void *)&res[pci_mmcfg_config_num]; |
| 351 | for (i = 0; i < pci_mmcfg_config_num; i++, res++) { |
OGAWA Hirofumi | 429d512 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 352 | struct acpi_mcfg_allocation *cfg = &pci_mmcfg_config[i]; |
| 353 | num_buses = cfg->end_bus_number - cfg->start_bus_number + 1; |
Olivier Galibert | 6a0668f | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 354 | res->name = names; |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 355 | snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN, |
| 356 | "PCI MMCONFIG %u [%02x-%02x]", cfg->pci_segment, |
| 357 | cfg->start_bus_number, cfg->end_bus_number); |
| 358 | res->start = cfg->address + (cfg->start_bus_number << 20); |
Olivier Galibert | 6a0668f | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 359 | res->end = res->start + (num_buses << 20) - 1; |
Yinghai Lu | ebd60cd | 2008-09-04 21:04:32 +0200 | [diff] [blame] | 360 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
Olivier Galibert | 6a0668f | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 361 | insert_resource(&iomem_resource, res); |
| 362 | names += PCI_MMCFG_RESOURCE_NAME_LEN; |
| 363 | } |
Aaron Durbin | a5ba797 | 2007-07-21 17:10:34 +0200 | [diff] [blame] | 364 | |
| 365 | /* Mark that the resources have been inserted. */ |
| 366 | pci_mmcfg_resources_inserted = 1; |
Olivier Galibert | 6a0668f | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 367 | } |
| 368 | |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 369 | static acpi_status __init check_mcfg_resource(struct acpi_resource *res, |
| 370 | void *data) |
| 371 | { |
| 372 | struct resource *mcfg_res = data; |
| 373 | struct acpi_resource_address64 address; |
| 374 | acpi_status status; |
| 375 | |
| 376 | if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
| 377 | struct acpi_resource_fixed_memory32 *fixmem32 = |
| 378 | &res->data.fixed_memory32; |
| 379 | if (!fixmem32) |
| 380 | return AE_OK; |
| 381 | if ((mcfg_res->start >= fixmem32->address) && |
Yinghai Lu | 75e613c | 2009-06-03 00:13:13 -0700 | [diff] [blame] | 382 | (mcfg_res->end < (fixmem32->address + |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 383 | fixmem32->address_length))) { |
| 384 | mcfg_res->flags = 1; |
| 385 | return AE_CTRL_TERMINATE; |
| 386 | } |
| 387 | } |
| 388 | if ((res->type != ACPI_RESOURCE_TYPE_ADDRESS32) && |
| 389 | (res->type != ACPI_RESOURCE_TYPE_ADDRESS64)) |
| 390 | return AE_OK; |
| 391 | |
| 392 | status = acpi_resource_to_address64(res, &address); |
| 393 | if (ACPI_FAILURE(status) || |
| 394 | (address.address_length <= 0) || |
| 395 | (address.resource_type != ACPI_MEMORY_RANGE)) |
| 396 | return AE_OK; |
| 397 | |
| 398 | if ((mcfg_res->start >= address.minimum) && |
Yinghai Lu | 75e613c | 2009-06-03 00:13:13 -0700 | [diff] [blame] | 399 | (mcfg_res->end < (address.minimum + address.address_length))) { |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 400 | mcfg_res->flags = 1; |
| 401 | return AE_CTRL_TERMINATE; |
| 402 | } |
| 403 | return AE_OK; |
| 404 | } |
| 405 | |
| 406 | static acpi_status __init find_mboard_resource(acpi_handle handle, u32 lvl, |
| 407 | void *context, void **rv) |
| 408 | { |
| 409 | struct resource *mcfg_res = context; |
| 410 | |
| 411 | acpi_walk_resources(handle, METHOD_NAME__CRS, |
| 412 | check_mcfg_resource, context); |
| 413 | |
| 414 | if (mcfg_res->flags) |
| 415 | return AE_CTRL_TERMINATE; |
| 416 | |
| 417 | return AE_OK; |
| 418 | } |
| 419 | |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 420 | static int __init is_acpi_reserved(u64 start, u64 end, unsigned not_used) |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 421 | { |
| 422 | struct resource mcfg_res; |
| 423 | |
| 424 | mcfg_res.start = start; |
Yinghai Lu | 75e613c | 2009-06-03 00:13:13 -0700 | [diff] [blame] | 425 | mcfg_res.end = end - 1; |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 426 | mcfg_res.flags = 0; |
| 427 | |
| 428 | acpi_get_devices("PNP0C01", find_mboard_resource, &mcfg_res, NULL); |
| 429 | |
| 430 | if (!mcfg_res.flags) |
| 431 | acpi_get_devices("PNP0C02", find_mboard_resource, &mcfg_res, |
| 432 | NULL); |
| 433 | |
| 434 | return mcfg_res.flags; |
| 435 | } |
| 436 | |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 437 | typedef int (*check_reserved_t)(u64 start, u64 end, unsigned type); |
| 438 | |
| 439 | static int __init is_mmconf_reserved(check_reserved_t is_reserved, |
| 440 | u64 addr, u64 size, int i, |
| 441 | typeof(pci_mmcfg_config[0]) *cfg, int with_e820) |
| 442 | { |
| 443 | u64 old_size = size; |
| 444 | int valid = 0; |
| 445 | |
Yinghai Lu | 044cd80 | 2009-04-18 01:43:46 -0700 | [diff] [blame] | 446 | while (!is_reserved(addr, addr + size, E820_RESERVED)) { |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 447 | size >>= 1; |
| 448 | if (size < (16UL<<20)) |
| 449 | break; |
| 450 | } |
| 451 | |
| 452 | if (size >= (16UL<<20) || size == old_size) { |
| 453 | printk(KERN_NOTICE |
| 454 | "PCI: MCFG area at %Lx reserved in %s\n", |
| 455 | addr, with_e820?"E820":"ACPI motherboard resources"); |
| 456 | valid = 1; |
| 457 | |
| 458 | if (old_size != size) { |
| 459 | /* update end_bus_number */ |
| 460 | cfg->end_bus_number = cfg->start_bus_number + ((size>>20) - 1); |
| 461 | printk(KERN_NOTICE "PCI: updated MCFG configuration %d: base %lx " |
| 462 | "segment %hu buses %u - %u\n", |
| 463 | i, (unsigned long)cfg->address, cfg->pci_segment, |
| 464 | (unsigned int)cfg->start_bus_number, |
| 465 | (unsigned int)cfg->end_bus_number); |
| 466 | } |
| 467 | } |
| 468 | |
| 469 | return valid; |
| 470 | } |
| 471 | |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 472 | static void __init pci_mmcfg_reject_broken(int early) |
OGAWA Hirofumi | 44de020 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 473 | { |
OGAWA Hirofumi | 26054ed | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 474 | typeof(pci_mmcfg_config[0]) *cfg; |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 475 | int i; |
OGAWA Hirofumi | 26054ed | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 476 | |
| 477 | if ((pci_mmcfg_config_num == 0) || |
| 478 | (pci_mmcfg_config == NULL) || |
| 479 | (pci_mmcfg_config[0].address == 0)) |
| 480 | return; |
| 481 | |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 482 | for (i = 0; i < pci_mmcfg_config_num; i++) { |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 483 | int valid = 0; |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 484 | u64 addr, size; |
| 485 | |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 486 | cfg = &pci_mmcfg_config[i]; |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 487 | addr = cfg->start_bus_number; |
| 488 | addr <<= 20; |
| 489 | addr += cfg->address; |
| 490 | size = cfg->end_bus_number + 1 - cfg->start_bus_number; |
| 491 | size <<= 20; |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 492 | printk(KERN_NOTICE "PCI: MCFG configuration %d: base %lx " |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 493 | "segment %hu buses %u - %u\n", |
| 494 | i, (unsigned long)cfg->address, cfg->pci_segment, |
| 495 | (unsigned int)cfg->start_bus_number, |
| 496 | (unsigned int)cfg->end_bus_number); |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 497 | |
Feng Tang | 5f0db7a | 2009-08-14 15:37:50 -0400 | [diff] [blame] | 498 | if (!early && !acpi_disabled) |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 499 | valid = is_mmconf_reserved(is_acpi_reserved, addr, size, i, cfg, 0); |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 500 | |
| 501 | if (valid) |
| 502 | continue; |
| 503 | |
| 504 | if (!early) |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 505 | printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %Lx is not" |
| 506 | " reserved in ACPI motherboard resources\n", |
| 507 | cfg->address); |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 508 | |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 509 | /* Don't try to do this check unless configuration |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 510 | type 1 is available. how about type 2 ?*/ |
Yinghai Lu | a83fe32 | 2008-07-18 13:22:36 -0700 | [diff] [blame] | 511 | if (raw_pci_ops) |
| 512 | valid = is_mmconf_reserved(e820_all_mapped, addr, size, i, cfg, 1); |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 513 | |
| 514 | if (!valid) |
| 515 | goto reject; |
OGAWA Hirofumi | 26054ed | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 516 | } |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 517 | |
OGAWA Hirofumi | 26054ed | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 518 | return; |
| 519 | |
| 520 | reject: |
Dave Jones | ef31023 | 2008-08-14 15:07:03 -0400 | [diff] [blame] | 521 | printk(KERN_INFO "PCI: Not using MMCONFIG.\n"); |
Yinghai Lu | 0b64ad7 | 2008-02-15 01:28:41 -0800 | [diff] [blame] | 522 | pci_mmcfg_arch_free(); |
OGAWA Hirofumi | 26054ed | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 523 | kfree(pci_mmcfg_config); |
| 524 | pci_mmcfg_config = NULL; |
| 525 | pci_mmcfg_config_num = 0; |
OGAWA Hirofumi | 44de020 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 526 | } |
| 527 | |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 528 | static int __initdata known_bridge; |
| 529 | |
Len Brown | c4bf2f3 | 2009-06-11 23:53:55 -0400 | [diff] [blame] | 530 | static int acpi_mcfg_64bit_base_addr __initdata = FALSE; |
| 531 | |
| 532 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
| 533 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
| 534 | int pci_mmcfg_config_num; |
| 535 | |
| 536 | static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg) |
| 537 | { |
| 538 | if (!strcmp(mcfg->header.oem_id, "SGI")) |
| 539 | acpi_mcfg_64bit_base_addr = TRUE; |
| 540 | |
| 541 | return 0; |
| 542 | } |
| 543 | |
| 544 | static int __init pci_parse_mcfg(struct acpi_table_header *header) |
| 545 | { |
| 546 | struct acpi_table_mcfg *mcfg; |
| 547 | unsigned long i; |
| 548 | int config_size; |
| 549 | |
| 550 | if (!header) |
| 551 | return -EINVAL; |
| 552 | |
| 553 | mcfg = (struct acpi_table_mcfg *)header; |
| 554 | |
| 555 | /* how many config structures do we have */ |
| 556 | pci_mmcfg_config_num = 0; |
| 557 | i = header->length - sizeof(struct acpi_table_mcfg); |
| 558 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
| 559 | ++pci_mmcfg_config_num; |
| 560 | i -= sizeof(struct acpi_mcfg_allocation); |
| 561 | }; |
| 562 | if (pci_mmcfg_config_num == 0) { |
| 563 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); |
| 564 | return -ENODEV; |
| 565 | } |
| 566 | |
| 567 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
| 568 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); |
| 569 | if (!pci_mmcfg_config) { |
| 570 | printk(KERN_WARNING PREFIX |
| 571 | "No memory for MCFG config tables\n"); |
| 572 | return -ENOMEM; |
| 573 | } |
| 574 | |
| 575 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
| 576 | |
| 577 | acpi_mcfg_oem_check(mcfg); |
| 578 | |
| 579 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
| 580 | if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) && |
| 581 | !acpi_mcfg_64bit_base_addr) { |
| 582 | printk(KERN_ERR PREFIX |
| 583 | "MMCONFIG not in low 4GB of memory\n"); |
| 584 | kfree(pci_mmcfg_config); |
| 585 | pci_mmcfg_config_num = 0; |
| 586 | return -ENODEV; |
| 587 | } |
| 588 | } |
| 589 | |
| 590 | return 0; |
| 591 | } |
| 592 | |
Thomas Gleixner | 968cbfa | 2008-05-12 15:43:37 +0200 | [diff] [blame] | 593 | static void __init __pci_mmcfg_init(int early) |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 594 | { |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 595 | /* MMCONFIG disabled */ |
| 596 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) |
| 597 | return; |
| 598 | |
| 599 | /* MMCONFIG already enabled */ |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 600 | if (!early && !(pci_probe & PCI_PROBE_MASK & ~PCI_PROBE_MMCONF)) |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 601 | return; |
| 602 | |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 603 | /* for late to exit */ |
| 604 | if (known_bridge) |
| 605 | return; |
Robert Hancock | 7752d5c | 2008-02-15 01:27:20 -0800 | [diff] [blame] | 606 | |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 607 | if (early) { |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 608 | if (pci_mmcfg_check_hostbridge()) |
| 609 | known_bridge = 1; |
| 610 | } |
| 611 | |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 612 | if (!known_bridge) |
Feng Tang | 5f0db7a | 2009-08-14 15:37:50 -0400 | [diff] [blame] | 613 | acpi_sfi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg); |
Yinghai Lu | 068258b | 2009-03-19 20:55:35 -0700 | [diff] [blame] | 614 | |
| 615 | pci_mmcfg_reject_broken(early); |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 616 | |
| 617 | if ((pci_mmcfg_config_num == 0) || |
| 618 | (pci_mmcfg_config == NULL) || |
| 619 | (pci_mmcfg_config[0].address == 0)) |
| 620 | return; |
| 621 | |
Yinghai Lu | ebd60cd | 2008-09-04 21:04:32 +0200 | [diff] [blame] | 622 | if (pci_mmcfg_arch_init()) |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 623 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; |
Yinghai Lu | ebd60cd | 2008-09-04 21:04:32 +0200 | [diff] [blame] | 624 | else { |
Aaron Durbin | a5ba797 | 2007-07-21 17:10:34 +0200 | [diff] [blame] | 625 | /* |
| 626 | * Signal not to attempt to insert mmcfg resources because |
| 627 | * the architecture mmcfg setup could not initialize. |
| 628 | */ |
| 629 | pci_mmcfg_resources_inserted = 1; |
Olivier Galibert | b786739 | 2007-02-13 13:26:20 +0100 | [diff] [blame] | 630 | } |
| 631 | } |
Aaron Durbin | a5ba797 | 2007-07-21 17:10:34 +0200 | [diff] [blame] | 632 | |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 633 | void __init pci_mmcfg_early_init(void) |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 634 | { |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 635 | __pci_mmcfg_init(1); |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 636 | } |
| 637 | |
| 638 | void __init pci_mmcfg_late_init(void) |
| 639 | { |
Yinghai Lu | bb63b42 | 2008-02-28 23:56:50 -0800 | [diff] [blame] | 640 | __pci_mmcfg_init(0); |
Yinghai Lu | 05c58b8 | 2008-02-15 01:30:14 -0800 | [diff] [blame] | 641 | } |
| 642 | |
Aaron Durbin | a5ba797 | 2007-07-21 17:10:34 +0200 | [diff] [blame] | 643 | static int __init pci_mmcfg_late_insert_resources(void) |
| 644 | { |
| 645 | /* |
| 646 | * If resources are already inserted or we are not using MMCONFIG, |
| 647 | * don't insert the resources. |
| 648 | */ |
| 649 | if ((pci_mmcfg_resources_inserted == 1) || |
| 650 | (pci_probe & PCI_PROBE_MMCONF) == 0 || |
| 651 | (pci_mmcfg_config_num == 0) || |
| 652 | (pci_mmcfg_config == NULL) || |
| 653 | (pci_mmcfg_config[0].address == 0)) |
| 654 | return 1; |
| 655 | |
| 656 | /* |
| 657 | * Attempt to insert the mmcfg resources but not with the busy flag |
| 658 | * marked so it won't cause request errors when __request_region is |
| 659 | * called. |
| 660 | */ |
Yinghai Lu | ebd60cd | 2008-09-04 21:04:32 +0200 | [diff] [blame] | 661 | pci_mmcfg_insert_resources(); |
Aaron Durbin | a5ba797 | 2007-07-21 17:10:34 +0200 | [diff] [blame] | 662 | |
| 663 | return 0; |
| 664 | } |
| 665 | |
| 666 | /* |
| 667 | * Perform MMCONFIG resource insertion after PCI initialization to allow for |
| 668 | * misprogrammed MCFG tables that state larger sizes but actually conflict |
| 669 | * with other system resources. |
| 670 | */ |
| 671 | late_initcall(pci_mmcfg_late_insert_resources); |