Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * TI DaVinci GPIO Support |
| 3 | * |
| 4 | * Copyright (c) 2006 David Brownell |
| 5 | * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __DAVINCI_GPIO_H |
| 14 | #define __DAVINCI_GPIO_H |
| 15 | |
| 16 | #include <linux/io.h> |
| 17 | #include <mach/hardware.h> |
| 18 | |
| 19 | /* |
| 20 | * basic gpio routines |
| 21 | * |
| 22 | * board-specific init should be done by arch/.../.../board-XXX.c (maybe |
| 23 | * initializing banks together) rather than boot loaders; kexec() won't |
| 24 | * go through boot loaders. |
| 25 | * |
| 26 | * the gpio clock will be turned on when gpios are used, and you may also |
| 27 | * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are |
| 28 | * used as gpios, not with other peripherals. |
| 29 | * |
| 30 | * GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe |
| 31 | * for later updates, code should write GPIO(N) or: |
| 32 | * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) |
| 33 | * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) |
| 34 | * |
| 35 | * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc |
| 36 | * for now, that's != GPIO(N) |
| 37 | */ |
| 38 | #define GPIO(X) (X) /* 0 <= X <= 70 */ |
| 39 | #define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ |
| 40 | #define GPIOV33(X) ((X)+54) /* 3.3V i/o; 0 <= X <= 17 */ |
| 41 | |
| 42 | struct gpio_controller { |
| 43 | u32 dir; |
| 44 | u32 out_data; |
| 45 | u32 set_data; |
| 46 | u32 clr_data; |
| 47 | u32 in_data; |
| 48 | u32 set_rising; |
| 49 | u32 clr_rising; |
| 50 | u32 set_falling; |
| 51 | u32 clr_falling; |
| 52 | u32 intstat; |
| 53 | }; |
| 54 | |
| 55 | /* The __gpio_to_controller() and __gpio_mask() functions inline to constants |
| 56 | * with constant parameters; or in outlined code they execute at runtime. |
| 57 | * |
| 58 | * You'd access the controller directly when reading or writing more than |
| 59 | * one gpio value at a time, and to support wired logic where the value |
| 60 | * being driven by the cpu need not match the value read back. |
| 61 | * |
| 62 | * These are NOT part of the cross-platform GPIO interface |
| 63 | */ |
| 64 | static inline struct gpio_controller *__iomem |
| 65 | __gpio_to_controller(unsigned gpio) |
| 66 | { |
| 67 | void *__iomem ptr; |
| 68 | |
| 69 | if (gpio < 32) |
| 70 | ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); |
| 71 | else if (gpio < 64) |
| 72 | ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); |
| 73 | else if (gpio < DAVINCI_N_GPIO) |
| 74 | ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); |
| 75 | else |
| 76 | ptr = NULL; |
| 77 | return ptr; |
| 78 | } |
| 79 | |
| 80 | static inline u32 __gpio_mask(unsigned gpio) |
| 81 | { |
| 82 | return 1 << (gpio % 32); |
| 83 | } |
| 84 | |
| 85 | /* The get/set/clear functions will inline when called with constant |
| 86 | * parameters, for low-overhead bitbanging. Illegal constant parameters |
| 87 | * cause link-time errors. |
| 88 | * |
| 89 | * Otherwise, calls with variable parameters use outlined functions. |
| 90 | */ |
| 91 | extern int __error_inval_gpio(void); |
| 92 | |
| 93 | extern void __gpio_set(unsigned gpio, int value); |
| 94 | extern int __gpio_get(unsigned gpio); |
| 95 | |
| 96 | static inline void gpio_set_value(unsigned gpio, int value) |
| 97 | { |
| 98 | if (__builtin_constant_p(value)) { |
| 99 | struct gpio_controller *__iomem g; |
| 100 | u32 mask; |
| 101 | |
| 102 | if (gpio >= DAVINCI_N_GPIO) |
| 103 | __error_inval_gpio(); |
| 104 | |
| 105 | g = __gpio_to_controller(gpio); |
| 106 | mask = __gpio_mask(gpio); |
| 107 | if (value) |
| 108 | __raw_writel(mask, &g->set_data); |
| 109 | else |
| 110 | __raw_writel(mask, &g->clr_data); |
| 111 | return; |
| 112 | } |
| 113 | |
| 114 | __gpio_set(gpio, value); |
| 115 | } |
| 116 | |
| 117 | /* Returns zero or nonzero; works for gpios configured as inputs OR |
| 118 | * as outputs. |
| 119 | * |
| 120 | * NOTE: changes in reported values are synchronized to the GPIO clock. |
| 121 | * This is most easily seen after calling gpio_set_value() and then immediatly |
| 122 | * gpio_get_value(), where the gpio_get_value() would return the old value |
| 123 | * until the GPIO clock ticks and the new value gets latched. |
| 124 | */ |
| 125 | |
| 126 | static inline int gpio_get_value(unsigned gpio) |
| 127 | { |
| 128 | struct gpio_controller *__iomem g; |
| 129 | |
| 130 | if (!__builtin_constant_p(gpio)) |
| 131 | return __gpio_get(gpio); |
| 132 | |
| 133 | if (gpio >= DAVINCI_N_GPIO) |
| 134 | return __error_inval_gpio(); |
| 135 | |
| 136 | g = __gpio_to_controller(gpio); |
| 137 | return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); |
| 138 | } |
| 139 | |
| 140 | /* powerup default direction is IN */ |
| 141 | extern int gpio_direction_input(unsigned gpio); |
| 142 | extern int gpio_direction_output(unsigned gpio, int value); |
| 143 | |
| 144 | #include <asm-generic/gpio.h> /* cansleep wrappers */ |
| 145 | |
| 146 | extern int gpio_request(unsigned gpio, const char *tag); |
| 147 | extern void gpio_free(unsigned gpio); |
| 148 | |
| 149 | static inline int gpio_to_irq(unsigned gpio) |
| 150 | { |
| 151 | return DAVINCI_N_AINTC_IRQ + gpio; |
| 152 | } |
| 153 | |
| 154 | static inline int irq_to_gpio(unsigned irq) |
| 155 | { |
| 156 | return irq - DAVINCI_N_AINTC_IRQ; |
| 157 | } |
| 158 | |
| 159 | #endif /* __DAVINCI_GPIO_H */ |