Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-ixp2000/include/mach/uncompress.h |
| 3 | * |
| 4 | * |
| 5 | * Original Author: Naeem Afzal <naeem.m.afzal@intel.com> |
| 6 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> |
| 7 | * |
| 8 | * Copyright 2002 Intel Corp. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | * |
| 15 | */ |
| 16 | |
| 17 | #include <linux/serial_reg.h> |
| 18 | |
| 19 | #define UART_BASE 0xc0030000 |
| 20 | |
| 21 | #define PHYS(x) ((volatile unsigned long *)(UART_BASE + x)) |
| 22 | |
| 23 | #define UARTDR PHYS(0x00) /* Transmit reg dlab=0 */ |
| 24 | #define UARTDLL PHYS(0x00) /* Divisor Latch reg dlab=1*/ |
| 25 | #define UARTDLM PHYS(0x04) /* Divisor Latch reg dlab=1*/ |
| 26 | #define UARTIER PHYS(0x04) /* Interrupt enable reg */ |
| 27 | #define UARTFCR PHYS(0x08) /* FIFO control reg dlab =0*/ |
| 28 | #define UARTLCR PHYS(0x0c) /* Control reg */ |
| 29 | #define UARTSR PHYS(0x14) /* Status reg */ |
| 30 | |
| 31 | |
| 32 | static inline void putc(int c) |
| 33 | { |
| 34 | int j = 0x1000; |
| 35 | |
| 36 | while (--j && !(*UARTSR & UART_LSR_THRE)) |
| 37 | barrier(); |
| 38 | |
| 39 | *UARTDR = c; |
| 40 | } |
| 41 | |
| 42 | static inline void flush(void) |
| 43 | { |
| 44 | } |
| 45 | |
| 46 | #define arch_decomp_setup() |
| 47 | #define arch_decomp_wdog() |