| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-l7200/include/mach/gp_timers.h |
| 3 | * |
| 4 | * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) |
| 5 | * |
| 6 | * Changelog: |
| 7 | * 07-28-2000 SJH Created file |
| 8 | * 08-02-2000 SJH Used structure for registers |
| 9 | */ |
| 10 | #ifndef _ASM_ARCH_GPTIMERS_H |
| 11 | #define _ASM_ARCH_GPTIMERS_H |
| 12 | |
| 13 | #include <mach/hardware.h> |
| 14 | |
| 15 | /* |
| 16 | * Layout of L7200 general purpose timer registers |
| 17 | */ |
| 18 | struct GPT_Regs { |
| 19 | unsigned int TIMERLOAD; |
| 20 | unsigned int TIMERVALUE; |
| 21 | unsigned int TIMERCONTROL; |
| 22 | unsigned int TIMERCLEAR; |
| 23 | }; |
| 24 | |
| 25 | #define GPT_BASE (IO_BASE_2 + 0x3000) |
| 26 | #define l7200_timer1_regs ((volatile struct GPT_Regs *) (GPT_BASE)) |
| 27 | #define l7200_timer2_regs ((volatile struct GPT_Regs *) (GPT_BASE + 0x20)) |
| 28 | |
| 29 | /* |
| 30 | * General register values |
| 31 | */ |
| 32 | #define GPT_PRESCALE_1 0x00000000 |
| 33 | #define GPT_PRESCALE_16 0x00000004 |
| 34 | #define GPT_PRESCALE_256 0x00000008 |
| 35 | #define GPT_MODE_FREERUN 0x00000000 |
| 36 | #define GPT_MODE_PERIODIC 0x00000040 |
| 37 | #define GPT_ENABLE 0x00000080 |
| 38 | #define GPT_BZTOG 0x00000100 |
| 39 | #define GPT_BZMOD 0x00000200 |
| 40 | #define GPT_LOAD_MASK 0x0000ffff |
| 41 | |
| 42 | #endif |