blob: 17e5cb561cd8569a77752f0a3df7984648f056d3 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 Driver for STV0297 demodulator
3
4 Copyright (C) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
5 Copyright (C) 2003-2004 Dennis Noermann <dennis.noermann@noernet.de>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/delay.h>
Tim Schmielau4e57b682005-10-30 15:03:48 -080027#include <linux/jiffies.h>
28#include <linux/slab.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#include "dvb_frontend.h"
31#include "stv0297.h"
32
33struct stv0297_state {
34 struct i2c_adapter *i2c;
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 const struct stv0297_config *config;
36 struct dvb_frontend frontend;
37
Hartmut Birr90e3bd4b2007-02-13 18:01:56 -030038 unsigned long last_ber;
Linus Torvalds1da177e2005-04-16 15:20:36 -070039 unsigned long base_freq;
Linus Torvalds1da177e2005-04-16 15:20:36 -070040};
41
42#if 1
43#define dprintk(x...) printk(x)
44#else
45#define dprintk(x...)
46#endif
47
48#define STV0297_CLOCK_KHZ 28900
49
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
51static int stv0297_writereg(struct stv0297_state *state, u8 reg, u8 data)
52{
53 int ret;
54 u8 buf[] = { reg, data };
55 struct i2c_msg msg = {.addr = state->config->demod_address,.flags = 0,.buf = buf,.len = 2 };
56
57 ret = i2c_transfer(state->i2c, &msg, 1);
58
59 if (ret != 1)
60 dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, "
61 "ret == %i)\n", __FUNCTION__, reg, data, ret);
62
63 return (ret != 1) ? -1 : 0;
64}
65
66static int stv0297_readreg(struct stv0297_state *state, u8 reg)
67{
68 int ret;
69 u8 b0[] = { reg };
70 u8 b1[] = { 0 };
Thomas Kaiserb8d4c232006-04-27 21:45:20 -030071 struct i2c_msg msg[] = { {.addr = state->config->demod_address,.flags = 0,.buf = b0,.len = 1},
72 {.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b1,.len = 1}
73 };
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
75 // this device needs a STOP between the register and data
Thomas Kaiserb8d4c232006-04-27 21:45:20 -030076 if (state->config->stop_during_read) {
77 if ((ret = i2c_transfer(state->i2c, &msg[0], 1)) != 1) {
78 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __FUNCTION__, reg, ret);
79 return -1;
80 }
81 if ((ret = i2c_transfer(state->i2c, &msg[1], 1)) != 1) {
82 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __FUNCTION__, reg, ret);
83 return -1;
84 }
85 } else {
86 if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
87 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __FUNCTION__, reg, ret);
88 return -1;
89 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 }
91
92 return b1[0];
93}
94
95static int stv0297_writereg_mask(struct stv0297_state *state, u8 reg, u8 mask, u8 data)
96{
97 int val;
98
99 val = stv0297_readreg(state, reg);
100 val &= ~mask;
101 val |= (data & mask);
102 stv0297_writereg(state, reg, val);
103
104 return 0;
105}
106
107static int stv0297_readregs(struct stv0297_state *state, u8 reg1, u8 * b, u8 len)
108{
109 int ret;
110 struct i2c_msg msg[] = { {.addr = state->config->demod_address,.flags = 0,.buf =
111 &reg1,.len = 1},
112 {.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b,.len = len}
113 };
114
115 // this device needs a STOP between the register and data
Thomas Kaiserb8d4c232006-04-27 21:45:20 -0300116 if (state->config->stop_during_read) {
117 if ((ret = i2c_transfer(state->i2c, &msg[0], 1)) != 1) {
118 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __FUNCTION__, reg1, ret);
119 return -1;
120 }
121 if ((ret = i2c_transfer(state->i2c, &msg[1], 1)) != 1) {
122 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __FUNCTION__, reg1, ret);
123 return -1;
124 }
125 } else {
126 if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
127 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __FUNCTION__, reg1, ret);
128 return -1;
129 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 }
131
132 return 0;
133}
134
135static u32 stv0297_get_symbolrate(struct stv0297_state *state)
136{
137 u64 tmp;
138
139 tmp = stv0297_readreg(state, 0x55);
140 tmp |= stv0297_readreg(state, 0x56) << 8;
141 tmp |= stv0297_readreg(state, 0x57) << 16;
142 tmp |= stv0297_readreg(state, 0x58) << 24;
143
144 tmp *= STV0297_CLOCK_KHZ;
145 tmp >>= 32;
146
147 return (u32) tmp;
148}
149
150static void stv0297_set_symbolrate(struct stv0297_state *state, u32 srate)
151{
152 long tmp;
153
154 tmp = 131072L * srate; /* 131072 = 2^17 */
155 tmp = tmp / (STV0297_CLOCK_KHZ / 4); /* 1/4 = 2^-2 */
156 tmp = tmp * 8192L; /* 8192 = 2^13 */
157
158 stv0297_writereg(state, 0x55, (unsigned char) (tmp & 0xFF));
159 stv0297_writereg(state, 0x56, (unsigned char) (tmp >> 8));
160 stv0297_writereg(state, 0x57, (unsigned char) (tmp >> 16));
161 stv0297_writereg(state, 0x58, (unsigned char) (tmp >> 24));
162}
163
164static void stv0297_set_sweeprate(struct stv0297_state *state, short fshift, long symrate)
165{
166 long tmp;
167
168 tmp = (long) fshift *262144L; /* 262144 = 2*18 */
169 tmp /= symrate;
170 tmp *= 1024; /* 1024 = 2*10 */
171
172 // adjust
173 if (tmp >= 0) {
174 tmp += 500000;
175 } else {
176 tmp -= 500000;
177 }
178 tmp /= 1000000;
179
180 stv0297_writereg(state, 0x60, tmp & 0xFF);
181 stv0297_writereg_mask(state, 0x69, 0xF0, (tmp >> 4) & 0xf0);
182}
183
184static void stv0297_set_carrieroffset(struct stv0297_state *state, long offset)
185{
186 long tmp;
187
188 /* symrate is hardcoded to 10000 */
189 tmp = offset * 26844L; /* (2**28)/10000 */
190 if (tmp < 0)
191 tmp += 0x10000000;
192 tmp &= 0x0FFFFFFF;
193
194 stv0297_writereg(state, 0x66, (unsigned char) (tmp & 0xFF));
195 stv0297_writereg(state, 0x67, (unsigned char) (tmp >> 8));
196 stv0297_writereg(state, 0x68, (unsigned char) (tmp >> 16));
197 stv0297_writereg_mask(state, 0x69, 0x0F, (tmp >> 24) & 0x0f);
198}
199
200/*
201static long stv0297_get_carrieroffset(struct stv0297_state *state)
202{
203 s64 tmp;
204
205 stv0297_writereg(state, 0x6B, 0x00);
206
207 tmp = stv0297_readreg(state, 0x66);
208 tmp |= (stv0297_readreg(state, 0x67) << 8);
209 tmp |= (stv0297_readreg(state, 0x68) << 16);
210 tmp |= (stv0297_readreg(state, 0x69) & 0x0F) << 24;
211
212 tmp *= stv0297_get_symbolrate(state);
213 tmp >>= 28;
214
215 return (s32) tmp;
216}
217*/
218
219static void stv0297_set_initialdemodfreq(struct stv0297_state *state, long freq)
220{
221 s32 tmp;
222
223 if (freq > 10000)
224 freq -= STV0297_CLOCK_KHZ;
225
226 tmp = (STV0297_CLOCK_KHZ * 1000) / (1 << 16);
227 tmp = (freq * 1000) / tmp;
228 if (tmp > 0xffff)
229 tmp = 0xffff;
230
231 stv0297_writereg_mask(state, 0x25, 0x80, 0x80);
232 stv0297_writereg(state, 0x21, tmp >> 8);
233 stv0297_writereg(state, 0x20, tmp);
234}
235
236static int stv0297_set_qam(struct stv0297_state *state, fe_modulation_t modulation)
237{
238 int val = 0;
239
240 switch (modulation) {
241 case QAM_16:
242 val = 0;
243 break;
244
245 case QAM_32:
246 val = 1;
247 break;
248
249 case QAM_64:
250 val = 4;
251 break;
252
253 case QAM_128:
254 val = 2;
255 break;
256
257 case QAM_256:
258 val = 3;
259 break;
260
261 default:
262 return -EINVAL;
263 }
264
265 stv0297_writereg_mask(state, 0x00, 0x70, val << 4);
266
267 return 0;
268}
269
270static int stv0297_set_inversion(struct stv0297_state *state, fe_spectral_inversion_t inversion)
271{
272 int val = 0;
273
274 switch (inversion) {
275 case INVERSION_OFF:
276 val = 0;
277 break;
278
279 case INVERSION_ON:
280 val = 1;
281 break;
282
283 default:
284 return -EINVAL;
285 }
286
287 stv0297_writereg_mask(state, 0x83, 0x08, val << 3);
288
289 return 0;
290}
291
Andrew de Quincey58ac7d32006-04-18 17:47:09 -0300292static int stv0297_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700294 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295
Andrew de Quincey58ac7d32006-04-18 17:47:09 -0300296 if (enable) {
297 stv0297_writereg(state, 0x87, 0x78);
298 stv0297_writereg(state, 0x86, 0xc8);
299 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300
301 return 0;
302}
303
304static int stv0297_init(struct dvb_frontend *fe)
305{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700306 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307 int i;
308
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309 /* load init table */
Andrew de Quinceydc27a162005-09-09 13:03:07 -0700310 for (i=0; !(state->config->inittab[i] == 0xff && state->config->inittab[i+1] == 0xff); i+=2)
311 stv0297_writereg(state, state->config->inittab[i], state->config->inittab[i+1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 msleep(200);
313
Hartmut Birr90e3bd4b2007-02-13 18:01:56 -0300314 state->last_ber = 0;
315
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 return 0;
317}
318
319static int stv0297_sleep(struct dvb_frontend *fe)
320{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700321 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322
323 stv0297_writereg_mask(state, 0x80, 1, 1);
324
325 return 0;
326}
327
328static int stv0297_read_status(struct dvb_frontend *fe, fe_status_t * status)
329{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700330 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331
332 u8 sync = stv0297_readreg(state, 0xDF);
333
334 *status = 0;
335 if (sync & 0x80)
336 *status |=
337 FE_HAS_SYNC | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_LOCK;
338 return 0;
339}
340
341static int stv0297_read_ber(struct dvb_frontend *fe, u32 * ber)
342{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700343 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 u8 BER[3];
345
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346 stv0297_readregs(state, 0xA0, BER, 3);
Hartmut Birr90e3bd4b2007-02-13 18:01:56 -0300347 if (!(BER[0] & 0x80)) {
348 state->last_ber = BER[2] << 8 | BER[1];
349 stv0297_writereg_mask(state, 0xA0, 0x80, 0x80);
350 }
351
352 *ber = state->last_ber;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
354 return 0;
355}
356
357
358static int stv0297_read_signal_strength(struct dvb_frontend *fe, u16 * strength)
359{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700360 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361 u8 STRENGTH[2];
362
363 stv0297_readregs(state, 0x41, STRENGTH, 2);
364 *strength = (STRENGTH[1] & 0x03) << 8 | STRENGTH[0];
365
366 return 0;
367}
368
369static int stv0297_read_snr(struct dvb_frontend *fe, u16 * snr)
370{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700371 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372 u8 SNR[2];
373
374 stv0297_readregs(state, 0x07, SNR, 2);
375 *snr = SNR[1] << 8 | SNR[0];
376
377 return 0;
378}
379
380static int stv0297_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks)
381{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700382 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383
Hartmut Birr90e3bd4b2007-02-13 18:01:56 -0300384 stv0297_writereg_mask(state, 0xDF, 0x03, 0x03); /* freeze the counters */
385
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386 *ucblocks = (stv0297_readreg(state, 0xD5) << 8)
387 | stv0297_readreg(state, 0xD4);
388
Hartmut Birr90e3bd4b2007-02-13 18:01:56 -0300389 stv0297_writereg_mask(state, 0xDF, 0x03, 0x02); /* clear the counters */
390 stv0297_writereg_mask(state, 0xDF, 0x03, 0x01); /* re-enable the counters */
391
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392 return 0;
393}
394
395static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
396{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700397 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398 int u_threshold;
399 int initial_u;
400 int blind_u;
401 int delay;
402 int sweeprate;
403 int carrieroffset;
404 unsigned long starttime;
405 unsigned long timeout;
406 fe_spectral_inversion_t inversion;
407
408 switch (p->u.qam.modulation) {
409 case QAM_16:
410 case QAM_32:
411 case QAM_64:
412 delay = 100;
Per Dalén19b7ad32006-05-12 20:31:51 -0300413 sweeprate = 1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414 break;
415
416 case QAM_128:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417 case QAM_256:
418 delay = 200;
419 sweeprate = 500;
420 break;
421
422 default:
423 return -EINVAL;
424 }
425
426 // determine inversion dependant parameters
427 inversion = p->inversion;
428 if (state->config->invert)
429 inversion = (inversion == INVERSION_ON) ? INVERSION_OFF : INVERSION_ON;
430 carrieroffset = -330;
431 switch (inversion) {
432 case INVERSION_OFF:
433 break;
434
435 case INVERSION_ON:
436 sweeprate = -sweeprate;
437 carrieroffset = -carrieroffset;
438 break;
439
440 default:
441 return -EINVAL;
442 }
443
444 stv0297_init(fe);
Patrick Boettcherdea74862006-05-14 05:01:31 -0300445 if (fe->ops.tuner_ops.set_params) {
446 fe->ops.tuner_ops.set_params(fe, p);
447 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
Andrew de Quincey58ac7d32006-04-18 17:47:09 -0300448 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449
450 /* clear software interrupts */
451 stv0297_writereg(state, 0x82, 0x0);
452
453 /* set initial demodulation frequency */
454 stv0297_set_initialdemodfreq(state, 7250);
455
456 /* setup AGC */
457 stv0297_writereg_mask(state, 0x43, 0x10, 0x00);
458 stv0297_writereg(state, 0x41, 0x00);
459 stv0297_writereg_mask(state, 0x42, 0x03, 0x01);
460 stv0297_writereg_mask(state, 0x36, 0x60, 0x00);
461 stv0297_writereg_mask(state, 0x36, 0x18, 0x00);
462 stv0297_writereg_mask(state, 0x71, 0x80, 0x80);
463 stv0297_writereg(state, 0x72, 0x00);
464 stv0297_writereg(state, 0x73, 0x00);
465 stv0297_writereg_mask(state, 0x74, 0x0F, 0x00);
466 stv0297_writereg_mask(state, 0x43, 0x08, 0x00);
467 stv0297_writereg_mask(state, 0x71, 0x80, 0x00);
468
469 /* setup STL */
470 stv0297_writereg_mask(state, 0x5a, 0x20, 0x20);
471 stv0297_writereg_mask(state, 0x5b, 0x02, 0x02);
472 stv0297_writereg_mask(state, 0x5b, 0x02, 0x00);
473 stv0297_writereg_mask(state, 0x5b, 0x01, 0x00);
474 stv0297_writereg_mask(state, 0x5a, 0x40, 0x40);
475
476 /* disable frequency sweep */
477 stv0297_writereg_mask(state, 0x6a, 0x01, 0x00);
478
479 /* reset deinterleaver */
480 stv0297_writereg_mask(state, 0x81, 0x01, 0x01);
481 stv0297_writereg_mask(state, 0x81, 0x01, 0x00);
482
483 /* ??? */
484 stv0297_writereg_mask(state, 0x83, 0x20, 0x20);
485 stv0297_writereg_mask(state, 0x83, 0x20, 0x00);
486
487 /* reset equaliser */
488 u_threshold = stv0297_readreg(state, 0x00) & 0xf;
489 initial_u = stv0297_readreg(state, 0x01) >> 4;
490 blind_u = stv0297_readreg(state, 0x01) & 0xf;
491 stv0297_writereg_mask(state, 0x84, 0x01, 0x01);
492 stv0297_writereg_mask(state, 0x84, 0x01, 0x00);
493 stv0297_writereg_mask(state, 0x00, 0x0f, u_threshold);
494 stv0297_writereg_mask(state, 0x01, 0xf0, initial_u << 4);
495 stv0297_writereg_mask(state, 0x01, 0x0f, blind_u);
496
497 /* data comes from internal A/D */
498 stv0297_writereg_mask(state, 0x87, 0x80, 0x00);
499
500 /* clear phase registers */
501 stv0297_writereg(state, 0x63, 0x00);
502 stv0297_writereg(state, 0x64, 0x00);
503 stv0297_writereg(state, 0x65, 0x00);
504 stv0297_writereg(state, 0x66, 0x00);
505 stv0297_writereg(state, 0x67, 0x00);
506 stv0297_writereg(state, 0x68, 0x00);
507 stv0297_writereg_mask(state, 0x69, 0x0f, 0x00);
508
509 /* set parameters */
510 stv0297_set_qam(state, p->u.qam.modulation);
511 stv0297_set_symbolrate(state, p->u.qam.symbol_rate / 1000);
512 stv0297_set_sweeprate(state, sweeprate, p->u.qam.symbol_rate / 1000);
513 stv0297_set_carrieroffset(state, carrieroffset);
514 stv0297_set_inversion(state, inversion);
515
516 /* kick off lock */
Patrick Boettcher593cbf32005-09-09 13:02:38 -0700517 /* Disable corner detection for higher QAMs */
518 if (p->u.qam.modulation == QAM_128 ||
519 p->u.qam.modulation == QAM_256)
520 stv0297_writereg_mask(state, 0x88, 0x08, 0x00);
521 else
522 stv0297_writereg_mask(state, 0x88, 0x08, 0x08);
523
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524 stv0297_writereg_mask(state, 0x5a, 0x20, 0x00);
525 stv0297_writereg_mask(state, 0x6a, 0x01, 0x01);
526 stv0297_writereg_mask(state, 0x43, 0x40, 0x40);
527 stv0297_writereg_mask(state, 0x5b, 0x30, 0x00);
528 stv0297_writereg_mask(state, 0x03, 0x0c, 0x0c);
529 stv0297_writereg_mask(state, 0x03, 0x03, 0x03);
530 stv0297_writereg_mask(state, 0x43, 0x10, 0x10);
531
532 /* wait for WGAGC lock */
533 starttime = jiffies;
Johannes Stezenbach48e4cc22005-07-07 17:57:45 -0700534 timeout = jiffies + msecs_to_jiffies(2000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 while (time_before(jiffies, timeout)) {
536 msleep(10);
537 if (stv0297_readreg(state, 0x43) & 0x08)
538 break;
539 }
540 if (time_after(jiffies, timeout)) {
541 goto timeout;
542 }
543 msleep(20);
544
545 /* wait for equaliser partial convergence */
Johannes Stezenbach48e4cc22005-07-07 17:57:45 -0700546 timeout = jiffies + msecs_to_jiffies(500);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547 while (time_before(jiffies, timeout)) {
548 msleep(10);
549
550 if (stv0297_readreg(state, 0x82) & 0x04) {
551 break;
552 }
553 }
554 if (time_after(jiffies, timeout)) {
555 goto timeout;
556 }
557
558 /* wait for equaliser full convergence */
Johannes Stezenbach48e4cc22005-07-07 17:57:45 -0700559 timeout = jiffies + msecs_to_jiffies(delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560 while (time_before(jiffies, timeout)) {
561 msleep(10);
562
563 if (stv0297_readreg(state, 0x82) & 0x08) {
564 break;
565 }
566 }
567 if (time_after(jiffies, timeout)) {
568 goto timeout;
569 }
570
571 /* disable sweep */
572 stv0297_writereg_mask(state, 0x6a, 1, 0);
573 stv0297_writereg_mask(state, 0x88, 8, 0);
574
575 /* wait for main lock */
Johannes Stezenbach48e4cc22005-07-07 17:57:45 -0700576 timeout = jiffies + msecs_to_jiffies(20);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 while (time_before(jiffies, timeout)) {
578 msleep(10);
579
580 if (stv0297_readreg(state, 0xDF) & 0x80) {
581 break;
582 }
583 }
584 if (time_after(jiffies, timeout)) {
585 goto timeout;
586 }
587 msleep(100);
588
589 /* is it still locked after that delay? */
590 if (!(stv0297_readreg(state, 0xDF) & 0x80)) {
591 goto timeout;
592 }
593
594 /* success!! */
595 stv0297_writereg_mask(state, 0x5a, 0x40, 0x00);
596 state->base_freq = p->frequency;
597 return 0;
598
599timeout:
600 stv0297_writereg_mask(state, 0x6a, 0x01, 0x00);
601 return 0;
602}
603
604static int stv0297_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
605{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700606 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607 int reg_00, reg_83;
608
609 reg_00 = stv0297_readreg(state, 0x00);
610 reg_83 = stv0297_readreg(state, 0x83);
611
612 p->frequency = state->base_freq;
613 p->inversion = (reg_83 & 0x08) ? INVERSION_ON : INVERSION_OFF;
614 if (state->config->invert)
615 p->inversion = (p->inversion == INVERSION_ON) ? INVERSION_OFF : INVERSION_ON;
616 p->u.qam.symbol_rate = stv0297_get_symbolrate(state) * 1000;
617 p->u.qam.fec_inner = FEC_NONE;
618
619 switch ((reg_00 >> 4) & 0x7) {
620 case 0:
621 p->u.qam.modulation = QAM_16;
622 break;
623 case 1:
624 p->u.qam.modulation = QAM_32;
625 break;
626 case 2:
627 p->u.qam.modulation = QAM_128;
628 break;
629 case 3:
630 p->u.qam.modulation = QAM_256;
631 break;
632 case 4:
633 p->u.qam.modulation = QAM_64;
634 break;
635 }
636
637 return 0;
638}
639
640static void stv0297_release(struct dvb_frontend *fe)
641{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700642 struct stv0297_state *state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643 kfree(state);
644}
645
646static struct dvb_frontend_ops stv0297_ops;
647
648struct dvb_frontend *stv0297_attach(const struct stv0297_config *config,
Andrew de Quinceydc27a162005-09-09 13:03:07 -0700649 struct i2c_adapter *i2c)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650{
651 struct stv0297_state *state = NULL;
652
653 /* allocate memory for the internal state */
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700654 state = kmalloc(sizeof(struct stv0297_state), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655 if (state == NULL)
656 goto error;
657
658 /* setup the state */
659 state->config = config;
660 state->i2c = i2c;
Hartmut Birr90e3bd4b2007-02-13 18:01:56 -0300661 state->last_ber = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 state->base_freq = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663
664 /* check if the demod is there */
665 if ((stv0297_readreg(state, 0x80) & 0x70) != 0x20)
666 goto error;
667
668 /* create dvb_frontend */
Patrick Boettcherdea74862006-05-14 05:01:31 -0300669 memcpy(&state->frontend.ops, &stv0297_ops, sizeof(struct dvb_frontend_ops));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 state->frontend.demodulator_priv = state;
671 return &state->frontend;
672
673error:
674 kfree(state);
675 return NULL;
676}
677
678static struct dvb_frontend_ops stv0297_ops = {
679
680 .info = {
681 .name = "ST STV0297 DVB-C",
682 .type = FE_QAM,
Hartmut Birra18255b2007-08-09 00:01:51 -0300683 .frequency_min = 47000000,
684 .frequency_max = 862000000,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685 .frequency_stepsize = 62500,
686 .symbol_rate_min = 870000,
687 .symbol_rate_max = 11700000,
688 .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
689 FE_CAN_QAM_128 | FE_CAN_QAM_256 | FE_CAN_FEC_AUTO},
690
691 .release = stv0297_release,
692
693 .init = stv0297_init,
694 .sleep = stv0297_sleep,
Andrew de Quincey58ac7d32006-04-18 17:47:09 -0300695 .i2c_gate_ctrl = stv0297_i2c_gate_ctrl,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696
697 .set_frontend = stv0297_set_frontend,
698 .get_frontend = stv0297_get_frontend,
699
700 .read_status = stv0297_read_status,
701 .read_ber = stv0297_read_ber,
702 .read_signal_strength = stv0297_read_signal_strength,
703 .read_snr = stv0297_read_snr,
704 .read_ucblocks = stv0297_read_ucblocks,
705};
706
707MODULE_DESCRIPTION("ST STV0297 DVB-C Demodulator driver");
708MODULE_AUTHOR("Dennis Noermann and Andrew de Quincey");
709MODULE_LICENSE("GPL");
710
711EXPORT_SYMBOL(stv0297_attach);