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gerrit-public.fairphone.software / kernel / msm / a411aee96ea7fe6fe065df65bf29ea755bcdb554 / . / include / video / neomagic.h
blob: 1d69049bd4c196ee13ab3e7a6439d20d5cf47008 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * linux/include/video/neo_reg.h -- NeoMagic Framebuffer Driver
3 *
4 * Copyright (c) 2001 Denis Oliver Kropp <dok@convergence.de>
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file COPYING in the main directory of this
8 * archive for more details.
9 */
10
11#define NEO_BS0_BLT_BUSY 0x00000001
12#define NEO_BS0_FIFO_AVAIL 0x00000002
13#define NEO_BS0_FIFO_PEND 0x00000004
14
15#define NEO_BC0_DST_Y_DEC 0x00000001
16#define NEO_BC0_X_DEC 0x00000002
17#define NEO_BC0_SRC_TRANS 0x00000004
18#define NEO_BC0_SRC_IS_FG 0x00000008
19#define NEO_BC0_SRC_Y_DEC 0x00000010
20#define NEO_BC0_FILL_PAT 0x00000020
21#define NEO_BC0_SRC_MONO 0x00000040
22#define NEO_BC0_SYS_TO_VID 0x00000080
23
24#define NEO_BC1_DEPTH8 0x00000100
25#define NEO_BC1_DEPTH16 0x00000200
26#define NEO_BC1_X_320 0x00000400
27#define NEO_BC1_X_640 0x00000800
28#define NEO_BC1_X_800 0x00000c00
29#define NEO_BC1_X_1024 0x00001000
30#define NEO_BC1_X_1152 0x00001400
31#define NEO_BC1_X_1280 0x00001800
32#define NEO_BC1_X_1600 0x00001c00
33#define NEO_BC1_DST_TRANS 0x00002000
34#define NEO_BC1_MSTR_BLT 0x00004000
35#define NEO_BC1_FILTER_Z 0x00008000
36
37#define NEO_BC2_WR_TR_DST 0x00800000
38
39#define NEO_BC3_SRC_XY_ADDR 0x01000000
40#define NEO_BC3_DST_XY_ADDR 0x02000000
41#define NEO_BC3_CLIP_ON 0x04000000
42#define NEO_BC3_FIFO_EN 0x08000000
43#define NEO_BC3_BLT_ON_ADDR 0x10000000
44#define NEO_BC3_SKIP_MAPPING 0x80000000
45
46#define NEO_MODE1_DEPTH8 0x0100
47#define NEO_MODE1_DEPTH16 0x0200
48#define NEO_MODE1_DEPTH24 0x0300
49#define NEO_MODE1_X_320 0x0400
50#define NEO_MODE1_X_640 0x0800
51#define NEO_MODE1_X_800 0x0c00
52#define NEO_MODE1_X_1024 0x1000
53#define NEO_MODE1_X_1152 0x1400
54#define NEO_MODE1_X_1280 0x1800
55#define NEO_MODE1_X_1600 0x1c00
56#define NEO_MODE1_BLT_ON_ADDR 0x2000
57
58/* These are offseted in MMIO space by par->CursorOff */
59#define NEOREG_CURSCNTL 0x00
60#define NEOREG_CURSX 0x04
61#define NEOREG_CURSY 0x08
62#define NEOREG_CURSBGCOLOR 0x0C
63#define NEOREG_CURSFGCOLOR 0x10
64#define NEOREG_CURSMEMPOS 0x14
65
66#define NEO_CURS_DISABLE 0x00000000
67#define NEO_CURS_ENABLE 0x00000001
68#define NEO_ICON64_ENABLE 0x00000008
69#define NEO_ICON128_ENABLE 0x0000000C
70#define NEO_ICON_BLANK 0x00000010
71
72#define NEO_GR01_SUPPRESS_VSYNC 0x10
73#define NEO_GR01_SUPPRESS_HSYNC 0x20
74
75#ifdef __KERNEL__
76
77#ifdef NEOFB_DEBUG
78# define DBG(x) printk (KERN_DEBUG "neofb: %s\n", (x));
79#else
80# define DBG(x)
81#endif
82
83#define PCI_CHIP_NM2070 0x0001
84#define PCI_CHIP_NM2090 0x0002
85#define PCI_CHIP_NM2093 0x0003
86#define PCI_CHIP_NM2097 0x0083
87#define PCI_CHIP_NM2160 0x0004
88#define PCI_CHIP_NM2200 0x0005
89#define PCI_CHIP_NM2230 0x0025
90#define PCI_CHIP_NM2360 0x0006
91#define PCI_CHIP_NM2380 0x0016
92
93
94struct xtimings {
95 unsigned int pixclock;
96 unsigned int HDisplay;
97 unsigned int HSyncStart;
98 unsigned int HSyncEnd;
99 unsigned int HTotal;
100 unsigned int VDisplay;
101 unsigned int VSyncStart;
102 unsigned int VSyncEnd;
103 unsigned int VTotal;
104 unsigned int sync;
105 int dblscan;
106 int interlaced;
107};
108
109
110/* --------------------------------------------------------------------- */
111
112typedef volatile struct {
113 __u32 bltStat;
114 __u32 bltCntl;
115 __u32 xpColor;
116 __u32 fgColor;
117 __u32 bgColor;
118 __u32 pitch;
119 __u32 clipLT;
120 __u32 clipRB;
121 __u32 srcBitOffset;
122 __u32 srcStart;
123 __u32 reserved0;
124 __u32 dstStart;
125 __u32 xyExt;
126
127 __u32 reserved1[19];
128
129 __u32 pageCntl;
130 __u32 pageBase;
131 __u32 postBase;
132 __u32 postPtr;
133 __u32 dataPtr;
134} Neo2200;
135
136#define MMIO_SIZE 0x200000
137
138#define NEO_EXT_CR_MAX 0x85
139#define NEO_EXT_GR_MAX 0xC7
140
141struct neofb_par {
142 struct vgastate state;
143 atomic_t ref_count;
144
145 unsigned char MiscOutReg; /* Misc */
146 unsigned char CRTC[25]; /* Crtc Controller */
147 unsigned char Sequencer[5]; /* Video Sequencer */
148 unsigned char Graphics[9]; /* Video Graphics */
149 unsigned char Attribute[21]; /* Video Atribute */
150
151 unsigned char GeneralLockReg;
152 unsigned char ExtCRTDispAddr;
153 unsigned char ExtCRTOffset;
154 unsigned char SysIfaceCntl1;
155 unsigned char SysIfaceCntl2;
156 unsigned char ExtColorModeSelect;
157 unsigned char biosMode;
158
159 unsigned char PanelDispCntlReg1;
160 unsigned char PanelDispCntlReg2;
161 unsigned char PanelDispCntlReg3;
162 unsigned char PanelVertCenterReg1;
163 unsigned char PanelVertCenterReg2;
164 unsigned char PanelVertCenterReg3;
165 unsigned char PanelVertCenterReg4;
166 unsigned char PanelVertCenterReg5;
167 unsigned char PanelHorizCenterReg1;
168 unsigned char PanelHorizCenterReg2;
169 unsigned char PanelHorizCenterReg3;
170 unsigned char PanelHorizCenterReg4;
171 unsigned char PanelHorizCenterReg5;
172
173 int ProgramVCLK;
174 unsigned char VCLK3NumeratorLow;
175 unsigned char VCLK3NumeratorHigh;
176 unsigned char VCLK3Denominator;
177 unsigned char VerticalExt;
178
179#ifdef CONFIG_MTRR
180 int mtrr;
181#endif
182 u8 __iomem *mmio_vbase;
183 u8 cursorOff;
184 u8 *cursorPad; /* Must die !! */
185
186 Neo2200 __iomem *neo2200;
187
188 /* Panels size */
189 int NeoPanelWidth;
190 int NeoPanelHeight;
191
192 int maxClock;
193
194 int pci_burst;
195 int lcd_stretch;
196 int internal_display;
197 int external_display;
198 int libretto;
Antonino A. Daplas9f19bc52006-01-09 20:53:09 -0800[diff] [blame]199 u32 palette[16];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]200};
201
202typedef struct {
203 int x_res;
204 int y_res;
205 int mode;
206} biosMode;
207
208#endif