blob: 6b3092c75ffe25c83fa871be5d84d98db34c3bc1 [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_artop.c - ARTOP ATA controller driver
3 *
Alan Coxab771632008-10-27 15:09:10 +00004 * (C) 2006 Red Hat
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +02005 * (C) 2007 Bartlomiej Zolnierkiewicz
Jeff Garzik669a5db2006-08-29 18:12:40 -04006 *
7 * Based in part on drivers/ide/pci/aec62xx.c
8 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
9 * 865/865R fixes for Macintosh card version from a patch to the old
10 * driver by Thibaut VARENE <varenet@parisc-linux.org>
11 * When setting the PCI latency we must set 0x80 or higher for burst
12 * performance Alessandro Zummo <alessandro.zummo@towertech.it>
13 *
14 * TODO
15 * 850 serialization once the core supports it
16 * Investigate no_dsc on 850R
17 * Clock detect
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/init.h>
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/device.h>
27#include <scsi/scsi_host.h>
28#include <linux/libata.h>
29#include <linux/ata.h>
30
31#define DRV_NAME "pata_artop"
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +020032#define DRV_VERSION "0.4.4"
Jeff Garzik669a5db2006-08-29 18:12:40 -040033
34/*
35 * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
36 * get PCI bus speed functionality we leave this as 0. Its a variable
37 * for when we get the functionality and also for folks wanting to
38 * test stuff.
39 */
40
41static int clock = 0;
42
Tejun Heocc0680a2007-08-06 18:36:23 +090043static int artop6210_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040044{
Tejun Heocc0680a2007-08-06 18:36:23 +090045 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040046 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
47 const struct pci_bits artop_enable_bits[] = {
48 { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
49 { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
50 };
51
Alan Coxc9619222006-09-26 17:53:38 +010052 if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
53 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +090054
Tejun Heo9363c382008-04-07 22:47:16 +090055 return ata_sff_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -040056}
57
58/**
Jeff Garzik669a5db2006-08-29 18:12:40 -040059 * artop6260_pre_reset - check for 40/80 pin
Tejun Heocc0680a2007-08-06 18:36:23 +090060 * @link: link
Tejun Heod4b2bab2007-02-02 16:50:52 +090061 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040062 *
63 * The ARTOP hardware reports the cable detect bits in register 0x49.
64 * Nothing complicated needed here.
65 */
66
Tejun Heocc0680a2007-08-06 18:36:23 +090067static int artop6260_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040068{
69 static const struct pci_bits artop_enable_bits[] = {
70 { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
71 { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
72 };
73
Tejun Heocc0680a2007-08-06 18:36:23 +090074 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040075 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -040076
77 /* Odd numbered device ids are the units with enable bits (the -R cards) */
Alan Coxc9619222006-09-26 17:53:38 +010078 if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
79 return -ENOENT;
Jeff Garzik27c78b32007-03-09 09:41:19 -050080
Tejun Heo9363c382008-04-07 22:47:16 +090081 return ata_sff_prereset(link, deadline);
Jeff Garzika73984a2007-03-09 08:37:46 -050082}
Alan Coxc9619222006-09-26 17:53:38 +010083
Jeff Garzika73984a2007-03-09 08:37:46 -050084/**
85 * artop6260_cable_detect - identify cable type
86 * @ap: Port
87 *
Alan Coxc343a832007-05-25 20:39:30 +010088 * Identify the cable type for the ARTOP interface in question
Jeff Garzika73984a2007-03-09 08:37:46 -050089 */
Jeff Garzika617c092007-05-21 20:14:23 -040090
Jeff Garzika73984a2007-03-09 08:37:46 -050091static int artop6260_cable_detect(struct ata_port *ap)
92{
93 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
94 u8 tmp;
Jeff Garzik669a5db2006-08-29 18:12:40 -040095 pci_read_config_byte(pdev, 0x49, &tmp);
Alexey Dobriyan3f9dd272006-11-10 22:52:46 +030096 if (tmp & (1 << ap->port_no))
Jeff Garzika73984a2007-03-09 08:37:46 -050097 return ATA_CBL_PATA40;
98 return ATA_CBL_PATA80;
Jeff Garzik669a5db2006-08-29 18:12:40 -040099}
100
101/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400102 * artop6210_load_piomode - Load a set of PATA PIO timings
103 * @ap: Port whose timings we are configuring
104 * @adev: Device
105 * @pio: PIO mode
106 *
107 * Set PIO mode for device, in host controller PCI config space. This
108 * is used both to set PIO timings in PIO mode and also to set the
109 * matching PIO clocking for UDMA, as well as the MWDMA timings.
110 *
111 * LOCKING:
112 * None (inherited from caller).
113 */
114
115static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio)
116{
117 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
118 int dn = adev->devno + 2 * ap->port_no;
119 const u16 timing[2][5] = {
120 { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },
121 { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }
122
123 };
124 /* Load the PIO timing active/recovery bits */
125 pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);
126}
127
128/**
129 * artop6210_set_piomode - Initialize host controller PATA PIO timings
130 * @ap: Port whose timings we are configuring
131 * @adev: Device we are configuring
132 *
133 * Set PIO mode for device, in host controller PCI config space. For
134 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
135 * the event UDMA is used the later call to set_dmamode will set the
136 * bits as required.
137 *
138 * LOCKING:
139 * None (inherited from caller).
140 */
141
142static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev)
143{
144 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
145 int dn = adev->devno + 2 * ap->port_no;
146 u8 ultra;
147
148 artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
149
150 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
151 pci_read_config_byte(pdev, 0x54, &ultra);
152 ultra &= ~(3 << (2 * dn));
153 pci_write_config_byte(pdev, 0x54, ultra);
154}
155
156/**
157 * artop6260_load_piomode - Initialize host controller PATA PIO timings
158 * @ap: Port whose timings we are configuring
159 * @adev: Device we are configuring
160 * @pio: PIO mode
161 *
162 * Set PIO mode for device, in host controller PCI config space. The
163 * ARTOP6260 and relatives store the timing data differently.
164 *
165 * LOCKING:
166 * None (inherited from caller).
167 */
168
169static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio)
170{
171 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
172 int dn = adev->devno + 2 * ap->port_no;
173 const u8 timing[2][5] = {
174 { 0x00, 0x0A, 0x08, 0x33, 0x31 },
175 { 0x70, 0x7A, 0x78, 0x43, 0x41 }
176
177 };
178 /* Load the PIO timing active/recovery bits */
179 pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);
180}
181
182/**
183 * artop6260_set_piomode - Initialize host controller PATA PIO timings
184 * @ap: Port whose timings we are configuring
185 * @adev: Device we are configuring
186 *
187 * Set PIO mode for device, in host controller PCI config space. For
188 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
189 * the event UDMA is used the later call to set_dmamode will set the
190 * bits as required.
191 *
192 * LOCKING:
193 * None (inherited from caller).
194 */
195
196static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev)
197{
198 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
199 u8 ultra;
200
201 artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
202
203 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
204 pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
205 ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
206 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
207}
208
209/**
210 * artop6210_set_dmamode - Initialize host controller PATA PIO timings
211 * @ap: Port whose timings we are configuring
Jeff Garzika73984a2007-03-09 08:37:46 -0500212 * @adev: Device whose timings we are configuring
Jeff Garzik669a5db2006-08-29 18:12:40 -0400213 *
214 * Set DMA mode for device, in host controller PCI config space.
215 *
216 * LOCKING:
217 * None (inherited from caller).
218 */
219
220static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev)
221{
222 unsigned int pio;
223 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
224 int dn = adev->devno + 2 * ap->port_no;
225 u8 ultra;
226
227 if (adev->dma_mode == XFER_MW_DMA_0)
228 pio = 1;
229 else
230 pio = 4;
231
232 /* Load the PIO timing active/recovery bits */
233 artop6210_load_piomode(ap, adev, pio);
234
235 pci_read_config_byte(pdev, 0x54, &ultra);
236 ultra &= ~(3 << (2 * dn));
237
238 /* Add ultra DMA bits if in UDMA mode */
239 if (adev->dma_mode >= XFER_UDMA_0) {
240 u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
241 if (mode == 0)
242 mode = 1;
243 ultra |= (mode << (2 * dn));
244 }
245 pci_write_config_byte(pdev, 0x54, ultra);
246}
247
248/**
249 * artop6260_set_dmamode - Initialize host controller PATA PIO timings
250 * @ap: Port whose timings we are configuring
251 * @adev: Device we are configuring
252 *
253 * Set DMA mode for device, in host controller PCI config space. The
254 * ARTOP6260 and relatives store the timing data differently.
255 *
256 * LOCKING:
257 * None (inherited from caller).
258 */
259
260static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
261{
262 unsigned int pio = adev->pio_mode - XFER_PIO_0;
263 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
264 u8 ultra;
265
266 if (adev->dma_mode == XFER_MW_DMA_0)
267 pio = 1;
268 else
269 pio = 4;
270
271 /* Load the PIO timing active/recovery bits */
272 artop6260_load_piomode(ap, adev, pio);
273
274 /* Add ultra DMA bits if in UDMA mode */
275 pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
276 ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
277 if (adev->dma_mode >= XFER_UDMA_0) {
278 u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
279 if (mode == 0)
280 mode = 1;
281 ultra |= (mode << (4 * adev->devno));
282 }
283 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
284}
285
286static struct scsi_host_template artop_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900287 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400288};
289
Tejun Heo029cfd62008-03-25 12:22:49 +0900290static struct ata_port_operations artop6210_ops = {
291 .inherits = &ata_bmdma_port_ops,
292 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400293 .set_piomode = artop6210_set_piomode,
294 .set_dmamode = artop6210_set_dmamode,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900295 .prereset = artop6210_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400296};
297
Tejun Heo029cfd62008-03-25 12:22:49 +0900298static struct ata_port_operations artop6260_ops = {
299 .inherits = &ata_bmdma_port_ops,
300 .cable_detect = artop6260_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400301 .set_piomode = artop6260_set_piomode,
302 .set_dmamode = artop6260_set_dmamode,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900303 .prereset = artop6260_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400304};
305
306
307/**
308 * artop_init_one - Register ARTOP ATA PCI device with kernel services
309 * @pdev: PCI device to register
310 * @ent: Entry in artop_pci_tbl matching with @pdev
311 *
312 * Called from kernel PCI layer.
313 *
314 * LOCKING:
315 * Inherited from PCI layer (may sleep).
316 *
317 * RETURNS:
318 * Zero on success, or -ERRNO value.
319 */
320
321static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
322{
323 static int printed_version;
Tejun Heo1626aeb2007-05-04 12:43:58 +0200324 static const struct ata_port_info info_6210 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400325 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400326 .pio_mask = 0x1f, /* pio0-4 */
327 .mwdma_mask = 0x07, /* mwdma0-2 */
328 .udma_mask = ATA_UDMA2,
329 .port_ops = &artop6210_ops,
330 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200331 static const struct ata_port_info info_626x = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400332 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400333 .pio_mask = 0x1f, /* pio0-4 */
334 .mwdma_mask = 0x07, /* mwdma0-2 */
335 .udma_mask = ATA_UDMA4,
336 .port_ops = &artop6260_ops,
337 };
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200338 static const struct ata_port_info info_628x = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400339 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400340 .pio_mask = 0x1f, /* pio0-4 */
341 .mwdma_mask = 0x07, /* mwdma0-2 */
342 .udma_mask = ATA_UDMA5,
343 .port_ops = &artop6260_ops,
344 };
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200345 static const struct ata_port_info info_628x_fast = {
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200346 .flags = ATA_FLAG_SLAVE_POSS,
347 .pio_mask = 0x1f, /* pio0-4 */
348 .mwdma_mask = 0x07, /* mwdma0-2 */
349 .udma_mask = ATA_UDMA6,
350 .port_ops = &artop6260_ops,
351 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200352 const struct ata_port_info *ppi[] = { NULL, NULL };
Tejun Heof08048e2008-03-25 12:22:47 +0900353 int rc;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400354
355 if (!printed_version++)
356 dev_printk(KERN_DEBUG, &pdev->dev,
357 "version " DRV_VERSION "\n");
358
Tejun Heof08048e2008-03-25 12:22:47 +0900359 rc = pcim_enable_device(pdev);
360 if (rc)
361 return rc;
362
Jeff Garzik669a5db2006-08-29 18:12:40 -0400363 if (id->driver_data == 0) { /* 6210 variant */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200364 ppi[0] = &info_6210;
365 ppi[1] = &ata_dummy_port_info;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400366 /* BIOS may have left us in UDMA, clear it before libata probe */
367 pci_write_config_byte(pdev, 0x54, 0);
368 /* For the moment (also lacks dsc) */
369 printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n");
370 printk(KERN_WARNING "Secondary ATA ports will not be activated.\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400371 }
372 else if (id->driver_data == 1) /* 6260 */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200373 ppi[0] = &info_626x;
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200374 else if (id->driver_data == 2) { /* 6280 or 6280 + fast */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400375 unsigned long io = pci_resource_start(pdev, 4);
376 u8 reg;
377
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200378 ppi[0] = &info_628x;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400379 if (inb(io) & 0x10)
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200380 ppi[0] = &info_628x_fast;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400381 /* Mac systems come up with some registers not set as we
382 will need them */
383
384 /* Clear reset & test bits */
385 pci_read_config_byte(pdev, 0x49, &reg);
386 pci_write_config_byte(pdev, 0x49, reg & ~ 0x30);
387
388 /* PCI latency must be > 0x80 for burst mode, tweak it
389 * if required.
390 */
391 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &reg);
392 if (reg <= 0x80)
393 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
394
395 /* Enable IRQ output and burst mode */
396 pci_read_config_byte(pdev, 0x4a, &reg);
397 pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
398
399 }
Jeff Garzik15a7c3b2006-10-01 10:38:22 -0400400
Tejun Heo1626aeb2007-05-04 12:43:58 +0200401 BUG_ON(ppi[0] == NULL);
Jeff Garzik15a7c3b2006-10-01 10:38:22 -0400402
Tejun Heo9363c382008-04-07 22:47:16 +0900403 return ata_pci_sff_init_one(pdev, ppi, &artop_sht, NULL);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400404}
405
406static const struct pci_device_id artop_pci_tbl[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400407 { PCI_VDEVICE(ARTOP, 0x0005), 0 },
408 { PCI_VDEVICE(ARTOP, 0x0006), 1 },
409 { PCI_VDEVICE(ARTOP, 0x0007), 1 },
410 { PCI_VDEVICE(ARTOP, 0x0008), 2 },
411 { PCI_VDEVICE(ARTOP, 0x0009), 2 },
412
Jeff Garzik669a5db2006-08-29 18:12:40 -0400413 { } /* terminate list */
414};
415
416static struct pci_driver artop_pci_driver = {
417 .name = DRV_NAME,
418 .id_table = artop_pci_tbl,
419 .probe = artop_init_one,
420 .remove = ata_pci_remove_one,
421};
422
423static int __init artop_init(void)
424{
425 return pci_register_driver(&artop_pci_driver);
426}
427
428static void __exit artop_exit(void)
429{
430 pci_unregister_driver(&artop_pci_driver);
431}
432
Jeff Garzik669a5db2006-08-29 18:12:40 -0400433module_init(artop_init);
434module_exit(artop_exit);
435
436MODULE_AUTHOR("Alan Cox");
437MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");
438MODULE_LICENSE("GPL");
439MODULE_DEVICE_TABLE(pci, artop_pci_tbl);
440MODULE_VERSION(DRV_VERSION);
441