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Russell King5e742ad2005-08-18 10:08:15 +01001/*
2 * linux/drivers/mfd/mcp-sa11x0.c
3 *
4 * Copyright (C) 2001-2005 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
9 *
10 * SA11x0 MCP (Multimedia Communications Port) driver.
11 *
12 * MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
13 */
14#include <linux/module.h>
15#include <linux/init.h>
Russell King45c7f752012-01-20 23:09:42 +000016#include <linux/io.h>
Russell King5e742ad2005-08-18 10:08:15 +010017#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/delay.h>
20#include <linux/spinlock.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010021#include <linux/platform_device.h>
Russell King2796e392012-01-21 09:34:30 +000022#include <linux/pm.h>
Thomas Kunzec8602ed2009-02-10 14:54:57 +010023#include <linux/mfd/mcp.h>
Russell King5e742ad2005-08-18 10:08:15 +010024
Russell Kinga09e64f2008-08-05 16:14:15 +010025#include <mach/hardware.h>
Russell King5e742ad2005-08-18 10:08:15 +010026#include <asm/mach-types.h>
27#include <asm/system.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010028#include <mach/mcp.h>
Russell King5e742ad2005-08-18 10:08:15 +010029
Russell King216f63c2012-01-20 17:37:21 +000030#include <mach/assabet.h>
31
Russell Kingc4592ce2012-01-20 22:30:15 +000032#define DRIVER_NAME "sa11x0-mcp"
Russell King5e742ad2005-08-18 10:08:15 +010033
34struct mcp_sa11x0 {
Russell King45c7f752012-01-20 23:09:42 +000035 void __iomem *base0;
36 void __iomem *base1;
37 u32 mccr0;
38 u32 mccr1;
Russell King5e742ad2005-08-18 10:08:15 +010039};
40
Russell King45c7f752012-01-20 23:09:42 +000041/* Register offsets */
42#define MCCR0(m) ((m)->base0 + 0x00)
43#define MCDR0(m) ((m)->base0 + 0x08)
44#define MCDR1(m) ((m)->base0 + 0x0c)
45#define MCDR2(m) ((m)->base0 + 0x10)
46#define MCSR(m) ((m)->base0 + 0x18)
47#define MCCR1(m) ((m)->base1 + 0x00)
48
Russell King5e742ad2005-08-18 10:08:15 +010049#define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
50
51static void
52mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
53{
Russell King45c7f752012-01-20 23:09:42 +000054 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +010055
56 divisor /= 32;
57
Russell King45c7f752012-01-20 23:09:42 +000058 m->mccr0 &= ~0x00007f00;
59 m->mccr0 |= divisor << 8;
60 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +010061}
62
63static void
64mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
65{
Russell King45c7f752012-01-20 23:09:42 +000066 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +010067
68 divisor /= 32;
69
Russell King45c7f752012-01-20 23:09:42 +000070 m->mccr0 &= ~0x0000007f;
71 m->mccr0 |= divisor;
72 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +010073}
74
75/*
76 * Write data to the device. The bit should be set after 3 subframe
77 * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
78 * We really should try doing something more productive while we
79 * wait.
80 */
81static void
82mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
83{
Russell King45c7f752012-01-20 23:09:42 +000084 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +010085 int ret = -ETIME;
86 int i;
87
Russell King45c7f752012-01-20 23:09:42 +000088 writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m));
Russell King5e742ad2005-08-18 10:08:15 +010089
90 for (i = 0; i < 2; i++) {
91 udelay(mcp->rw_timeout);
Russell King45c7f752012-01-20 23:09:42 +000092 if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
Russell King5e742ad2005-08-18 10:08:15 +010093 ret = 0;
94 break;
95 }
96 }
97
98 if (ret < 0)
99 printk(KERN_WARNING "mcp: write timed out\n");
100}
101
102/*
103 * Read data from the device. The bit should be set after 3 subframe
104 * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
105 * We really should try doing something more productive while we
106 * wait.
107 */
108static unsigned int
109mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
110{
Russell King45c7f752012-01-20 23:09:42 +0000111 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +0100112 int ret = -ETIME;
113 int i;
114
Russell King45c7f752012-01-20 23:09:42 +0000115 writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m));
Russell King5e742ad2005-08-18 10:08:15 +0100116
117 for (i = 0; i < 2; i++) {
118 udelay(mcp->rw_timeout);
Russell King45c7f752012-01-20 23:09:42 +0000119 if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
120 ret = readl_relaxed(MCDR2(m)) & 0xffff;
Russell King5e742ad2005-08-18 10:08:15 +0100121 break;
122 }
123 }
124
125 if (ret < 0)
126 printk(KERN_WARNING "mcp: read timed out\n");
127
128 return ret;
129}
130
131static void mcp_sa11x0_enable(struct mcp *mcp)
132{
Russell King45c7f752012-01-20 23:09:42 +0000133 struct mcp_sa11x0 *m = priv(mcp);
134
135 writel(-1, MCSR(m));
136 m->mccr0 |= MCCR0_MCE;
137 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +0100138}
139
140static void mcp_sa11x0_disable(struct mcp *mcp)
141{
Russell King45c7f752012-01-20 23:09:42 +0000142 struct mcp_sa11x0 *m = priv(mcp);
143
144 m->mccr0 &= ~MCCR0_MCE;
145 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +0100146}
147
148/*
149 * Our methods.
150 */
151static struct mcp_ops mcp_sa11x0 = {
152 .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor,
153 .set_audio_divisor = mcp_sa11x0_set_audio_divisor,
154 .reg_write = mcp_sa11x0_write,
155 .reg_read = mcp_sa11x0_read,
156 .enable = mcp_sa11x0_enable,
157 .disable = mcp_sa11x0_disable,
158};
159
Russell King45c7f752012-01-20 23:09:42 +0000160static int mcp_sa11x0_probe(struct platform_device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100161{
Russell King45c7f752012-01-20 23:09:42 +0000162 struct mcp_plat_data *data = dev->dev.platform_data;
163 struct resource *mem0, *mem1;
164 struct mcp_sa11x0 *m;
Russell King5e742ad2005-08-18 10:08:15 +0100165 struct mcp *mcp;
166 int ret;
167
Russell King323cdfc2005-08-18 10:10:46 +0100168 if (!data)
Russell King5e742ad2005-08-18 10:08:15 +0100169 return -ENODEV;
170
Russell King45c7f752012-01-20 23:09:42 +0000171 mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
172 mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
173 if (!mem0 || !mem1)
174 return -ENXIO;
Russell King5e742ad2005-08-18 10:08:15 +0100175
Russell King45c7f752012-01-20 23:09:42 +0000176 if (!request_mem_region(mem0->start, resource_size(mem0),
177 DRIVER_NAME)) {
178 ret = -EBUSY;
179 goto err_mem0;
180 }
181
182 if (!request_mem_region(mem1->start, resource_size(mem1),
183 DRIVER_NAME)) {
184 ret = -EBUSY;
185 goto err_mem1;
186 }
187
188 mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
Russell King5e742ad2005-08-18 10:08:15 +0100189 if (!mcp) {
190 ret = -ENOMEM;
Russell King45c7f752012-01-20 23:09:42 +0000191 goto err_alloc;
Russell King5e742ad2005-08-18 10:08:15 +0100192 }
193
194 mcp->owner = THIS_MODULE;
195 mcp->ops = &mcp_sa11x0;
Russell King323cdfc2005-08-18 10:10:46 +0100196 mcp->sclk_rate = data->sclk_rate;
Russell King5e742ad2005-08-18 10:08:15 +0100197
Russell King45c7f752012-01-20 23:09:42 +0000198 m = priv(mcp);
199 m->mccr0 = data->mccr0 | 0x7f7f;
200 m->mccr1 = data->mccr1;
201
202 m->base0 = ioremap(mem0->start, resource_size(mem0));
203 m->base1 = ioremap(mem1->start, resource_size(mem1));
204 if (!m->base0 || !m->base1) {
205 ret = -ENOMEM;
206 goto err_ioremap;
207 }
208
209 platform_set_drvdata(dev, mcp);
Russell King5e742ad2005-08-18 10:08:15 +0100210
Russell King216f63c2012-01-20 17:37:21 +0000211 if (machine_is_assabet()) {
212 ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
213 }
214
215 /*
Russell King323cdfc2005-08-18 10:10:46 +0100216 * Initialise device. Note that we initially
217 * set the sampling rate to minimum.
218 */
Russell King45c7f752012-01-20 23:09:42 +0000219 writel_relaxed(-1, MCSR(m));
220 writel_relaxed(m->mccr1, MCCR1(m));
221 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +0100222
223 /*
224 * Calculate the read/write timeout (us) from the bit clock
225 * rate. This is the period for 3 64-bit frames. Always
226 * round this time up.
227 */
228 mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
229 mcp->sclk_rate;
230
Russell Kingabe06082012-01-20 22:13:52 +0000231 ret = mcp_host_add(mcp, data->codec_pdata);
Russell King5e742ad2005-08-18 10:08:15 +0100232 if (ret == 0)
Russell King45c7f752012-01-20 23:09:42 +0000233 return 0;
Russell King5e742ad2005-08-18 10:08:15 +0100234
Russell King45c7f752012-01-20 23:09:42 +0000235 platform_set_drvdata(dev, NULL);
236
237 err_ioremap:
238 iounmap(m->base1);
239 iounmap(m->base0);
Russell King30816ac2012-01-20 22:51:07 +0000240 mcp_host_free(mcp);
Russell King45c7f752012-01-20 23:09:42 +0000241 err_alloc:
242 release_mem_region(mem1->start, resource_size(mem1));
243 err_mem1:
244 release_mem_region(mem0->start, resource_size(mem0));
245 err_mem0:
Russell King5e742ad2005-08-18 10:08:15 +0100246 return ret;
247}
248
Russell King216f63c2012-01-20 17:37:21 +0000249static int mcp_sa11x0_remove(struct platform_device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100250{
Russell King216f63c2012-01-20 17:37:21 +0000251 struct mcp *mcp = platform_get_drvdata(dev);
Russell King45c7f752012-01-20 23:09:42 +0000252 struct mcp_sa11x0 *m = priv(mcp);
253 struct resource *mem0, *mem1;
254
255 mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
256 mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
Russell King5e742ad2005-08-18 10:08:15 +0100257
Russell King216f63c2012-01-20 17:37:21 +0000258 platform_set_drvdata(dev, NULL);
Russell King30816ac2012-01-20 22:51:07 +0000259 mcp_host_del(mcp);
Russell King45c7f752012-01-20 23:09:42 +0000260 iounmap(m->base1);
261 iounmap(m->base0);
Russell King30816ac2012-01-20 22:51:07 +0000262 mcp_host_free(mcp);
Russell King45c7f752012-01-20 23:09:42 +0000263 release_mem_region(mem1->start, resource_size(mem1));
264 release_mem_region(mem0->start, resource_size(mem0));
Russell King5e742ad2005-08-18 10:08:15 +0100265
266 return 0;
267}
268
Russell King2796e392012-01-21 09:34:30 +0000269#ifdef CONFIG_PM_SLEEP
270static int mcp_sa11x0_suspend(struct device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100271{
Russell King2796e392012-01-21 09:34:30 +0000272 struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
Russell King5e742ad2005-08-18 10:08:15 +0100273
Russell King45c7f752012-01-20 23:09:42 +0000274 writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
Russell King9480e302005-10-28 09:52:56 -0700275
Russell King5e742ad2005-08-18 10:08:15 +0100276 return 0;
277}
278
Russell King2796e392012-01-21 09:34:30 +0000279static int mcp_sa11x0_resume(struct device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100280{
Russell King2796e392012-01-21 09:34:30 +0000281 struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
Russell King5e742ad2005-08-18 10:08:15 +0100282
Russell King45c7f752012-01-20 23:09:42 +0000283 writel_relaxed(m->mccr1, MCCR1(m));
284 writel_relaxed(m->mccr0, MCCR0(m));
Russell King9480e302005-10-28 09:52:56 -0700285
Russell King5e742ad2005-08-18 10:08:15 +0100286 return 0;
287}
Russell King2796e392012-01-21 09:34:30 +0000288#endif
289
290static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
Russell Kinga6aecae2012-01-21 18:03:00 +0000291#ifdef CONFIG_PM_SLEEP
292 .suspend = mcp_sa11x0_suspend,
293 .freeze = mcp_sa11x0_suspend,
294 .poweroff = mcp_sa11x0_suspend,
295 .resume_noirq = mcp_sa11x0_resume,
296 .thaw_noirq = mcp_sa11x0_resume,
297 .restore_noirq = mcp_sa11x0_resume,
298#endif
Russell King2796e392012-01-21 09:34:30 +0000299};
Russell King5e742ad2005-08-18 10:08:15 +0100300
Russell King3ae5eae2005-11-09 22:32:44 +0000301static struct platform_driver mcp_sa11x0_driver = {
Russell King5e742ad2005-08-18 10:08:15 +0100302 .probe = mcp_sa11x0_probe,
303 .remove = mcp_sa11x0_remove,
Russell King3ae5eae2005-11-09 22:32:44 +0000304 .driver = {
Russell Kingc4592ce2012-01-20 22:30:15 +0000305 .name = DRIVER_NAME,
306 .owner = THIS_MODULE,
Russell King2796e392012-01-21 09:34:30 +0000307 .pm = &mcp_sa11x0_pm_ops,
Russell King3ae5eae2005-11-09 22:32:44 +0000308 },
Russell King5e742ad2005-08-18 10:08:15 +0100309};
310
311/*
312 * This needs re-working
313 */
Mark Brown65349d62011-11-23 22:58:34 +0000314module_platform_driver(mcp_sa11x0_driver);
Russell King5e742ad2005-08-18 10:08:15 +0100315
Russell Kingc4592ce2012-01-20 22:30:15 +0000316MODULE_ALIAS("platform:" DRIVER_NAME);
Russell King5e742ad2005-08-18 10:08:15 +0100317MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
318MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
319MODULE_LICENSE("GPL");