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Rabin Vincent62579262010-05-19 11:39:02 +02001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 */
7#ifndef MFD_AB8500_H
8#define MFD_AB8500_H
9
10#include <linux/device.h>
11
12/*
Mattias Wallin47c16972010-09-10 17:47:56 +020013 * AB8500 bank addresses
14 */
15#define AB8500_SYS_CTRL1_BLOCK 0x1
16#define AB8500_SYS_CTRL2_BLOCK 0x2
17#define AB8500_REGU_CTRL1 0x3
18#define AB8500_REGU_CTRL2 0x4
19#define AB8500_USB 0x5
20#define AB8500_TVOUT 0x6
21#define AB8500_DBI 0x7
22#define AB8500_ECI_AV_ACC 0x8
23#define AB8500_RESERVED 0x9
24#define AB8500_GPADC 0xA
25#define AB8500_CHARGER 0xB
26#define AB8500_GAS_GAUGE 0xC
27#define AB8500_AUDIO 0xD
28#define AB8500_INTERRUPT 0xE
29#define AB8500_RTC 0xF
30#define AB8500_MISC 0x10
31#define AB8500_DEBUG 0x12
32#define AB8500_PROD_TEST 0x13
33#define AB8500_OTP_EMUL 0x15
34
35/*
Rabin Vincent62579262010-05-19 11:39:02 +020036 * Interrupts
37 */
38
39#define AB8500_INT_MAIN_EXT_CH_NOT_OK 0
40#define AB8500_INT_UN_PLUG_TV_DET 1
41#define AB8500_INT_PLUG_TV_DET 2
42#define AB8500_INT_TEMP_WARM 3
43#define AB8500_INT_PON_KEY2DB_F 4
44#define AB8500_INT_PON_KEY2DB_R 5
45#define AB8500_INT_PON_KEY1DB_F 6
46#define AB8500_INT_PON_KEY1DB_R 7
47#define AB8500_INT_BATT_OVV 8
48#define AB8500_INT_MAIN_CH_UNPLUG_DET 10
49#define AB8500_INT_MAIN_CH_PLUG_DET 11
50#define AB8500_INT_USB_ID_DET_F 12
51#define AB8500_INT_USB_ID_DET_R 13
52#define AB8500_INT_VBUS_DET_F 14
53#define AB8500_INT_VBUS_DET_R 15
54#define AB8500_INT_VBUS_CH_DROP_END 16
55#define AB8500_INT_RTC_60S 17
56#define AB8500_INT_RTC_ALARM 18
57#define AB8500_INT_BAT_CTRL_INDB 20
58#define AB8500_INT_CH_WD_EXP 21
59#define AB8500_INT_VBUS_OVV 22
60#define AB8500_INT_MAIN_CH_DROP_END 23
61#define AB8500_INT_CCN_CONV_ACC 24
62#define AB8500_INT_INT_AUD 25
63#define AB8500_INT_CCEOC 26
64#define AB8500_INT_CC_INT_CALIB 27
65#define AB8500_INT_LOW_BAT_F 28
66#define AB8500_INT_LOW_BAT_R 29
67#define AB8500_INT_BUP_CHG_NOT_OK 30
68#define AB8500_INT_BUP_CHG_OK 31
69#define AB8500_INT_GP_HW_ADC_CONV_END 32
70#define AB8500_INT_ACC_DETECT_1DB_F 33
71#define AB8500_INT_ACC_DETECT_1DB_R 34
72#define AB8500_INT_ACC_DETECT_22DB_F 35
73#define AB8500_INT_ACC_DETECT_22DB_R 36
74#define AB8500_INT_ACC_DETECT_21DB_F 37
75#define AB8500_INT_ACC_DETECT_21DB_R 38
76#define AB8500_INT_GP_SW_ADC_CONV_END 39
Mattias Wallin92d50a42010-12-07 11:20:47 +010077#define AB8500_INT_ADP_SOURCE_ERROR 72
78#define AB8500_INT_ADP_SINK_ERROR 73
79#define AB8500_INT_ADP_PROBE_PLUG 74
80#define AB8500_INT_ADP_PROBE_UNPLUG 75
81#define AB8500_INT_ADP_SENSE_OFF 76
82#define AB8500_INT_USB_PHY_POWER_ERR 78
83#define AB8500_INT_USB_LINK_STATUS 79
84#define AB8500_INT_BTEMP_LOW 80
85#define AB8500_INT_BTEMP_LOW_MEDIUM 81
86#define AB8500_INT_BTEMP_MEDIUM_HIGH 82
87#define AB8500_INT_BTEMP_HIGH 83
88#define AB8500_INT_USB_CHARGER_NOT_OK 89
89#define AB8500_INT_ID_WAKEUP_R 90
90#define AB8500_INT_ID_DET_R1R 92
91#define AB8500_INT_ID_DET_R2R 93
92#define AB8500_INT_ID_DET_R3R 94
93#define AB8500_INT_ID_DET_R4R 95
94#define AB8500_INT_ID_WAKEUP_F 96
95#define AB8500_INT_ID_DET_R1F 98
96#define AB8500_INT_ID_DET_R2F 99
97#define AB8500_INT_ID_DET_R3F 100
98#define AB8500_INT_ID_DET_R4F 101
99#define AB8500_INT_USB_CHG_DET_DONE 102
100#define AB8500_INT_USB_CH_TH_PROT_F 104
101#define AB8500_INT_USB_CH_TH_PROT_R 105
102#define AB8500_INT_MAIN_CH_TH_PROT_F 106
103#define AB8500_INT_MAIN_CH_TH_PROT_R 107
104#define AB8500_INT_USB_CHARGER_NOT_OKF 111
Rabin Vincent62579262010-05-19 11:39:02 +0200105
Mattias Wallin92d50a42010-12-07 11:20:47 +0100106#define AB8500_NR_IRQS 112
107#define AB8500_NUM_IRQ_REGS 14
Rabin Vincent62579262010-05-19 11:39:02 +0200108
109/**
110 * struct ab8500 - ab8500 internal structure
111 * @dev: parent device
112 * @lock: read/write operations lock
113 * @irq_lock: genirq bus lock
Rabin Vincent62579262010-05-19 11:39:02 +0200114 * @irq: irq line
Mattias Wallinadceed62011-03-02 11:51:11 +0100115 * @chip_id: chip revision id
Rabin Vincent62579262010-05-19 11:39:02 +0200116 * @write: register write
117 * @read: register read
118 * @rx_buf: rx buf for SPI
119 * @tx_buf: tx buf for SPI
120 * @mask: cache of IRQ regs for bus lock
121 * @oldmask: cache of previous IRQ regs for bus lock
122 */
123struct ab8500 {
124 struct device *dev;
125 struct mutex lock;
126 struct mutex irq_lock;
Mattias Wallinadceed62011-03-02 11:51:11 +0100127
Rabin Vincent62579262010-05-19 11:39:02 +0200128 int irq_base;
129 int irq;
Mattias Wallin47c16972010-09-10 17:47:56 +0200130 u8 chip_id;
Rabin Vincent62579262010-05-19 11:39:02 +0200131
132 int (*write) (struct ab8500 *a8500, u16 addr, u8 data);
133 int (*read) (struct ab8500 *a8500, u16 addr);
134
135 unsigned long tx_buf[4];
136 unsigned long rx_buf[4];
137
138 u8 mask[AB8500_NUM_IRQ_REGS];
139 u8 oldmask[AB8500_NUM_IRQ_REGS];
140};
141
Sundar R Iyer549931f2010-07-13 11:51:28 +0530142struct regulator_init_data;
143
Rabin Vincent62579262010-05-19 11:39:02 +0200144/**
145 * struct ab8500_platform_data - AB8500 platform data
146 * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used
147 * @init: board-specific initialization after detection of ab8500
Sundar R Iyer549931f2010-07-13 11:51:28 +0530148 * @regulator: machine-specific constraints for regulators
Rabin Vincent62579262010-05-19 11:39:02 +0200149 */
150struct ab8500_platform_data {
151 int irq_base;
152 void (*init) (struct ab8500 *);
Bengt Jonssoncb189b02010-12-10 11:08:40 +0100153 int num_regulator;
154 struct regulator_init_data *regulator;
Rabin Vincent62579262010-05-19 11:39:02 +0200155};
156
Rabin Vincent62579262010-05-19 11:39:02 +0200157extern int __devinit ab8500_init(struct ab8500 *ab8500);
158extern int __devexit ab8500_exit(struct ab8500 *ab8500);
159
160#endif /* MFD_AB8500_H */