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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * sata_promise.c - Promise SATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
Mikael Pettersson5595ddf2007-10-30 14:21:55 +01005 * Mikael Pettersson <mikpe@it.uu.se>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * Please ALWAYS copy linux-ide@vger.kernel.org
7 * on emails.
8 *
9 * Copyright 2003-2004 Red Hat, Inc.
10 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware information only available under NDA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070031 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <linux/pci.h>
38#include <linux/init.h>
39#include <linux/blkdev.h>
40#include <linux/delay.h>
41#include <linux/interrupt.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050042#include <linux/device.h>
Mikael Pettersson95006182007-01-09 10:51:46 +010043#include <scsi/scsi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070044#include <scsi/scsi_host.h>
Jeff Garzik193515d2005-11-07 00:59:37 -050045#include <scsi/scsi_cmnd.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include <linux/libata.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include "sata_promise.h"
48
49#define DRV_NAME "sata_promise"
Mikael Petterssonc07a9c42008-03-23 18:41:01 +010050#define DRV_VERSION "2.12"
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
52enum {
Tejun Heoeca25dc2007-04-17 23:44:07 +090053 PDC_MAX_PORTS = 4,
Tejun Heo0d5ff562007-02-01 15:06:36 +090054 PDC_MMIO_BAR = 3,
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +010055 PDC_MAX_PRD = LIBATA_MAX_PRD - 1, /* -1 for ASIC PRD bug workaround */
Tejun Heo0d5ff562007-02-01 15:06:36 +090056
Mikael Pettersson821d22c2008-05-17 18:48:15 +020057 /* host register offsets (from host->iomap[PDC_MMIO_BAR]) */
58 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
59 PDC_FLASH_CTL = 0x44, /* Flash control register */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020060 PDC_PCI_CTL = 0x48, /* PCI control/status reg */
Mikael Pettersson821d22c2008-05-17 18:48:15 +020061 PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */
62 PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */
63 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */
64 PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */
65
66 /* per-port ATA register offsets (from ap->ioaddr.cmd_addr) */
Mikael Pettersson95006182007-01-09 10:51:46 +010067 PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */
68 PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */
69 PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */
70 PDC_CYLINDER_LOW = 0x10, /* Cylinder low reg (per port) */
71 PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */
72 PDC_DEVICE = 0x18, /* Device/Head reg (per port) */
73 PDC_COMMAND = 0x1C, /* Command/status reg (per port) */
Mikael Pettersson73fd4562007-01-10 09:32:34 +010074 PDC_ALTSTATUS = 0x38, /* Alternate-status/device-control reg (per port) */
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
Linus Torvalds1da177e2005-04-16 15:20:36 -070076 PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */
77 PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */
Mikael Pettersson821d22c2008-05-17 18:48:15 +020078
79 /* per-port SATA register offsets (from ap->ioaddr.scr_addr) */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020080 PDC_SATA_ERROR = 0x04,
Mikael Pettersson821d22c2008-05-17 18:48:15 +020081 PDC_PHYMODE4 = 0x14,
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020082 PDC_LINK_LAYER_ERRORS = 0x6C,
83 PDC_FPDMA_CTLSTAT = 0xD8,
84 PDC_INTERNAL_DEBUG_1 = 0xF8, /* also used for PATA */
85 PDC_INTERNAL_DEBUG_2 = 0xFC, /* also used for PATA */
86
87 /* PDC_FPDMA_CTLSTAT bit definitions */
88 PDC_FPDMA_CTLSTAT_RESET = 1 << 3,
89 PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG = 1 << 10,
90 PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG = 1 << 11,
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
Mikael Pettersson176efb02007-03-14 09:51:35 +010092 /* PDC_GLOBAL_CTL bit definitions */
93 PDC_PH_ERR = (1 << 8), /* PCI error while loading packet */
94 PDC_SH_ERR = (1 << 9), /* PCI error while loading S/G table */
95 PDC_DH_ERR = (1 << 10), /* PCI error while loading data */
96 PDC2_HTO_ERR = (1 << 12), /* host bus timeout */
97 PDC2_ATA_HBA_ERR = (1 << 13), /* error during SATA DATA FIS transmission */
98 PDC2_ATA_DMA_CNT_ERR = (1 << 14), /* DMA DATA FIS size differs from S/G count */
99 PDC_OVERRUN_ERR = (1 << 19), /* S/G byte count larger than HD requires */
100 PDC_UNDERRUN_ERR = (1 << 20), /* S/G byte count less than HD requires */
101 PDC_DRIVE_ERR = (1 << 21), /* drive error */
102 PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */
103 PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */
104 PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR,
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400105 PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR |
106 PDC2_ATA_DMA_CNT_ERR,
107 PDC_ERR_MASK = PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR |
108 PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR |
109 PDC_DRIVE_ERR | PDC_PCI_SYS_ERR |
110 PDC1_ERR_MASK | PDC2_ERR_MASK,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
112 board_2037x = 0, /* FastTrak S150 TX2plus */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900113 board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */
114 board_20319 = 2, /* FastTrak S150 TX4 */
115 board_20619 = 3, /* FastTrak TX4000 */
116 board_2057x = 4, /* SATAII150 Tx2plus */
Mikael Petterssond0e58032007-06-19 21:53:30 +0200117 board_2057x_pata = 5, /* SATAII150 Tx2plus PATA port */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900118 board_40518 = 6, /* SATAII150 Tx4 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
Luke Kosewski6340f012006-01-28 12:39:29 -0500120 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
Mikael Pettersson95006182007-01-09 10:51:46 +0100122 /* Sequence counter control registers bit definitions */
123 PDC_SEQCNTRL_INT_MASK = (1 << 5), /* Sequence Interrupt Mask */
124
125 /* Feature register values */
126 PDC_FEATURE_ATAPI_PIO = 0x00, /* ATAPI data xfer by PIO */
127 PDC_FEATURE_ATAPI_DMA = 0x01, /* ATAPI data xfer by DMA */
128
129 /* Device/Head register values */
130 PDC_DEVICE_SATA = 0xE0, /* Device/Head value for SATA devices */
131
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100132 /* PDC_CTLSTAT bit definitions */
133 PDC_DMA_ENABLE = (1 << 7),
134 PDC_IRQ_DISABLE = (1 << 10),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 PDC_RESET = (1 << 11), /* HDMA reset */
Jeff Garzik50630192005-12-13 02:29:45 -0500136
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100137 PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY |
Mikael Pettersson95006182007-01-09 10:51:46 +0100138 ATA_FLAG_MMIO |
Jeff Garzik3d0a59c2005-12-13 22:28:19 -0500139 ATA_FLAG_PIO_POLLING,
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100140
Tejun Heoeca25dc2007-04-17 23:44:07 +0900141 /* ap->flags bits */
142 PDC_FLAG_GEN_II = (1 << 24),
143 PDC_FLAG_SATA_PATA = (1 << 25), /* supports SATA + PATA */
144 PDC_FLAG_4_PORTS = (1 << 26), /* 4 ports */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145};
146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147struct pdc_port_priv {
148 u8 *pkt;
149 dma_addr_t pkt_dma;
150};
151
Tejun Heo82ef04f2008-07-31 17:02:40 +0900152static int pdc_sata_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
153static int pdc_sata_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200154static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
Tejun Heoeca25dc2007-04-17 23:44:07 +0900155static int pdc_common_port_start(struct ata_port *ap);
156static int pdc_sata_port_start(struct ata_port *ap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157static void pdc_qc_prep(struct ata_queued_cmd *qc);
Jeff Garzik057ace52005-10-22 14:27:05 -0400158static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
159static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
Mikael Pettersson95006182007-01-09 10:51:46 +0100160static int pdc_check_atapi_dma(struct ata_queued_cmd *qc);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100161static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162static void pdc_irq_clear(struct ata_port *ap);
Tejun Heo9363c382008-04-07 22:47:16 +0900163static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100164static void pdc_freeze(struct ata_port *ap);
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100165static void pdc_sata_freeze(struct ata_port *ap);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100166static void pdc_thaw(struct ata_port *ap);
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100167static void pdc_sata_thaw(struct ata_port *ap);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100168static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
169 unsigned long deadline);
170static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
171 unsigned long deadline);
Tejun Heoa1efdab2008-03-25 12:22:50 +0900172static void pdc_error_handler(struct ata_port *ap);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100173static void pdc_post_internal_cmd(struct ata_queued_cmd *qc);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100174static int pdc_pata_cable_detect(struct ata_port *ap);
175static int pdc_sata_cable_detect(struct ata_port *ap);
Jeff Garzik374b1872005-08-30 05:42:52 -0400176
Jeff Garzik193515d2005-11-07 00:59:37 -0500177static struct scsi_host_template pdc_ata_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900178 ATA_BASE_SHT(DRV_NAME),
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100179 .sg_tablesize = PDC_MAX_PRD,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 .dma_boundary = ATA_DMA_BOUNDARY,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181};
182
Tejun Heo029cfd62008-03-25 12:22:49 +0900183static const struct ata_port_operations pdc_common_ops = {
184 .inherits = &ata_sff_port_ops,
Mikael Pettersson95006182007-01-09 10:51:46 +0100185
Tejun Heo5682ed32008-04-07 22:47:16 +0900186 .sff_tf_load = pdc_tf_load_mmio,
187 .sff_exec_command = pdc_exec_command_mmio,
Tejun Heo029cfd62008-03-25 12:22:49 +0900188 .check_atapi_dma = pdc_check_atapi_dma,
Mikael Pettersson95006182007-01-09 10:51:46 +0100189 .qc_prep = pdc_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +0900190 .qc_issue = pdc_qc_issue,
Alan Coxc96f1732009-03-24 10:23:46 +0000191
Tejun Heo5682ed32008-04-07 22:47:16 +0900192 .sff_irq_clear = pdc_irq_clear,
Alan Coxc96f1732009-03-24 10:23:46 +0000193 .lost_interrupt = ATA_OP_NULL,
Tejun Heo029cfd62008-03-25 12:22:49 +0900194
195 .post_internal_cmd = pdc_post_internal_cmd,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900196 .error_handler = pdc_error_handler,
Tejun Heo029cfd62008-03-25 12:22:49 +0900197};
198
199static struct ata_port_operations pdc_sata_ops = {
200 .inherits = &pdc_common_ops,
201 .cable_detect = pdc_sata_cable_detect,
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100202 .freeze = pdc_sata_freeze,
203 .thaw = pdc_sata_thaw,
Mikael Pettersson95006182007-01-09 10:51:46 +0100204 .scr_read = pdc_sata_scr_read,
205 .scr_write = pdc_sata_scr_write,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900206 .port_start = pdc_sata_port_start,
Mikael Petterssoncadef672008-10-31 08:03:55 +0100207 .hardreset = pdc_sata_hardreset,
Mikael Pettersson95006182007-01-09 10:51:46 +0100208};
209
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200210/* First-generation chips need a more restrictive ->check_atapi_dma op,
211 and ->freeze/thaw that ignore the hotplug controls. */
Tejun Heo029cfd62008-03-25 12:22:49 +0900212static struct ata_port_operations pdc_old_sata_ops = {
213 .inherits = &pdc_sata_ops,
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200214 .freeze = pdc_freeze,
215 .thaw = pdc_thaw,
Mikael Pettersson724114a2007-03-11 21:20:43 +0100216 .check_atapi_dma = pdc_old_sata_check_atapi_dma,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217};
218
Tejun Heo029cfd62008-03-25 12:22:49 +0900219static struct ata_port_operations pdc_pata_ops = {
220 .inherits = &pdc_common_ops,
221 .cable_detect = pdc_pata_cable_detect,
Mikael Pettersson53873732007-02-11 23:19:53 +0100222 .freeze = pdc_freeze,
223 .thaw = pdc_thaw,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900224 .port_start = pdc_common_port_start,
Mikael Petterssoncadef672008-10-31 08:03:55 +0100225 .softreset = pdc_pata_softreset,
Jeff Garzik2cba5822005-08-29 05:12:30 -0400226};
227
Arjan van de Ven98ac62d2005-11-28 10:06:23 +0100228static const struct ata_port_info pdc_port_info[] = {
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100229 [board_2037x] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900231 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
232 PDC_FLAG_SATA_PATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100233 .pio_mask = ATA_PIO4,
234 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400235 .udma_mask = ATA_UDMA6,
Mikael Pettersson95006182007-01-09 10:51:46 +0100236 .port_ops = &pdc_old_sata_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237 },
238
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100239 [board_2037x_pata] =
Tejun Heoeca25dc2007-04-17 23:44:07 +0900240 {
241 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100242 .pio_mask = ATA_PIO4,
243 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400244 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900245 .port_ops = &pdc_pata_ops,
246 },
247
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100248 [board_20319] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900250 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
251 PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100252 .pio_mask = ATA_PIO4,
253 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400254 .udma_mask = ATA_UDMA6,
Mikael Pettersson95006182007-01-09 10:51:46 +0100255 .port_ops = &pdc_old_sata_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 },
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400257
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100258 [board_20619] =
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400259 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900260 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
261 PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100262 .pio_mask = ATA_PIO4,
263 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400264 .udma_mask = ATA_UDMA6,
Jeff Garzik2cba5822005-08-29 05:12:30 -0400265 .port_ops = &pdc_pata_ops,
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400266 },
Yusuf Iskenderoglu5a46fe82006-01-17 08:06:21 -0500267
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100268 [board_2057x] =
Luke Kosewski6340f012006-01-28 12:39:29 -0500269 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900270 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
271 PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100272 .pio_mask = ATA_PIO4,
273 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400274 .udma_mask = ATA_UDMA6,
Luke Kosewski6340f012006-01-28 12:39:29 -0500275 .port_ops = &pdc_sata_ops,
276 },
277
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100278 [board_2057x_pata] =
Tejun Heoeca25dc2007-04-17 23:44:07 +0900279 {
Jeff Garzikbb312232007-05-24 23:35:59 -0400280 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
Tejun Heoeca25dc2007-04-17 23:44:07 +0900281 PDC_FLAG_GEN_II,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100282 .pio_mask = ATA_PIO4,
283 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400284 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900285 .port_ops = &pdc_pata_ops,
286 },
287
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100288 [board_40518] =
Luke Kosewski6340f012006-01-28 12:39:29 -0500289 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900290 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
291 PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100292 .pio_mask = ATA_PIO4,
293 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400294 .udma_mask = ATA_UDMA6,
Luke Kosewski6340f012006-01-28 12:39:29 -0500295 .port_ops = &pdc_sata_ops,
296 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297};
298
Jeff Garzik3b7d6972005-11-10 11:04:11 -0500299static const struct pci_device_id pdc_ata_pci_tbl[] = {
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400300 { PCI_VDEVICE(PROMISE, 0x3371), board_2037x },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400301 { PCI_VDEVICE(PROMISE, 0x3373), board_2037x },
302 { PCI_VDEVICE(PROMISE, 0x3375), board_2037x },
303 { PCI_VDEVICE(PROMISE, 0x3376), board_2037x },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100304 { PCI_VDEVICE(PROMISE, 0x3570), board_2057x },
305 { PCI_VDEVICE(PROMISE, 0x3571), board_2057x },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400306 { PCI_VDEVICE(PROMISE, 0x3574), board_2057x },
Mikael Petterssond324d4622006-12-06 09:55:43 +0100307 { PCI_VDEVICE(PROMISE, 0x3577), board_2057x },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100308 { PCI_VDEVICE(PROMISE, 0x3d73), board_2057x },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400309 { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400311 { PCI_VDEVICE(PROMISE, 0x3318), board_20319 },
312 { PCI_VDEVICE(PROMISE, 0x3319), board_20319 },
Mikael Pettersson7f9992a2007-08-29 10:25:37 +0200313 { PCI_VDEVICE(PROMISE, 0x3515), board_40518 },
314 { PCI_VDEVICE(PROMISE, 0x3519), board_40518 },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100315 { PCI_VDEVICE(PROMISE, 0x3d17), board_40518 },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400316 { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400318 { PCI_VDEVICE(PROMISE, 0x6629), board_20619 },
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400319
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 { } /* terminate list */
321};
322
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323static struct pci_driver pdc_ata_pci_driver = {
324 .name = DRV_NAME,
325 .id_table = pdc_ata_pci_tbl,
326 .probe = pdc_ata_init_one,
327 .remove = ata_pci_remove_one,
328};
329
Mikael Pettersson724114a2007-03-11 21:20:43 +0100330static int pdc_common_port_start(struct ata_port *ap)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331{
Jeff Garzikcca39742006-08-24 03:19:22 -0400332 struct device *dev = ap->host->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 struct pdc_port_priv *pp;
334 int rc;
335
Tejun Heoc7087652010-05-10 21:41:34 +0200336 /* we use the same prd table as bmdma, allocate it */
337 rc = ata_bmdma_port_start(ap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 if (rc)
339 return rc;
340
Tejun Heo24dc5f32007-01-20 16:00:28 +0900341 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
342 if (!pp)
343 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344
Tejun Heo24dc5f32007-01-20 16:00:28 +0900345 pp->pkt = dmam_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
346 if (!pp->pkt)
347 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
349 ap->private_data = pp;
350
Mikael Pettersson724114a2007-03-11 21:20:43 +0100351 return 0;
352}
353
354static int pdc_sata_port_start(struct ata_port *ap)
355{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100356 int rc;
357
358 rc = pdc_common_port_start(ap);
359 if (rc)
360 return rc;
361
Mikael Pettersson599b7202006-12-01 10:55:58 +0100362 /* fix up PHYMODE4 align timing */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900363 if (ap->flags & PDC_FLAG_GEN_II) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200364 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
Mikael Pettersson599b7202006-12-01 10:55:58 +0100365 unsigned int tmp;
366
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200367 tmp = readl(sata_mmio + PDC_PHYMODE4);
Mikael Pettersson599b7202006-12-01 10:55:58 +0100368 tmp = (tmp & ~3) | 1; /* set bits 1:0 = 0:1 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200369 writel(tmp, sata_mmio + PDC_PHYMODE4);
Mikael Pettersson599b7202006-12-01 10:55:58 +0100370 }
371
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373}
374
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200375static void pdc_fpdma_clear_interrupt_flag(struct ata_port *ap)
376{
377 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
378 u32 tmp;
379
380 tmp = readl(sata_mmio + PDC_FPDMA_CTLSTAT);
381 tmp |= PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG;
382 tmp |= PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG;
383
384 /* It's not allowed to write to the entire FPDMA_CTLSTAT register
385 when NCQ is running. So do a byte-sized write to bits 10 and 11. */
386 writeb(tmp >> 8, sata_mmio + PDC_FPDMA_CTLSTAT + 1);
387 readb(sata_mmio + PDC_FPDMA_CTLSTAT + 1); /* flush */
388}
389
390static void pdc_fpdma_reset(struct ata_port *ap)
391{
392 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
393 u8 tmp;
394
395 tmp = (u8)readl(sata_mmio + PDC_FPDMA_CTLSTAT);
396 tmp &= 0x7F;
397 tmp |= PDC_FPDMA_CTLSTAT_RESET;
398 writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);
399 readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
400 udelay(100);
401 tmp &= ~PDC_FPDMA_CTLSTAT_RESET;
402 writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);
403 readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
404
405 pdc_fpdma_clear_interrupt_flag(ap);
406}
407
408static void pdc_not_at_command_packet_phase(struct ata_port *ap)
409{
410 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
411 unsigned int i;
412 u32 tmp;
413
414 /* check not at ASIC packet command phase */
415 for (i = 0; i < 100; ++i) {
416 writel(0, sata_mmio + PDC_INTERNAL_DEBUG_1);
417 tmp = readl(sata_mmio + PDC_INTERNAL_DEBUG_2);
418 if ((tmp & 0xF) != 1)
419 break;
420 udelay(100);
421 }
422}
423
424static void pdc_clear_internal_debug_record_error_register(struct ata_port *ap)
425{
426 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
427
428 writel(0xffffffff, sata_mmio + PDC_SATA_ERROR);
429 writel(0xffff0000, sata_mmio + PDC_LINK_LAYER_ERRORS);
430}
431
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432static void pdc_reset_port(struct ata_port *ap)
433{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200434 void __iomem *ata_ctlstat_mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 unsigned int i;
436 u32 tmp;
437
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200438 if (ap->flags & PDC_FLAG_GEN_II)
439 pdc_not_at_command_packet_phase(ap);
440
441 tmp = readl(ata_ctlstat_mmio);
442 tmp |= PDC_RESET;
443 writel(tmp, ata_ctlstat_mmio);
444
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 for (i = 11; i > 0; i--) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200446 tmp = readl(ata_ctlstat_mmio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 if (tmp & PDC_RESET)
448 break;
449
450 udelay(100);
451
452 tmp |= PDC_RESET;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200453 writel(tmp, ata_ctlstat_mmio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454 }
455
456 tmp &= ~PDC_RESET;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200457 writel(tmp, ata_ctlstat_mmio);
458 readl(ata_ctlstat_mmio); /* flush */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200459
460 if (sata_scr_valid(&ap->link) && (ap->flags & PDC_FLAG_GEN_II)) {
461 pdc_fpdma_reset(ap);
462 pdc_clear_internal_debug_record_error_register(ap);
463 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464}
465
Mikael Pettersson724114a2007-03-11 21:20:43 +0100466static int pdc_pata_cable_detect(struct ata_port *ap)
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400467{
468 u8 tmp;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200469 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400470
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200471 tmp = readb(ata_mmio + PDC_CTLSTAT + 3);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100472 if (tmp & 0x01)
473 return ATA_CBL_PATA40;
474 return ATA_CBL_PATA80;
475}
476
477static int pdc_sata_cable_detect(struct ata_port *ap)
478{
Alan Coxe2a97522007-03-08 23:06:47 +0000479 return ATA_CBL_SATA;
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400480}
481
Tejun Heo82ef04f2008-07-31 17:02:40 +0900482static int pdc_sata_scr_read(struct ata_link *link,
483 unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100485 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900486 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900487 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900488 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489}
490
Tejun Heo82ef04f2008-07-31 17:02:40 +0900491static int pdc_sata_scr_write(struct ata_link *link,
492 unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100494 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900495 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900496 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900497 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498}
499
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100500static void pdc_atapi_pkt(struct ata_queued_cmd *qc)
Mikael Pettersson95006182007-01-09 10:51:46 +0100501{
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100502 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +0200503 dma_addr_t sg_table = ap->bmdma_prd_dma;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100504 unsigned int cdb_len = qc->dev->cdb_len;
505 u8 *cdb = qc->cdb;
506 struct pdc_port_priv *pp = ap->private_data;
507 u8 *buf = pp->pkt;
Al Viro826cd152008-03-25 05:18:11 +0000508 __le32 *buf32 = (__le32 *) buf;
Tejun Heo46a67142007-12-04 13:33:30 +0900509 unsigned int dev_sel, feature;
Mikael Pettersson95006182007-01-09 10:51:46 +0100510
511 /* set control bits (byte 0), zero delay seq id (byte 3),
512 * and seq id (byte 2)
513 */
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100514 switch (qc->tf.protocol) {
Tejun Heo0dc36882007-12-18 16:34:43 -0500515 case ATAPI_PROT_DMA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100516 if (!(qc->tf.flags & ATA_TFLAG_WRITE))
517 buf32[0] = cpu_to_le32(PDC_PKT_READ);
518 else
519 buf32[0] = 0;
520 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500521 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100522 buf32[0] = cpu_to_le32(PDC_PKT_NODATA);
523 break;
524 default:
525 BUG();
526 break;
527 }
Mikael Pettersson95006182007-01-09 10:51:46 +0100528 buf32[1] = cpu_to_le32(sg_table); /* S/G table addr */
529 buf32[2] = 0; /* no next-packet */
530
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100531 /* select drive */
Tejun Heo46a67142007-12-04 13:33:30 +0900532 if (sata_scr_valid(&ap->link))
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100533 dev_sel = PDC_DEVICE_SATA;
Tejun Heo46a67142007-12-04 13:33:30 +0900534 else
535 dev_sel = qc->tf.device;
536
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100537 buf[12] = (1 << 5) | ATA_REG_DEVICE;
538 buf[13] = dev_sel;
539 buf[14] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_CLEAR_BSY;
540 buf[15] = dev_sel; /* once more, waiting for BSY to clear */
541
542 buf[16] = (1 << 5) | ATA_REG_NSECT;
Tejun Heo46a67142007-12-04 13:33:30 +0900543 buf[17] = qc->tf.nsect;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100544 buf[18] = (1 << 5) | ATA_REG_LBAL;
Tejun Heo46a67142007-12-04 13:33:30 +0900545 buf[19] = qc->tf.lbal;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100546
547 /* set feature and byte counter registers */
Tejun Heo0dc36882007-12-18 16:34:43 -0500548 if (qc->tf.protocol != ATAPI_PROT_DMA)
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100549 feature = PDC_FEATURE_ATAPI_PIO;
Tejun Heo46a67142007-12-04 13:33:30 +0900550 else
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100551 feature = PDC_FEATURE_ATAPI_DMA;
Tejun Heo46a67142007-12-04 13:33:30 +0900552
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100553 buf[20] = (1 << 5) | ATA_REG_FEATURE;
554 buf[21] = feature;
555 buf[22] = (1 << 5) | ATA_REG_BYTEL;
Tejun Heo46a67142007-12-04 13:33:30 +0900556 buf[23] = qc->tf.lbam;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100557 buf[24] = (1 << 5) | ATA_REG_BYTEH;
Tejun Heo46a67142007-12-04 13:33:30 +0900558 buf[25] = qc->tf.lbah;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100559
560 /* send ATAPI packet command 0xA0 */
561 buf[26] = (1 << 5) | ATA_REG_CMD;
Tejun Heo46a67142007-12-04 13:33:30 +0900562 buf[27] = qc->tf.command;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100563
564 /* select drive and check DRQ */
565 buf[28] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_WAIT_DRDY;
566 buf[29] = dev_sel;
567
Mikael Pettersson95006182007-01-09 10:51:46 +0100568 /* we can represent cdb lengths 2/4/6/8/10/12/14/16 */
569 BUG_ON(cdb_len & ~0x1E);
570
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100571 /* append the CDB as the final part */
572 buf[30] = (((cdb_len >> 1) & 7) << 5) | ATA_REG_DATA | PDC_LAST_REG;
573 memcpy(buf+31, cdb, cdb_len);
Mikael Pettersson95006182007-01-09 10:51:46 +0100574}
575
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100576/**
577 * pdc_fill_sg - Fill PCI IDE PRD table
578 * @qc: Metadata associated with taskfile to be transferred
579 *
580 * Fill PCI IDE PRD (scatter-gather) table with segments
581 * associated with the current disk command.
582 * Make sure hardware does not choke on it.
583 *
584 * LOCKING:
585 * spin_lock_irqsave(host lock)
586 *
587 */
588static void pdc_fill_sg(struct ata_queued_cmd *qc)
589{
590 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +0200591 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100592 struct scatterlist *sg;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100593 const u32 SG_COUNT_ASIC_BUG = 41*4;
Tejun Heoff2aeb12007-12-05 16:43:11 +0900594 unsigned int si, idx;
595 u32 len;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100596
597 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
598 return;
599
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100600 idx = 0;
Tejun Heoff2aeb12007-12-05 16:43:11 +0900601 for_each_sg(qc->sg, sg, qc->n_elem, si) {
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100602 u32 addr, offset;
Harvey Harrison6903c0f2008-02-13 21:14:08 -0800603 u32 sg_len;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100604
605 /* determine if physical DMA addr spans 64K boundary.
606 * Note h/w doesn't support 64-bit, so we unconditionally
607 * truncate dma_addr_t to u32.
608 */
609 addr = (u32) sg_dma_address(sg);
610 sg_len = sg_dma_len(sg);
611
612 while (sg_len) {
613 offset = addr & 0xffff;
614 len = sg_len;
615 if ((offset + sg_len) > 0x10000)
616 len = 0x10000 - offset;
617
Tejun Heof60d7012010-05-10 21:41:41 +0200618 prd[idx].addr = cpu_to_le32(addr);
619 prd[idx].flags_len = cpu_to_le32(len & 0xffff);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100620 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
621
622 idx++;
623 sg_len -= len;
624 addr += len;
625 }
626 }
627
Tejun Heof60d7012010-05-10 21:41:41 +0200628 len = le32_to_cpu(prd[idx - 1].flags_len);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100629
Tejun Heoff2aeb12007-12-05 16:43:11 +0900630 if (len > SG_COUNT_ASIC_BUG) {
631 u32 addr;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100632
Tejun Heoff2aeb12007-12-05 16:43:11 +0900633 VPRINTK("Splitting last PRD.\n");
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100634
Tejun Heof60d7012010-05-10 21:41:41 +0200635 addr = le32_to_cpu(prd[idx - 1].addr);
636 prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG);
Tejun Heoff2aeb12007-12-05 16:43:11 +0900637 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx - 1, addr, SG_COUNT_ASIC_BUG);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100638
Tejun Heoff2aeb12007-12-05 16:43:11 +0900639 addr = addr + len - SG_COUNT_ASIC_BUG;
640 len = SG_COUNT_ASIC_BUG;
Tejun Heof60d7012010-05-10 21:41:41 +0200641 prd[idx].addr = cpu_to_le32(addr);
642 prd[idx].flags_len = cpu_to_le32(len);
Tejun Heoff2aeb12007-12-05 16:43:11 +0900643 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100644
Tejun Heoff2aeb12007-12-05 16:43:11 +0900645 idx++;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100646 }
Tejun Heoff2aeb12007-12-05 16:43:11 +0900647
Tejun Heof60d7012010-05-10 21:41:41 +0200648 prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100649}
650
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651static void pdc_qc_prep(struct ata_queued_cmd *qc)
652{
653 struct pdc_port_priv *pp = qc->ap->private_data;
654 unsigned int i;
655
656 VPRINTK("ENTER\n");
657
658 switch (qc->tf.protocol) {
659 case ATA_PROT_DMA:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100660 pdc_fill_sg(qc);
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200661 /*FALLTHROUGH*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 case ATA_PROT_NODATA:
Tejun Heof60d7012010-05-10 21:41:41 +0200663 i = pdc_pkt_header(&qc->tf, qc->ap->bmdma_prd_dma,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 qc->dev->devno, pp->pkt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665 if (qc->tf.flags & ATA_TFLAG_LBA48)
666 i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
667 else
668 i = pdc_prep_lba28(&qc->tf, pp->pkt, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700669 pdc_pkt_footer(&qc->tf, pp->pkt, i);
670 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500671 case ATAPI_PROT_PIO:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100672 pdc_fill_sg(qc);
Mikael Pettersson95006182007-01-09 10:51:46 +0100673 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500674 case ATAPI_PROT_DMA:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100675 pdc_fill_sg(qc);
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100676 /*FALLTHROUGH*/
Tejun Heo0dc36882007-12-18 16:34:43 -0500677 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100678 pdc_atapi_pkt(qc);
Mikael Pettersson95006182007-01-09 10:51:46 +0100679 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680 default:
681 break;
682 }
683}
684
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100685static int pdc_is_sataii_tx4(unsigned long flags)
686{
687 const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS;
688 return (flags & mask) == mask;
689}
690
691static unsigned int pdc_port_no_to_ata_no(unsigned int port_no,
692 int is_sataii_tx4)
693{
694 static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2};
695 return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no;
696}
697
698static unsigned int pdc_sata_nr_ports(const struct ata_port *ap)
699{
700 return (ap->flags & PDC_FLAG_4_PORTS) ? 4 : 2;
701}
702
703static unsigned int pdc_sata_ata_port_to_ata_no(const struct ata_port *ap)
704{
705 const struct ata_host *host = ap->host;
706 unsigned int nr_ports = pdc_sata_nr_ports(ap);
707 unsigned int i;
708
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200709 for (i = 0; i < nr_ports && host->ports[i] != ap; ++i)
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100710 ;
711 BUG_ON(i >= nr_ports);
712 return pdc_port_no_to_ata_no(i, pdc_is_sataii_tx4(ap->flags));
713}
714
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100715static void pdc_freeze(struct ata_port *ap)
716{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200717 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100718 u32 tmp;
719
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200720 tmp = readl(ata_mmio + PDC_CTLSTAT);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100721 tmp |= PDC_IRQ_DISABLE;
722 tmp &= ~PDC_DMA_ENABLE;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200723 writel(tmp, ata_mmio + PDC_CTLSTAT);
724 readl(ata_mmio + PDC_CTLSTAT); /* flush */
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100725}
726
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100727static void pdc_sata_freeze(struct ata_port *ap)
728{
729 struct ata_host *host = ap->host;
730 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200731 unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100732 unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap);
733 u32 hotplug_status;
734
735 /* Disable hotplug events on this port.
736 *
737 * Locking:
738 * 1) hotplug register accesses must be serialised via host->lock
739 * 2) ap->lock == &ap->host->lock
740 * 3) ->freeze() and ->thaw() are called with ap->lock held
741 */
742 hotplug_status = readl(host_mmio + hotplug_offset);
743 hotplug_status |= 0x11 << (ata_no + 16);
744 writel(hotplug_status, host_mmio + hotplug_offset);
745 readl(host_mmio + hotplug_offset); /* flush */
746
747 pdc_freeze(ap);
748}
749
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100750static void pdc_thaw(struct ata_port *ap)
751{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200752 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100753 u32 tmp;
754
755 /* clear IRQ */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200756 readl(ata_mmio + PDC_COMMAND);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100757
758 /* turn IRQ back on */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200759 tmp = readl(ata_mmio + PDC_CTLSTAT);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100760 tmp &= ~PDC_IRQ_DISABLE;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200761 writel(tmp, ata_mmio + PDC_CTLSTAT);
762 readl(ata_mmio + PDC_CTLSTAT); /* flush */
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100763}
764
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100765static void pdc_sata_thaw(struct ata_port *ap)
766{
767 struct ata_host *host = ap->host;
768 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200769 unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100770 unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap);
771 u32 hotplug_status;
772
773 pdc_thaw(ap);
774
775 /* Enable hotplug events on this port.
776 * Locking: see pdc_sata_freeze().
777 */
778 hotplug_status = readl(host_mmio + hotplug_offset);
779 hotplug_status |= 0x11 << ata_no;
780 hotplug_status &= ~(0x11 << (ata_no + 16));
781 writel(hotplug_status, host_mmio + hotplug_offset);
782 readl(host_mmio + hotplug_offset); /* flush */
783}
784
Mikael Petterssoncadef672008-10-31 08:03:55 +0100785static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
786 unsigned long deadline)
787{
788 pdc_reset_port(link->ap);
789 return ata_sff_softreset(link, class, deadline);
790}
791
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200792static unsigned int pdc_ata_port_to_ata_no(const struct ata_port *ap)
793{
794 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
795 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
796
797 /* ata_mmio == host_mmio + 0x200 + ata_no * 0x80 */
798 return (ata_mmio - host_mmio - 0x200) / 0x80;
799}
800
801static void pdc_hard_reset_port(struct ata_port *ap)
802{
803 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
804 void __iomem *pcictl_b1_mmio = host_mmio + PDC_PCI_CTL + 1;
805 unsigned int ata_no = pdc_ata_port_to_ata_no(ap);
806 u8 tmp;
807
808 spin_lock(&ap->host->lock);
809
810 tmp = readb(pcictl_b1_mmio);
811 tmp &= ~(0x10 << ata_no);
812 writeb(tmp, pcictl_b1_mmio);
813 readb(pcictl_b1_mmio); /* flush */
814 udelay(100);
815 tmp |= (0x10 << ata_no);
816 writeb(tmp, pcictl_b1_mmio);
817 readb(pcictl_b1_mmio); /* flush */
818
819 spin_unlock(&ap->host->lock);
820}
821
Mikael Petterssoncadef672008-10-31 08:03:55 +0100822static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
823 unsigned long deadline)
824{
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200825 if (link->ap->flags & PDC_FLAG_GEN_II)
826 pdc_not_at_command_packet_phase(link->ap);
827 /* hotplug IRQs should have been masked by pdc_sata_freeze() */
828 pdc_hard_reset_port(link->ap);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100829 pdc_reset_port(link->ap);
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200830
831 /* sata_promise can't reliably acquire the first D2H Reg FIS
832 * after hardreset. Do non-waiting hardreset and request
833 * follow-up SRST.
834 */
835 return sata_std_hardreset(link, class, deadline);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100836}
837
Tejun Heoa1efdab2008-03-25 12:22:50 +0900838static void pdc_error_handler(struct ata_port *ap)
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100839{
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100840 if (!(ap->pflags & ATA_PFLAG_FROZEN))
841 pdc_reset_port(ap);
842
Tejun Heofe06e5f2010-05-10 21:41:39 +0200843 ata_sff_error_handler(ap);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100844}
845
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100846static void pdc_post_internal_cmd(struct ata_queued_cmd *qc)
847{
848 struct ata_port *ap = qc->ap;
849
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100850 /* make DMA engine forget about the failed command */
Tejun Heoa51d6442007-03-20 15:24:11 +0900851 if (qc->flags & ATA_QCFLAG_FAILED)
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100852 pdc_reset_port(ap);
853}
854
Mikael Pettersson176efb02007-03-14 09:51:35 +0100855static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
856 u32 port_status, u32 err_mask)
857{
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900858 struct ata_eh_info *ehi = &ap->link.eh_info;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100859 unsigned int ac_err_mask = 0;
860
861 ata_ehi_clear_desc(ehi);
862 ata_ehi_push_desc(ehi, "port_status 0x%08x", port_status);
863 port_status &= err_mask;
864
865 if (port_status & PDC_DRIVE_ERR)
866 ac_err_mask |= AC_ERR_DEV;
867 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
Mikael Petterssona2342f42010-01-09 23:32:06 +0100868 ac_err_mask |= AC_ERR_OTHER;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100869 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
870 ac_err_mask |= AC_ERR_ATA_BUS;
871 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
872 | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR))
873 ac_err_mask |= AC_ERR_HOST_BUS;
874
Tejun Heo936fd732007-08-06 18:36:23 +0900875 if (sata_scr_valid(&ap->link)) {
Tejun Heoda3dbb12007-07-16 14:29:40 +0900876 u32 serror;
877
Tejun Heo82ef04f2008-07-31 17:02:40 +0900878 pdc_sata_scr_read(&ap->link, SCR_ERROR, &serror);
Tejun Heoda3dbb12007-07-16 14:29:40 +0900879 ehi->serror |= serror;
880 }
Mikael Petterssonce2d3ab2007-04-07 14:29:51 +0200881
Mikael Pettersson176efb02007-03-14 09:51:35 +0100882 qc->err_mask |= ac_err_mask;
Mikael Petterssonce2d3ab2007-04-07 14:29:51 +0200883
884 pdc_reset_port(ap);
Mikael Pettersson8ffcfd92007-05-06 22:12:31 +0200885
886 ata_port_abort(ap);
Mikael Pettersson176efb02007-03-14 09:51:35 +0100887}
888
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200889static unsigned int pdc_host_intr(struct ata_port *ap,
890 struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891{
Albert Leea22e2eb2005-12-05 15:38:02 +0800892 unsigned int handled = 0;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200893 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100894 u32 port_status, err_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895
Mikael Pettersson176efb02007-03-14 09:51:35 +0100896 err_mask = PDC_ERR_MASK;
Tejun Heoeca25dc2007-04-17 23:44:07 +0900897 if (ap->flags & PDC_FLAG_GEN_II)
Mikael Pettersson176efb02007-03-14 09:51:35 +0100898 err_mask &= ~PDC1_ERR_MASK;
899 else
900 err_mask &= ~PDC2_ERR_MASK;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200901 port_status = readl(ata_mmio + PDC_GLOBAL_CTL);
Mikael Pettersson176efb02007-03-14 09:51:35 +0100902 if (unlikely(port_status & err_mask)) {
903 pdc_error_intr(ap, qc, port_status, err_mask);
904 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700905 }
906
907 switch (qc->tf.protocol) {
908 case ATA_PROT_DMA:
909 case ATA_PROT_NODATA:
Tejun Heo0dc36882007-12-18 16:34:43 -0500910 case ATAPI_PROT_DMA:
911 case ATAPI_PROT_NODATA:
Albert Leea22e2eb2005-12-05 15:38:02 +0800912 qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
913 ata_qc_complete(qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914 handled = 1;
915 break;
Mikael Petterssond0e58032007-06-19 21:53:30 +0200916 default:
Albert Leeee500aa2005-09-27 17:34:38 +0800917 ap->stats.idle_irq++;
918 break;
Mikael Petterssond0e58032007-06-19 21:53:30 +0200919 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920
Albert Leeee500aa2005-09-27 17:34:38 +0800921 return handled;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922}
923
924static void pdc_irq_clear(struct ata_port *ap)
925{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200926 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200928 readl(ata_mmio + PDC_COMMAND);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700929}
930
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400931static irqreturn_t pdc_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932{
Jeff Garzikcca39742006-08-24 03:19:22 -0400933 struct ata_host *host = dev_instance;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 struct ata_port *ap;
935 u32 mask = 0;
936 unsigned int i, tmp;
937 unsigned int handled = 0;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200938 void __iomem *host_mmio;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200939 unsigned int hotplug_offset, ata_no;
940 u32 hotplug_status;
941 int is_sataii_tx4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700942
943 VPRINTK("ENTER\n");
944
Tejun Heo0d5ff562007-02-01 15:06:36 +0900945 if (!host || !host->iomap[PDC_MMIO_BAR]) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700946 VPRINTK("QUICK EXIT\n");
947 return IRQ_NONE;
948 }
949
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200950 host_mmio = host->iomap[PDC_MMIO_BAR];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100952 spin_lock(&host->lock);
953
Mikael Petterssona77720a2007-07-03 01:09:05 +0200954 /* read and clear hotplug flags for all ports */
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200955 if (host->ports[0]->flags & PDC_FLAG_GEN_II) {
Mikael Petterssona77720a2007-07-03 01:09:05 +0200956 hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200957 hotplug_status = readl(host_mmio + hotplug_offset);
958 if (hotplug_status & 0xff)
959 writel(hotplug_status | 0xff, host_mmio + hotplug_offset);
960 hotplug_status &= 0xff; /* clear uninteresting bits */
961 } else
962 hotplug_status = 0;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200963
Linus Torvalds1da177e2005-04-16 15:20:36 -0700964 /* reading should also clear interrupts */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200965 mask = readl(host_mmio + PDC_INT_SEQMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966
Mikael Petterssona77720a2007-07-03 01:09:05 +0200967 if (mask == 0xffffffff && hotplug_status == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968 VPRINTK("QUICK EXIT 2\n");
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100969 goto done_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 }
Luke Kosewski6340f012006-01-28 12:39:29 -0500971
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200972 mask &= 0xffff; /* only 16 SEQIDs possible */
Mikael Petterssona77720a2007-07-03 01:09:05 +0200973 if (mask == 0 && hotplug_status == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700974 VPRINTK("QUICK EXIT 3\n");
Luke Kosewski6340f012006-01-28 12:39:29 -0500975 goto done_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 }
977
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200978 writel(mask, host_mmio + PDC_INT_SEQMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979
Mikael Petterssona77720a2007-07-03 01:09:05 +0200980 is_sataii_tx4 = pdc_is_sataii_tx4(host->ports[0]->flags);
981
Jeff Garzikcca39742006-08-24 03:19:22 -0400982 for (i = 0; i < host->n_ports; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983 VPRINTK("port %u\n", i);
Jeff Garzikcca39742006-08-24 03:19:22 -0400984 ap = host->ports[i];
Mikael Petterssona77720a2007-07-03 01:09:05 +0200985
986 /* check for a plug or unplug event */
987 ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4);
988 tmp = hotplug_status & (0x11 << ata_no);
Tejun Heo3e4ec342010-05-10 21:41:30 +0200989 if (tmp) {
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900990 struct ata_eh_info *ehi = &ap->link.eh_info;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200991 ata_ehi_clear_desc(ehi);
992 ata_ehi_hotplugged(ehi);
993 ata_ehi_push_desc(ehi, "hotplug_status %#x", tmp);
994 ata_port_freeze(ap);
995 ++handled;
996 continue;
997 }
998
999 /* check for a packet interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000 tmp = mask & (1 << (i + 1));
Tejun Heo3e4ec342010-05-10 21:41:30 +02001001 if (tmp) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002 struct ata_queued_cmd *qc;
1003
Tejun Heo9af5c9c2007-08-06 18:36:22 +09001004 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Albert Leee50362e2005-09-27 17:39:50 +08001005 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001006 handled += pdc_host_intr(ap, qc);
1007 }
1008 }
1009
Linus Torvalds1da177e2005-04-16 15:20:36 -07001010 VPRINTK("EXIT\n");
1011
Luke Kosewski6340f012006-01-28 12:39:29 -05001012done_irq:
Jeff Garzikcca39742006-08-24 03:19:22 -04001013 spin_unlock(&host->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014 return IRQ_RETVAL(handled);
1015}
1016
Mikael Pettersson7715a6f2008-05-17 18:49:09 +02001017static void pdc_packet_start(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001018{
1019 struct ata_port *ap = qc->ap;
1020 struct pdc_port_priv *pp = ap->private_data;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001021 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
1022 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001023 unsigned int port_no = ap->port_no;
1024 u8 seq = (u8) (port_no + 1);
1025
1026 VPRINTK("ENTER, ap %p\n", ap);
1027
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001028 writel(0x00000001, host_mmio + (seq * 4));
1029 readl(host_mmio + (seq * 4)); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030
1031 pp->pkt[2] = seq;
1032 wmb(); /* flush PRD, pkt writes */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001033 writel(pp->pkt_dma, ata_mmio + PDC_PKT_SUBMIT);
1034 readl(ata_mmio + PDC_PKT_SUBMIT); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001035}
1036
Tejun Heo9363c382008-04-07 22:47:16 +09001037static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001038{
1039 switch (qc->tf.protocol) {
Tejun Heo0dc36882007-12-18 16:34:43 -05001040 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +01001041 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1042 break;
1043 /*FALLTHROUGH*/
Tejun Heo51b94d22007-06-08 13:46:55 -07001044 case ATA_PROT_NODATA:
1045 if (qc->tf.flags & ATA_TFLAG_POLLING)
1046 break;
1047 /*FALLTHROUGH*/
Tejun Heo0dc36882007-12-18 16:34:43 -05001048 case ATAPI_PROT_DMA:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001049 case ATA_PROT_DMA:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001050 pdc_packet_start(qc);
1051 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 default:
1053 break;
1054 }
Tejun Heo9363c382008-04-07 22:47:16 +09001055 return ata_sff_qc_issue(qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001056}
1057
Jeff Garzik057ace52005-10-22 14:27:05 -04001058static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001059{
Tejun Heo0dc36882007-12-18 16:34:43 -05001060 WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA);
Tejun Heo9363c382008-04-07 22:47:16 +09001061 ata_sff_tf_load(ap, tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001062}
1063
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001064static void pdc_exec_command_mmio(struct ata_port *ap,
1065 const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001066{
Tejun Heo0dc36882007-12-18 16:34:43 -05001067 WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA);
Tejun Heo9363c382008-04-07 22:47:16 +09001068 ata_sff_exec_command(ap, tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001069}
1070
Mikael Pettersson95006182007-01-09 10:51:46 +01001071static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
1072{
1073 u8 *scsicmd = qc->scsicmd->cmnd;
1074 int pio = 1; /* atapi dma off by default */
1075
1076 /* Whitelist commands that may use DMA. */
1077 switch (scsicmd[0]) {
1078 case WRITE_12:
1079 case WRITE_10:
1080 case WRITE_6:
1081 case READ_12:
1082 case READ_10:
1083 case READ_6:
1084 case 0xad: /* READ_DVD_STRUCTURE */
1085 case 0xbe: /* READ_CD */
1086 pio = 0;
1087 }
1088 /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */
1089 if (scsicmd[0] == WRITE_10) {
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001090 unsigned int lba =
1091 (scsicmd[2] << 24) |
1092 (scsicmd[3] << 16) |
1093 (scsicmd[4] << 8) |
1094 scsicmd[5];
Mikael Pettersson95006182007-01-09 10:51:46 +01001095 if (lba >= 0xFFFF4FA2)
1096 pio = 1;
1097 }
1098 return pio;
1099}
1100
Mikael Pettersson724114a2007-03-11 21:20:43 +01001101static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc)
Mikael Pettersson95006182007-01-09 10:51:46 +01001102{
Mikael Pettersson95006182007-01-09 10:51:46 +01001103 /* First generation chips cannot use ATAPI DMA on SATA ports */
Mikael Pettersson724114a2007-03-11 21:20:43 +01001104 return 1;
Mikael Pettersson95006182007-01-09 10:51:46 +01001105}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001106
Tejun Heoeca25dc2007-04-17 23:44:07 +09001107static void pdc_ata_setup_port(struct ata_port *ap,
1108 void __iomem *base, void __iomem *scr_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001109{
Tejun Heoeca25dc2007-04-17 23:44:07 +09001110 ap->ioaddr.cmd_addr = base;
1111 ap->ioaddr.data_addr = base;
1112 ap->ioaddr.feature_addr =
1113 ap->ioaddr.error_addr = base + 0x4;
1114 ap->ioaddr.nsect_addr = base + 0x8;
1115 ap->ioaddr.lbal_addr = base + 0xc;
1116 ap->ioaddr.lbam_addr = base + 0x10;
1117 ap->ioaddr.lbah_addr = base + 0x14;
1118 ap->ioaddr.device_addr = base + 0x18;
1119 ap->ioaddr.command_addr =
1120 ap->ioaddr.status_addr = base + 0x1c;
1121 ap->ioaddr.altstatus_addr =
1122 ap->ioaddr.ctl_addr = base + 0x38;
1123 ap->ioaddr.scr_addr = scr_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124}
1125
Tejun Heoeca25dc2007-04-17 23:44:07 +09001126static void pdc_host_init(struct ata_host *host)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001127{
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001128 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Tejun Heoeca25dc2007-04-17 23:44:07 +09001129 int is_gen2 = host->ports[0]->flags & PDC_FLAG_GEN_II;
Mikael Petterssond324d4622006-12-06 09:55:43 +01001130 int hotplug_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001131 u32 tmp;
1132
Tejun Heoeca25dc2007-04-17 23:44:07 +09001133 if (is_gen2)
Mikael Petterssond324d4622006-12-06 09:55:43 +01001134 hotplug_offset = PDC2_SATA_PLUG_CSR;
1135 else
1136 hotplug_offset = PDC_SATA_PLUG_CSR;
1137
Linus Torvalds1da177e2005-04-16 15:20:36 -07001138 /*
1139 * Except for the hotplug stuff, this is voodoo from the
1140 * Promise driver. Label this entire section
1141 * "TODO: figure out why we do this"
1142 */
1143
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001144 /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001145 tmp = readl(host_mmio + PDC_FLASH_CTL);
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001146 tmp |= 0x02000; /* bit 13 (enable bmr burst) */
Tejun Heoeca25dc2007-04-17 23:44:07 +09001147 if (!is_gen2)
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001148 tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001149 writel(tmp, host_mmio + PDC_FLASH_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150
1151 /* clear plug/unplug flags for all ports */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001152 tmp = readl(host_mmio + hotplug_offset);
1153 writel(tmp | 0xff, host_mmio + hotplug_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001154
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001155 tmp = readl(host_mmio + hotplug_offset);
Mikael Pettersson0ae66542009-09-15 15:07:32 +02001156 if (is_gen2) /* unmask plug/unplug ints */
1157 writel(tmp & ~0xff0000, host_mmio + hotplug_offset);
1158 else /* mask plug/unplug ints */
1159 writel(tmp | 0xff0000, host_mmio + hotplug_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001161 /* don't initialise TBG or SLEW on 2nd generation chips */
Tejun Heoeca25dc2007-04-17 23:44:07 +09001162 if (is_gen2)
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001163 return;
1164
Linus Torvalds1da177e2005-04-16 15:20:36 -07001165 /* reduce TBG clock to 133 Mhz. */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001166 tmp = readl(host_mmio + PDC_TBG_MODE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 tmp &= ~0x30000; /* clear bit 17, 16*/
1168 tmp |= 0x10000; /* set bit 17:16 = 0:1 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001169 writel(tmp, host_mmio + PDC_TBG_MODE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001170
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001171 readl(host_mmio + PDC_TBG_MODE); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172 msleep(10);
1173
1174 /* adjust slew rate control register. */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001175 tmp = readl(host_mmio + PDC_SLEW_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001176 tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */
1177 tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001178 writel(tmp, host_mmio + PDC_SLEW_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001179}
1180
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001181static int pdc_ata_init_one(struct pci_dev *pdev,
1182 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001183{
1184 static int printed_version;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001185 const struct ata_port_info *pi = &pdc_port_info[ent->driver_data];
1186 const struct ata_port_info *ppi[PDC_MAX_PORTS];
1187 struct ata_host *host;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001188 void __iomem *host_mmio;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001189 int n_ports, i, rc;
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001190 int is_sataii_tx4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001191
1192 if (!printed_version++)
Jeff Garzika9524a72005-10-30 14:39:11 -05001193 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001194
Tejun Heoeca25dc2007-04-17 23:44:07 +09001195 /* enable and acquire resources */
Tejun Heo24dc5f32007-01-20 16:00:28 +09001196 rc = pcim_enable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001197 if (rc)
1198 return rc;
1199
Tejun Heo0d5ff562007-02-01 15:06:36 +09001200 rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME);
1201 if (rc == -EBUSY)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001202 pcim_pin_device(pdev);
Tejun Heo0d5ff562007-02-01 15:06:36 +09001203 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001204 return rc;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001205 host_mmio = pcim_iomap_table(pdev)[PDC_MMIO_BAR];
Tejun Heoeca25dc2007-04-17 23:44:07 +09001206
1207 /* determine port configuration and setup host */
1208 n_ports = 2;
1209 if (pi->flags & PDC_FLAG_4_PORTS)
1210 n_ports = 4;
1211 for (i = 0; i < n_ports; i++)
1212 ppi[i] = pi;
1213
1214 if (pi->flags & PDC_FLAG_SATA_PATA) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001215 u8 tmp = readb(host_mmio + PDC_FLASH_CTL + 1);
Mikael Petterssond0e58032007-06-19 21:53:30 +02001216 if (!(tmp & 0x80))
Tejun Heoeca25dc2007-04-17 23:44:07 +09001217 ppi[n_ports++] = pi + 1;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001218 }
1219
1220 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
1221 if (!host) {
1222 dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n");
1223 return -ENOMEM;
1224 }
1225 host->iomap = pcim_iomap_table(pdev);
1226
Mikael Petterssond0e58032007-06-19 21:53:30 +02001227 is_sataii_tx4 = pdc_is_sataii_tx4(pi->flags);
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001228 for (i = 0; i < host->n_ports; i++) {
Tejun Heocbcdd872007-08-18 13:14:55 +09001229 struct ata_port *ap = host->ports[i];
Mikael Petterssond0e58032007-06-19 21:53:30 +02001230 unsigned int ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4);
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001231 unsigned int ata_offset = 0x200 + ata_no * 0x80;
Tejun Heocbcdd872007-08-18 13:14:55 +09001232 unsigned int scr_offset = 0x400 + ata_no * 0x100;
1233
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001234 pdc_ata_setup_port(ap, host_mmio + ata_offset, host_mmio + scr_offset);
Tejun Heocbcdd872007-08-18 13:14:55 +09001235
1236 ata_port_pbar_desc(ap, PDC_MMIO_BAR, -1, "mmio");
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001237 ata_port_pbar_desc(ap, PDC_MMIO_BAR, ata_offset, "ata");
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001238 }
Tejun Heoeca25dc2007-04-17 23:44:07 +09001239
1240 /* initialize adapter */
1241 pdc_host_init(host);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001242
1243 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
1244 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001245 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001246 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
1247 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001248 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001249
Tejun Heoeca25dc2007-04-17 23:44:07 +09001250 /* start host, request IRQ and attach */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001251 pci_set_master(pdev);
Tejun Heoeca25dc2007-04-17 23:44:07 +09001252 return ata_host_activate(host, pdev->irq, pdc_interrupt, IRQF_SHARED,
1253 &pdc_ata_sht);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001254}
1255
Linus Torvalds1da177e2005-04-16 15:20:36 -07001256static int __init pdc_ata_init(void)
1257{
Pavel Roskinb7887192006-08-10 18:13:18 +09001258 return pci_register_driver(&pdc_ata_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259}
1260
Linus Torvalds1da177e2005-04-16 15:20:36 -07001261static void __exit pdc_ata_exit(void)
1262{
1263 pci_unregister_driver(&pdc_ata_pci_driver);
1264}
1265
Linus Torvalds1da177e2005-04-16 15:20:36 -07001266MODULE_AUTHOR("Jeff Garzik");
Tobias Lorenzf497ba72005-05-12 15:51:01 -04001267MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001268MODULE_LICENSE("GPL");
1269MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
1270MODULE_VERSION(DRV_VERSION);
1271
1272module_init(pdc_ata_init);
1273module_exit(pdc_ata_exit);