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gerrit-public.fairphone.software / kernel / msm / afd8212f309e035480eb037c5fb675a1cc2262ae / . / arch / arm / boot / dts / msm8226.dtsi
blob: b7ff62bf0d3b7280199ab0318eaf79fa15f60e5d [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]24 };
25
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]26 memory {
27 secure_mem: secure_region {
28 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]29 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]30 label = "secure_mem";
31 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]32
33 qsecom_mem: qsecom_region {
34 linux,contiguous-region;
35 reg = <0 0x780000>;
36 label = "qsecom_mem";
37 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]38 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]39
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]40 soc: soc { };
41};
42
43/include/ "msm8226-ion.dtsi"
44/include/ "msm8226-camera.dtsi"
45/include/ "msm-gdsc.dtsi"
46/include/ "msm8226-iommu.dtsi"
47/include/ "msm8226-pm.dtsi"
48/include/ "msm8226-smp2p.dtsi"
49/include/ "msm8226-gpu.dtsi"
50/include/ "msm8226-bus.dtsi"
51/include/ "msm8226-mdss.dtsi"
52/include/ "msm8226-coresight.dtsi"
53/include/ "msm8226-iommu-domains.dtsi"
54
55&soc {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 intc: interrupt-controller@f9000000 {
61 compatible = "qcom,msm-qgic2";
62 interrupt-controller;
63 #interrupt-cells = <3>;
64 reg = <0xF9000000 0x1000>,
65 <0xF9002000 0x1000>;
66 };
67
68 msmgpio: gpio@fd510000 {
69 compatible = "qcom,msm-gpio";
70 interrupt-controller;
71 #interrupt-cells = <2>;
72 reg = <0xfd510000 0x4000>;
73 gpio-controller;
74 #gpio-cells = <2>;
75 ngpio = <117>;
76 interrupts = <0 208 0>;
77 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]78 };
79
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]80 qcom,mpm2-sleep-counter@fc4a3000 {
81 compatible = "qcom,mpm2-sleep-counter";
82 reg = <0xfc4a3000 0x1000>;
83 clock-frequency = <32768>;
84 };
85
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]86 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]87 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]88 interrupts = <1 2 0 1 3 0>;
89 clock-frequency = <19200000>;
90 };
91
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]92 timer@f9020000 {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges;
96 compatible = "arm,armv7-timer-mem";
97 reg = <0xf9020000 0x1000>;
98 clock-frequency = <19200000>;
99
100 frame@f9021000 {
101 frame-number = <0>;
102 interrupts = <0 8 0x4>,
103 <0 7 0x4>;
104 reg = <0xf9021000 0x1000>,
105 <0xf9022000 0x1000>;
106 };
107
108 frame@f9023000 {
109 frame-number = <1>;
110 interrupts = <0 9 0x4>;
111 reg = <0xf9023000 0x1000>;
112 status = "disabled";
113 };
114
115 frame@f9024000 {
116 frame-number = <2>;
117 interrupts = <0 10 0x4>;
118 reg = <0xf9024000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9025000 {
123 frame-number = <3>;
124 interrupts = <0 11 0x4>;
125 reg = <0xf9025000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9026000 {
130 frame-number = <4>;
131 interrupts = <0 12 0x4>;
132 reg = <0xf9026000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9027000 {
137 frame-number = <5>;
138 interrupts = <0 13 0x4>;
139 reg = <0xf9027000 0x1000>;
140 status = "disabled";
141 };
142
143 frame@f9028000 {
144 frame-number = <6>;
145 interrupts = <0 14 0x4>;
146 reg = <0xf9028000 0x1000>;
147 status = "disabled";
148 };
149 };
150
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]151 qcom,vidc@fdc00000 {
152 compatible = "qcom,msm-vidc";
153 reg = <0xfdc00000 0xff000>;
154 interrupts = <0 44 0>;
155 qcom,load-freq-tbl = <352800 160000000>,
156 <244800 133330000>,
157 <108000 66700000>;
158 qcom,hfi = "venus";
159 qcom,bus-ports = <1>;
160 qcom,reg-presets = <0xE0024 0x0>,
161 <0x80124 0x3>,
162 <0xE0020 0x5555556>,
163 <0x800B0 0x10101001>,
164 <0x800B4 0x00101010>,
165 <0x800C0 0x1010100f>,
166 <0x800C4 0x00101010>,
167 <0x800D0 0x00000010>,
168 <0x800D4 0x00000010>,
169 <0x800D8 0x00000707>;
170 qcom,enc-ddr-ab-ib = <0 0>,
171 <129000 142000>,
172 <384000 422000>,
173 <866000 953000>;
174 qcom,dec-ddr-ab-ib = <0 0>,
175 <103000 134000>,
176 <268000 348000>,
177 <505000 657000>;
178 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
179 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
180 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
181 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]182 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]183 };
184
185 qcom,wfd {
186 compatible = "qcom,msm-wfd";
187 };
188
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]189 serial@f991f000 {
190 compatible = "qcom,msm-lsuart-v14";
191 reg = <0xf991f000 0x1000>;
192 interrupts = <0 109 0>;
193 status = "disabled";
194 };
195
196 serial@f995e000 {
197 compatible = "qcom,msm-lsuart-v14";
198 reg = <0xf995e000 0x1000>;
199 interrupts = <0 114 0>;
200 status = "disabled";
201 };
202
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]203 qcom,msm-imem@fe805000 {
204 compatible = "qcom,msm-imem";
205 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
206 };
207
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]208 qcom,sps@f9984000 {
209 compatible = "qcom,msm_sps";
210 reg = <0xf9984000 0x15000>,
211 <0xf9999000 0xb000>;
212 interrupts = <0 94 0>;
213 };
214
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]215 qcom,usbbam@f9a44000 {
216 compatible = "qcom,usb-bam-msm";
217 reg = <0xf9a44000 0x11000>;
218 reg-names = "hsusb";
219 interrupts = <0 135 0>;
220 interrupt-names = "hsusb";
221 qcom,usb-bam-num-pipes = <16>;
222 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
223 qcom,ignore-core-reset-ack;
224 qcom,disable-clk-gating;
225
226 qcom,pipe0 {
227 label = "hsusb-qdss-in-0";
228 qcom,usb-bam-mem-type = <3>;
229 qcom,bam-type = <1>;
230 qcom,dir = <1>;
231 qcom,pipe-num = <0>;
232 qcom,peer-bam = <1>;
233 qcom,src-bam-physical-address = <0xfc37c000>;
234 qcom,src-bam-pipe-index = <0>;
235 qcom,dst-bam-physical-address = <0xf9a44000>;
236 qcom,dst-bam-pipe-index = <2>;
237 qcom,data-fifo-offset = <0x0>;
238 qcom,data-fifo-size = <0x600>;
239 qcom,descriptor-fifo-offset = <0x600>;
240 qcom,descriptor-fifo-size = <0x200>;
241 };
242 };
243
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]244 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]245 compatible = "qcom,hsusb-otg";
246 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]247 interrupts = <0 134 0>, <0 140 0>;
248 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]249 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]250 HSUSB_1p8-supply = <&pm8226_l10>;
251 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]252 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]253
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]254 qcom,hsusb-otg-phy-init-seq =
255 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]256 qcom,hsusb-otg-phy-type = <2>;
257 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]258 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]259 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]260 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]261
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]262 qcom,msm-bus,name = "usb";
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]263 qcom,msm-bus,num-cases = <2>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]264 qcom,msm-bus,num-paths = <1>;
265 qcom,msm-bus,vectors-KBps =
266 <87 512 0 0>,
267 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]268 };
269
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]270 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]271 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]272 reg = <0xfe8050c8 0xc8>;
Chiranjeevi Velempati9d797662013-04-22 15:45:38 +0530[diff] [blame]273 qcom,android-usb-cdrom;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]274 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]275 };
276
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]277 wcd9xxx_intc: wcd9xxx-irq {
278 compatible = "qcom,wcd9xxx-irq";
279 interrupt-controller;
280 #interrupt-cells = <1>;
281 interrupt-parent = <&msmgpio>;
282 interrupts = <68 0>;
283 interrupt-names = "cdc-int";
284 };
285
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]286 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]287 cell-index = <1>;
288 compatible = "qcom,slim-ngd";
289 reg = <0xfe12f000 0x35000>,
290 <0xfe104000 0x20000>;
291 reg-names = "slimbus_physical", "slimbus_bam_physical";
292 interrupts = <0 163 0>, <0 164 0>;
293 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]294
295 tapan_codec {
296 compatible = "qcom,tapan-slim-pgd";
297 elemental-addr = [00 01 E0 00 17 02];
298
299 interrupt-parent = <&wcd9xxx_intc>;
300 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
301 17 18 19 20 21 22 23 24 25 26 27 28>;
302 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
303
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]304 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]305 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
306 qcom,cdc-vdd-buck-current = <650000>;
307
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]308 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]309 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
310 qcom,cdc-vdd-h-current = <25000>;
311
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]312 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]313 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
314 qcom,cdc-vdd-px-current = <25000>;
315
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]316 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]317 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
318 qcom,cdc-vdd-a-1p2v-current = <10000>;
319
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]320 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]321 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
322 qcom,cdc-vdd-cx-current = <10000>;
323
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]324 qcom,cdc-static-supplies = "cdc-vdd-buck",
325 "cdc-vdd-h",
326 "cdc-vdd-px",
327 "cdc-vdd-a-1p2v",
328 "cdc-vdd-cx";
329
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]330 qcom,cdc-micbias-ldoh-v = <0x3>;
331 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]332 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]333 qcom,cdc-micbias-cfilt3-mv = <1800>;
334
335 qcom,cdc-micbias1-cfilt-sel = <0x0>;
336 qcom,cdc-micbias2-cfilt-sel = <0x1>;
337 qcom,cdc-micbias3-cfilt-sel = <0x2>;
338
339 qcom,cdc-mclk-clk-rate = <9600000>;
340 qcom,cdc-slim-ifd = "tapan-slim-ifd";
341 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
342 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]343 };
344
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]345 qcom,msm-adsp-loader {
346 compatible = "qcom,adsp-loader";
347 qcom,adsp-state = <0>;
348 };
349
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]350 sound {
351 compatible = "qcom,msm8226-audio-tapan";
352 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]353 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]354 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
355 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
356 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
357 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
358 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]359 };
360
361 qcom,msm-pcm {
362 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]363 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]364 };
365
366 qcom,msm-pcm-routing {
367 compatible = "qcom,msm-pcm-routing";
368 };
369
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]370 qcom,msm-pcm-low-latency {
371 compatible = "qcom,msm-pcm-dsp";
372 qcom,msm-pcm-dsp-id = <1>;
373 qcom,msm-pcm-low-latency;
374 };
375
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]376 qcom,msm-pcm-lpa {
377 compatible = "qcom,msm-pcm-lpa";
378 };
379
380 qcom,msm-compr-dsp {
381 compatible = "qcom,msm-compr-dsp";
382 };
383
384 qcom,msm-voip-dsp {
385 compatible = "qcom,msm-voip-dsp";
386 };
387
388 qcom,msm-pcm-voice {
389 compatible = "qcom,msm-pcm-voice";
390 };
391
392 qcom,msm-stub-codec {
393 compatible = "qcom,msm-stub-codec";
394 };
395
396 qcom,msm-dai-fe {
397 compatible = "qcom,msm-dai-fe";
398 };
399
400 qcom,msm-pcm-afe {
401 compatible = "qcom,msm-pcm-afe";
402 };
403
404 qcom,msm-dai-q6-hdmi {
405 compatible = "qcom,msm-dai-q6-hdmi";
406 qcom,msm-dai-q6-dev-id = <8>;
407 };
408
409 qcom,msm-dai-q6 {
410 compatible = "qcom,msm-dai-q6";
411 qcom,msm-dai-q6-sb-0-rx {
412 compatible = "qcom,msm-dai-q6-dev";
413 qcom,msm-dai-q6-dev-id = <16384>;
414 };
415
416 qcom,msm-dai-q6-sb-0-tx {
417 compatible = "qcom,msm-dai-q6-dev";
418 qcom,msm-dai-q6-dev-id = <16385>;
419 };
420
421 qcom,msm-dai-q6-sb-1-rx {
422 compatible = "qcom,msm-dai-q6-dev";
423 qcom,msm-dai-q6-dev-id = <16386>;
424 };
425
426 qcom,msm-dai-q6-sb-1-tx {
427 compatible = "qcom,msm-dai-q6-dev";
428 qcom,msm-dai-q6-dev-id = <16387>;
429 };
430
431 qcom,msm-dai-q6-sb-3-rx {
432 compatible = "qcom,msm-dai-q6-dev";
433 qcom,msm-dai-q6-dev-id = <16390>;
434 };
435
436 qcom,msm-dai-q6-sb-3-tx {
437 compatible = "qcom,msm-dai-q6-dev";
438 qcom,msm-dai-q6-dev-id = <16391>;
439 };
440
441 qcom,msm-dai-q6-sb-4-rx {
442 compatible = "qcom,msm-dai-q6-dev";
443 qcom,msm-dai-q6-dev-id = <16392>;
444 };
445
446 qcom,msm-dai-q6-sb-4-tx {
447 compatible = "qcom,msm-dai-q6-dev";
448 qcom,msm-dai-q6-dev-id = <16393>;
449 };
450
451 qcom,msm-dai-q6-bt-sco-rx {
452 compatible = "qcom,msm-dai-q6-dev";
453 qcom,msm-dai-q6-dev-id = <12288>;
454 };
455
456 qcom,msm-dai-q6-bt-sco-tx {
457 compatible = "qcom,msm-dai-q6-dev";
458 qcom,msm-dai-q6-dev-id = <12289>;
459 };
460
461 qcom,msm-dai-q6-int-fm-rx {
462 compatible = "qcom,msm-dai-q6-dev";
463 qcom,msm-dai-q6-dev-id = <12292>;
464 };
465
466 qcom,msm-dai-q6-int-fm-tx {
467 compatible = "qcom,msm-dai-q6-dev";
468 qcom,msm-dai-q6-dev-id = <12293>;
469 };
470
471 qcom,msm-dai-q6-be-afe-pcm-rx {
472 compatible = "qcom,msm-dai-q6-dev";
473 qcom,msm-dai-q6-dev-id = <224>;
474 };
475
476 qcom,msm-dai-q6-be-afe-pcm-tx {
477 compatible = "qcom,msm-dai-q6-dev";
478 qcom,msm-dai-q6-dev-id = <225>;
479 };
480
481 qcom,msm-dai-q6-afe-proxy-rx {
482 compatible = "qcom,msm-dai-q6-dev";
483 qcom,msm-dai-q6-dev-id = <241>;
484 };
485
486 qcom,msm-dai-q6-afe-proxy-tx {
487 compatible = "qcom,msm-dai-q6-dev";
488 qcom,msm-dai-q6-dev-id = <240>;
489 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]490
491 qcom,msm-dai-q6-incall-record-rx {
492 compatible = "qcom,msm-dai-q6-dev";
493 qcom,msm-dai-q6-dev-id = <32771>;
494 };
495
496 qcom,msm-dai-q6-incall-record-tx {
497 compatible = "qcom,msm-dai-q6-dev";
498 qcom,msm-dai-q6-dev-id = <32772>;
499 };
500
501 qcom,msm-dai-q6-incall-music-rx {
502 compatible = "qcom,msm-dai-q6-dev";
503 qcom,msm-dai-q6-dev-id = <32773>;
504 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]505 };
506
507 qcom,msm-pcm-hostless {
508 compatible = "qcom,msm-pcm-hostless";
509 };
510
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame^]511 qcom,msm-pri-auxpcm {
512 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]513 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
514 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
515 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
516 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
517 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
518 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
519 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame^]520 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]521 };
522
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]523 qcom,wcnss-wlan@fb000000 {
524 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]525 reg = <0xfb000000 0x280000>,
526 <0xf9011008 0x04>;
527 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]528 interrupts = <0 145 0 0 146 0>;
529 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
530
531 qcom,pronto-vddmx-supply = <&pm8226_l3>;
532 qcom,pronto-vddcx-supply = <&pm8226_s1>;
533 qcom,pronto-vddpx-supply = <&pm8226_l6>;
534 qcom,iris-vddxo-supply = <&pm8226_l10>;
535 qcom,iris-vddrfa-supply = <&pm8226_l24>;
536 qcom,iris-vddpa-supply = <&pm8226_l16>;
537 qcom,iris-vdddig-supply = <&pm8226_l24>;
538
539 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]540 qcom,has-pronto-hw;
541 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]542 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]543
544 qcom,msm-adsp-sensors {
545 compatible = "qcom,msm-adsp-sensors";
546 qcom,src-id = <11>;
547 qcom,dst-id = <604>;
548 qcom,ab = <32505856>;
549 qcom,ib = <32505856>;
550 };
551
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]552 qcom,wdt@f9017000 {
553 compatible = "qcom,msm-watchdog";
554 reg = <0xf9017000 0x1000>;
555 interrupts = <0 3 0>, <0 4 0>;
556 qcom,bark-time = <11000>;
557 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]558 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]559 };
560
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]561 qcom,smem@fa00000 {
562 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]563 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]564 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]565 <0xfc428000 0x4000>;
566 reg-names = "smem", "irq-reg-base", "aux-mem1";
567
568 qcom,smd-modem {
569 compatible = "qcom,smd";
570 qcom,smd-edge = <0>;
571 qcom,smd-irq-offset = <0x8>;
572 qcom,smd-irq-bitmask = <0x1000>;
573 qcom,pil-string = "modem";
574 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]575 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]576
577 qcom,smsm-modem {
578 compatible = "qcom,smsm";
579 qcom,smsm-edge = <0>;
580 qcom,smsm-irq-offset = <0x8>;
581 qcom,smsm-irq-bitmask = <0x2000>;
582 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]583 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]584
585 qcom,smd-adsp {
586 compatible = "qcom,smd";
587 qcom,smd-edge = <1>;
588 qcom,smd-irq-offset = <0x8>;
589 qcom,smd-irq-bitmask = <0x100>;
590 qcom,pil-string = "adsp";
591 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]592 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]593
594 qcom,smsm-adsp {
595 compatible = "qcom,smsm";
596 qcom,smsm-edge = <1>;
597 qcom,smsm-irq-offset = <0x8>;
598 qcom,smsm-irq-bitmask = <0x200>;
599 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]600 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]601
602 qcom,smd-wcnss {
603 compatible = "qcom,smd";
604 qcom,smd-edge = <6>;
605 qcom,smd-irq-offset = <0x8>;
606 qcom,smd-irq-bitmask = <0x20000>;
607 qcom,pil-string = "wcnss";
608 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]609 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]610
611 qcom,smsm-wcnss {
612 compatible = "qcom,smsm";
613 qcom,smsm-edge = <6>;
614 qcom,smsm-irq-offset = <0x8>;
615 qcom,smsm-irq-bitmask = <0x80000>;
616 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]617 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]618
619 qcom,smd-rpm {
620 compatible = "qcom,smd";
621 qcom,smd-edge = <15>;
622 qcom,smd-irq-offset = <0x8>;
623 qcom,smd-irq-bitmask = <0x1>;
624 interrupts = <0 168 1>;
625 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]626 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]627 };
628
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]629 rpm_bus: qcom,rpm-smd {
630 compatible = "qcom,rpm-smd";
631 rpm-channel-name = "rpm_requests";
632 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]633 };
634
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]635 qcom,bcl {
636 compatible = "qcom,bcl";
637 };
638
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]639 sdcc1: qcom,sdcc@f9824000 {
640 cell-index = <1>; /* SDC1 eMMC slot */
641 compatible = "qcom,msm-sdcc";
642
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]643 reg = <0xf9824000 0x800>,
644 <0xf9824800 0x100>,
645 <0xf9804000 0x7000>;
646 reg-names = "core_mem", "dml_mem", "bam_mem";
647 interrupts = <0 123 0>, <0 137 0>;
648 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]649
650 qcom,bus-width = <8>;
651 status = "disabled";
652 };
653
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]654 sdhc_1: sdhci@f9824900 {
655 compatible = "qcom,sdhci-msm";
656 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
657 reg-names = "hc_mem", "core_mem";
658
659 interrupts = <0 123 0>, <0 138 0>;
660 interrupt-names = "hc_irq", "pwr_irq";
661
662 qcom,bus-width = <8>;
663 status = "disabled";
664 };
665
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]666 sdcc2: qcom,sdcc@f98a4000 {
667 cell-index = <2>; /* SDC2 SD card slot */
668 compatible = "qcom,msm-sdcc";
669
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]670 reg = <0xf98a4000 0x800>,
671 <0xf98a4800 0x100>,
672 <0xf9884000 0x7000>;
673 reg-names = "core_mem", "dml_mem", "bam_mem";
674 interrupts = <0 125 0>, <0 220 0>;
675 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]676
677 qcom,bus-width = <4>;
678 status = "disabled";
679 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]680
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]681 sdhc_2: sdhci@f98a4900 {
682 compatible = "qcom,sdhci-msm";
683 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
684 reg-names = "hc_mem", "core_mem";
685
686 interrupts = <0 125 0>, <0 221 0>;
687 interrupt-names = "hc_irq", "pwr_irq";
688
689 qcom,bus-width = <4>;
690 status = "disabled";
691 };
692
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]693 spmi_bus: qcom,spmi@fc4c0000 {
694 cell-index = <0>;
695 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]696 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]697 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]698 <0Xfc4cb000 0x1000>,
699 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]700 /* 190,ee0_krait_hlos_spmi_periph_irq */
701 /* 187,channel_0_krait_hlos_trans_done_irq */
702 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]703 qcom,pmic-arb-ee = <0>;
704 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]705 };
706
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]707 i2c@f9926000 { /* BLSP-1 QUP-4 */
708 cell-index = <0>;
709 compatible = "qcom,i2c-qup";
710 reg = <0xf9926000 0x1000>;
711 #address-cells = <1>;
712 #size-cells = <0>;
713 reg-names = "qup_phys_addr";
714 interrupts = <0 98 0>;
715 interrupt-names = "qup_err_intr";
716 qcom,i2c-bus-freq = <100000>;
717 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]718
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]719 i2c@f9927000 { /* BLSP1 QUP5 */
720 cell-index = <5>;
721 compatible = "qcom,i2c-qup";
722 #address-cells = <1>;
723 #size-cells = <0>;
724 reg-names = "qup_phys_addr";
725 reg = <0xf9927000 0x1000>;
726 interrupt-names = "qup_err_intr";
727 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]728 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]729 qcom,i2c-src-freq = <19200000>;
730 };
731
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]732 qcom,acpuclk@f9011050 {
733 compatible = "qcom,acpuclk-a7";
734 reg = <0xf9011050 0x8>;
735 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]736 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]737 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]738
739 qcom,ocmem@fdd00000 {
740 compatible = "qcom,msm-ocmem";
741 reg = <0xfdd00000 0x2000>,
742 <0xfdd02000 0x2000>,
743 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]744 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]745 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
746 interrupts = <0 76 0 0 77 0>;
747 interrupt-names = "ocmem_irq", "dm_irq";
748 qcom,ocmem-num-regions = <0x1>;
749 qcom,ocmem-num-macros = <0x2>;
750 qcom,resource-type = <0x706d636f>;
751 #address-cells = <1>;
752 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]753 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]754
755 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]756 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]757 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]758 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]759 };
760 };
761
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]762 qcom,venus@fdce0000 {
763 compatible = "qcom,pil-venus";
764 reg = <0xfdce0000 0x4000>,
765 <0xfdc80000 0x400>;
766 reg-names = "wrapper_base", "vbif_base";
767 vdd-supply = <&gdsc_venus>;
768
769 qcom,firmware-name = "venus";
770 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]771
772 qcom,pronto@fb21b000 {
773 compatible = "qcom,pil-pronto";
774 reg = <0xfb21b000 0x3000>,
775 <0xfc401700 0x4>,
776 <0xfd485300 0xc>;
777 reg-names = "pmu_base", "clk_base", "halt_base";
778 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]779 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]780
781 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]782
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]783 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]784 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]785 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]786 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]787
788 /* GPIO output to wcnss */
789 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]790 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]791
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]792 qcom,iris-fm {
793 compatible = "qcom,iris_fm";
794 };
795
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]796 qcom,lpass@fe200000 {
797 compatible = "qcom,pil-q6v5-lpass";
798 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]799 <0xfd485100 0x00010>,
800 <0xfc4016c0 0x00004>;
801 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]802 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]803 interrupts = <0 162 1>;
804
805 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]806
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]807 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]808 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]809 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]810 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]811
812 /* GPIO output to lpass */
813 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]814 };
815
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]816 qcom,mss@fc880000 {
817 compatible = "qcom,pil-q6v5-mss";
818 reg = <0xfc880000 0x100>,
819 <0xfd485000 0x400>,
820 <0xfc820000 0x020>,
821 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]822 <0xfd485194 0x4>;
823 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]824 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]825
826 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]827 vdd_cx-supply = <&pm8226_s1_corner>;
828 vdd_mx-supply = <&pm8226_l3>;
829 vdd_pll-supply = <&pm8226_l8>;
830 qcom,vdd_pll = <1800000>;
831
832 qcom,is-loadable;
833 qcom,firmware-name = "mba";
834 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]835
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]836 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]837 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]838 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]839 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]840 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]841
842 /* GPIO output to mss */
843 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]844 };
845
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]846 qcom,msm-mem-hole {
847 compatible = "qcom,msm-mem-hole";
Neeti Desai3d0a98b2013-04-10 10:41:03 -0700[diff] [blame]848 qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]849 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]850
851 tsens: tsens@fc4a8000 {
852 compatible = "qcom,msm-tsens";
853 reg = <0xfc4a8000 0x2000>,
854 <0xfc4b8000 0x1000>;
855 reg-names = "tsens_physical", "tsens_eeprom_physical";
856 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]857 qcom,sensors = <4>;
858 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]859 qcom,calib-mode = "fuse_map2";
860 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]861
862 qcom,msm-thermal {
863 compatible = "qcom,msm-thermal";
864 qcom,sensor-id = <0>;
865 qcom,poll-ms = <250>;
866 qcom,limit-temp = <60>;
867 qcom,temp-hysteresis = <10>;
868 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]869 qcom,freq-control-mask = <0xf>;
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]870 };
871
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]872 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
873 compatible = "qcom,spi-qup-v2";
874 #address-cells = <1>;
875 #size-cells = <0>;
876 reg-names = "spi_physical", "spi_bam_physical";
877 reg = <0xf9923000 0x1000>,
878 <0xf9904000 0xF000>;
879 interrupt-names = "spi_irq", "spi_bam_irq";
880 interrupts = <0 95 0>, <0 238 0>;
881 spi-max-frequency = <19200000>;
882
883 gpios = <&msmgpio 3 0>, /* CLK */
884 <&msmgpio 1 0>, /* MISO */
885 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]886 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]887
888 qcom,infinite-mode = <0>;
889 qcom,use-bam;
890 qcom,ver-reg-exists;
891 qcom,bam-consumer-pipe-index = <12>;
892 qcom,bam-producer-pipe-index = <13>;
893 };
894
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]895 qcom,bam_dmux@fc834000 {
896 compatible = "qcom,bam_dmux";
897 reg = <0xfc834000 0x7000>;
898 interrupts = <0 29 1>;
899 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]900
901 qcom,msm-rtb {
902 compatible = "qcom,msm-rtb";
903 qcom,memory-reservation-type = "EBI1";
904 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
905 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]906
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]907 qcom,msm-rng@f9bff000 {
908 compatible = "qcom,msm-rng";
909 reg = <0xf9bff000 0x200>;
910 qcom,msm-rng-iface-clk;
911 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]912
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]913 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]914 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]915 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]916 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]917
918 jtag_mm0: jtagmm@fc33c000 {
919 compatible = "qcom,jtag-mm";
920 reg = <0xfc33c000 0x1000>,
921 <0xfc330000 0x1000>;
922 reg-names = "etm-base","debug-base";
923 };
924
925 jtag_mm1: jtagmm@fc33d000 {
926 compatible = "qcom,jtag-mm";
927 reg = <0xfc33d000 0x1000>,
928 <0xfc332000 0x1000>;
929 reg-names = "etm-base","debug-base";
930 };
931
932 jtag_mm2: jtagmm@fc33e000 {
933 compatible = "qcom,jtag-mm";
934 reg = <0xfc33e000 0x1000>,
935 <0xfc334000 0x1000>;
936 reg-names = "etm-base","debug-base";
937 };
938
939 jtag_mm3: jtagmm@fc33f000 {
940 compatible = "qcom,jtag-mm";
941 reg = <0xfc33f000 0x1000>,
942 <0xfc336000 0x1000>;
943 reg-names = "etm-base","debug-base";
944 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]945
946 qcom,ipc-spinlock@fd484000 {
947 compatible = "qcom,ipc-spinlock-sfpb";
948 reg = <0xfd484000 0x400>;
949 qcom,num-locks = <8>;
950 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]951
952 qcom,qseecom@d980000 {
953 compatible = "qcom,qseecom";
954 reg = <0xd980000 0x256000>;
955 reg-names = "secapp-region";
956 qcom,disk-encrypt-pipe-pair = <2>;
957 qcom,hlos-ce-hw-instance = <0>;
958 qcom,qsee-ce-hw-instance = <0>;
959 qcom,msm-bus,name = "qseecom-noc";
960 qcom,msm-bus,num-cases = <4>;
961 qcom,msm-bus,active-only = <0>;
962 qcom,msm-bus,num-paths = <1>;
963 qcom,msm-bus,vectors-KBps =
964 <55 512 0 0>,
965 <55 512 3936000 393600>,
966 <55 512 3936000 393600>,
967 <55 512 3936000 393600>;
968 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]969
970 qcom,qcrypto@fd404000 {
971 compatible = "qcom,qcrypto";
972 reg = <0xfd400000 0x20000>,
973 <0xfd404000 0x8000>;
974 reg-names = "crypto-base","crypto-bam-base";
975 interrupts = <0 207 0>;
976 qcom,bam-pipe-pair = <2>;
977 qcom,ce-hw-instance = <0>;
978 qcom,ce-hw-shared;
979 qcom,msm-bus,name = "qcrypto-noc";
980 qcom,msm-bus,num-cases = <2>;
981 qcom,msm-bus,active-only = <0>;
982 qcom,msm-bus,num-paths = <1>;
983 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]984 <55 512 0 0>,
985 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]986 };
987
988 qcom,qcedev@fd400000 {
989 compatible = "qcom,qcedev";
990 reg = <0xfd400000 0x20000>,
991 <0xfd404000 0x8000>;
992 reg-names = "crypto-base","crypto-bam-base";
993 interrupts = <0 207 0>;
994 qcom,bam-pipe-pair = <1>;
995 qcom,ce-hw-instance = <0>;
996 qcom,ce-hw-shared;
997 qcom,msm-bus,name = "qcedev-noc";
998 qcom,msm-bus,num-cases = <2>;
999 qcom,msm-bus,active-only = <0>;
1000 qcom,msm-bus,num-paths = <1>;
1001 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1002 <55 512 0 0>,
1003 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1004 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1005
1006 cpu-pmu {
1007 compatible = "arm,cortex-a7-pmu";
1008 qcom,irq-is-percpu;
1009 interrupts = <1 7 0xf00>;
1010 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1011};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1012
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1013&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1014 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1015 status = "ok";
1016};
1017
1018&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1019 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1020 status = "ok";
1021};
1022
1023&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1024 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1025 status = "ok";
1026};
1027
1028&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1029 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1030 status = "ok";
1031};
1032
1033&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1034 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1035 status = "ok";
1036};
1037
1038&gdsc_usb_hsic {
1039 status = "ok";
1040};
1041
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1042/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1043/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1044/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1045
1046&pm8226_vadc {
1047 chan@0 {
1048 label = "usb_in";
1049 reg = <0>;
1050 qcom,decimation = <0>;
1051 qcom,pre-div-channel-scaling = <4>;
1052 qcom,calibration-type = "absolute";
1053 qcom,scale-function = <0>;
1054 qcom,hw-settle-time = <0>;
1055 qcom,fast-avg-setup = <0>;
1056 };
1057
1058 chan@2 {
1059 label = "vchg_sns";
1060 reg = <2>;
1061 qcom,decimation = <0>;
1062 qcom,pre-div-channel-scaling = <3>;
1063 qcom,calibration-type = "absolute";
1064 qcom,scale-function = <0>;
1065 qcom,hw-settle-time = <0>;
1066 qcom,fast-avg-setup = <0>;
1067 };
1068
1069 chan@5 {
1070 label = "vcoin";
1071 reg = <5>;
1072 qcom,decimation = <0>;
1073 qcom,pre-div-channel-scaling = <1>;
1074 qcom,calibration-type = "absolute";
1075 qcom,scale-function = <0>;
1076 qcom,hw-settle-time = <0>;
1077 qcom,fast-avg-setup = <0>;
1078 };
1079
1080 chan@6 {
1081 label = "vbat_sns";
1082 reg = <6>;
1083 qcom,decimation = <0>;
1084 qcom,pre-div-channel-scaling = <1>;
1085 qcom,calibration-type = "absolute";
1086 qcom,scale-function = <0>;
1087 qcom,hw-settle-time = <0>;
1088 qcom,fast-avg-setup = <0>;
1089 };
1090
1091 chan@7 {
1092 label = "vph_pwr";
1093 reg = <7>;
1094 qcom,decimation = <0>;
1095 qcom,pre-div-channel-scaling = <1>;
1096 qcom,calibration-type = "absolute";
1097 qcom,scale-function = <0>;
1098 qcom,hw-settle-time = <0>;
1099 qcom,fast-avg-setup = <0>;
1100 };
1101
1102 chan@30 {
1103 label = "batt_therm";
1104 reg = <0x30>;
1105 qcom,decimation = <0>;
1106 qcom,pre-div-channel-scaling = <0>;
1107 qcom,calibration-type = "ratiometric";
1108 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1109 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1110 qcom,fast-avg-setup = <0>;
1111 };
1112
1113 chan@31 {
1114 label = "batt_id";
1115 reg = <0x31>;
1116 qcom,decimation = <0>;
1117 qcom,pre-div-channel-scaling = <0>;
1118 qcom,calibration-type = "ratiometric";
1119 qcom,scale-function = <0>;
1120 qcom,hw-settle-time = <2>;
1121 qcom,fast-avg-setup = <0>;
1122 };
1123
1124 chan@b2 {
1125 label = "xo_therm_pu2";
1126 reg = <0xb2>;
1127 qcom,decimation = <0>;
1128 qcom,pre-div-channel-scaling = <0>;
1129 qcom,calibration-type = "ratiometric";
1130 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1131 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1132 qcom,fast-avg-setup = <0>;
1133 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1134
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1135 chan@39 {
1136 label = "usb_id_nopull";
1137 reg = <0x39>;
1138 qcom,decimation = <0>;
1139 qcom,pre-div-channel-scaling = <0>;
1140 qcom,calibration-type = "ratiometric";
1141 qcom,scale-function = <0>;
1142 qcom,hw-settle-time = <2>;
1143 qcom,fast-avg-setup = <0>;
1144 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1145};
1146
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1147&pm8226_adc_tm {
1148 /* Channel Node */
1149 chan@30 {
1150 label = "batt_therm";
1151 reg = <0x30>;
1152 qcom,decimation = <0>;
1153 qcom,pre-div-channel-scaling = <0>;
1154 qcom,calibration-type = "ratiometric";
1155 qcom,scale-function = <1>;
1156 qcom,hw-settle-time = <2>;
1157 qcom,fast-avg-setup = <3>;
1158 qcom,btm-channel-number = <0x48>;
1159 };
1160
1161 chan@8 {
1162 label = "die_temp";
1163 reg = <8>;
1164 qcom,decimation = <0>;
1165 qcom,pre-div-channel-scaling = <0>;
1166 qcom,calibration-type = "absolute";
1167 qcom,scale-function = <3>;
1168 qcom,hw-settle-time = <0>;
1169 qcom,fast-avg-setup = <3>;
1170 qcom,btm-channel-number = <0x68>;
1171 };
1172
1173 chan@6 {
1174 label = "vbat_sns";
1175 reg = <6>;
1176 qcom,decimation = <0>;
1177 qcom,pre-div-channel-scaling = <1>;
1178 qcom,calibration-type = "absolute";
1179 qcom,scale-function = <0>;
1180 qcom,hw-settle-time = <0>;
1181 qcom,fast-avg-setup = <3>;
1182 qcom,btm-channel-number = <0x70>;
1183 };
1184
1185 chan@14 {
1186 label = "pa_therm0";
1187 reg = <0x14>;
1188 qcom,decimation = <0>;
1189 qcom,pre-div-channel-scaling = <0>;
1190 qcom,calibration-type = "ratiometric";
1191 qcom,scale-function = <2>;
1192 qcom,hw-settle-time = <2>;
1193 qcom,fast-avg-setup = <0>;
1194 qcom,btm-channel-number = <0x78>;
1195 qcom,thermal-node;
1196 };
1197
1198 chan@17 {
1199 label = "pa_therm1";
1200 reg = <0x17>;
1201 qcom,decimation = <0>;
1202 qcom,pre-div-channel-scaling = <0>;
1203 qcom,calibration-type = "ratiometric";
1204 qcom,scale-function = <2>;
1205 qcom,hw-settle-time = <2>;
1206 qcom,fast-avg-setup = <0>;
1207 qcom,btm-channel-number = <0x80>;
1208 qcom,thermal-node;
1209 };
1210};
1211
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1212&pm8226_chg {
1213 status = "ok";
1214
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1215 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1216 status = "ok";
1217 };
1218
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1219 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1220 status = "ok";
1221 };
1222
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1223 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1224 status = "ok";
1225 };
1226
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1227 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1228 status = "ok";
1229 };
1230
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1231 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1232 status = "ok";
1233 };
1234
1235 qcom,chg-misc@1600 {
1236 status = "ok";
1237 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1238};