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Stephen Rothwellf9ff0f32007-08-22 13:46:44 +10001#ifndef _ASM_POWERPC_EXCEPTION_H
2#define _ASM_POWERPC_EXCEPTION_H
3/*
4 * Extracted from head_64.S
5 *
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
15 *
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
18 *
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
26 */
27/*
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
32 *
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
36 */
37
38#define EX_R9 0
39#define EX_R10 8
40#define EX_R11 16
41#define EX_R12 24
42#define EX_R13 32
43#define EX_SRR0 40
44#define EX_DAR 48
45#define EX_DSISR 56
46#define EX_CCR 60
47#define EX_R3 64
48#define EX_LR 72
Paul Mackerras48404f22011-05-01 19:48:20 +000049#define EX_CFAR 80
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100050
51/*
52 * We're short on space and time in the exception prolog, so we can't
53 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
54 * low halfword of the address, but for Kdump we need the whole low
55 * word.
56 */
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100057#define LOAD_HANDLER(reg, label) \
Paul Mackerras1f6a93e2008-08-30 11:40:24 +100058 addi reg,reg,(label)-_stext; /* virt addr of handler ... */
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100059
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100060/* Exception register prefixes */
61#define EXC_HV H
62#define EXC_STD
63
Paul Mackerrasb01c8b52011-06-29 00:18:26 +000064#define __EXCEPTION_PROLOG_1(area, extra, vec) \
Benjamin Herrenschmidt2dd60d72011-01-20 17:50:21 +110065 GET_PACA(r13); \
Stephen Rothwell7180e3e2007-08-22 13:48:37 +100066 std r9,area+EX_R9(r13); /* save r9 - r12 */ \
67 std r10,area+EX_R10(r13); \
Paul Mackerras48404f22011-05-01 19:48:20 +000068 BEGIN_FTR_SECTION_NESTED(66); \
69 mfspr r10,SPRN_CFAR; \
70 std r10,area+EX_CFAR(r13); \
71 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
Paul Mackerrasb01c8b52011-06-29 00:18:26 +000072 mfcr r9; \
73 extra(vec); \
74 std r11,area+EX_R11(r13); \
75 std r12,area+EX_R12(r13); \
76 GET_SCRATCH0(r10); \
77 std r10,area+EX_R13(r13)
78#define EXCEPTION_PROLOG_1(area, extra, vec) \
79 __EXCEPTION_PROLOG_1(area, extra, vec)
Stephen Rothwell7180e3e2007-08-22 13:48:37 +100080
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100081#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
Paul Mackerras1f6a93e2008-08-30 11:40:24 +100082 ld r12,PACAKBASE(r13); /* get high part of &label */ \
83 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100084 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100085 LOAD_HANDLER(r12,label) \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100086 mtspr SPRN_##h##SRR0,r12; \
87 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
88 mtspr SPRN_##h##SRR1,r10; \
89 h##rfid; \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100090 b . /* prevent speculative execution */
Paul Mackerrasb01c8b52011-06-29 00:18:26 +000091#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100092 __EXCEPTION_PROLOG_PSERIES_1(label, h)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100093
Paul Mackerrasb01c8b52011-06-29 00:18:26 +000094#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
95 EXCEPTION_PROLOG_1(area, extra, vec); \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100096 EXCEPTION_PROLOG_PSERIES_1(label, h);
Benjamin Herrenschmidtc5a8c0c2009-07-16 19:36:57 +000097
Paul Mackerrasb01c8b52011-06-29 00:18:26 +000098#define __KVMTEST(n) \
99 lbz r10,PACA_KVM_SVCPU+SVCPU_IN_GUEST(r13); \
100 cmpwi r10,0; \
101 bne do_kvm_##n
102
103#define __KVM_HANDLER(area, h, n) \
104do_kvm_##n: \
105 ld r10,area+EX_R10(r13); \
106 stw r9,PACA_KVM_SVCPU+SVCPU_SCRATCH1(r13); \
107 ld r9,area+EX_R9(r13); \
108 std r12,PACA_KVM_SVCPU+SVCPU_SCRATCH0(r13); \
109 li r12,n; \
110 b kvmppc_interrupt
111
112#define __KVM_HANDLER_SKIP(area, h, n) \
113do_kvm_##n: \
114 cmpwi r10,KVM_GUEST_MODE_SKIP; \
115 ld r10,area+EX_R10(r13); \
116 beq 89f; \
117 stw r9,PACA_KVM_SVCPU+SVCPU_SCRATCH1(r13); \
118 ld r9,area+EX_R9(r13); \
119 std r12,PACA_KVM_SVCPU+SVCPU_SCRATCH0(r13); \
120 li r12,n; \
121 b kvmppc_interrupt; \
12289: mtocrf 0x80,r9; \
123 ld r9,area+EX_R9(r13); \
124 b kvmppc_skip_##h##interrupt
125
126#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
127#define KVMTEST(n) __KVMTEST(n)
128#define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
129#define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
130
131#else
132#define KVMTEST(n)
133#define KVM_HANDLER(area, h, n)
134#define KVM_HANDLER_SKIP(area, h, n)
135#endif
136
137#define NOTEST(n)
138
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000139/*
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000140 * The common exception prolog is used for all except a few exceptions
141 * such as a segment miss on a kernel address. We have to be prepared
142 * to take another exception from the point where we first touch the
143 * kernel stack onwards.
144 *
145 * On entry r13 points to the paca, r9-r13 are saved in the paca,
146 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
147 * SRR1, and relocation is on.
148 */
149#define EXCEPTION_PROLOG_COMMON(n, area) \
150 andi. r10,r12,MSR_PR; /* See if coming from user */ \
151 mr r10,r1; /* Save r1 */ \
152 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
153 beq- 1f; \
154 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
1551: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
Paul Mackerras1977b502011-05-01 19:46:44 +0000156 blt+ cr1,3f; /* abort if it is */ \
157 li r1,(n); /* will be reloaded later */ \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000158 sth r1,PACA_TRAP_SAVE(r13); \
Paul Mackerras1977b502011-05-01 19:46:44 +0000159 std r3,area+EX_R3(r13); \
160 addi r3,r13,area; /* r3 -> where regs are saved*/ \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000161 b bad_stack; \
1623: std r9,_CCR(r1); /* save CR in stackframe */ \
163 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
164 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
165 std r10,0(r1); /* make stack chain pointer */ \
166 std r0,GPR0(r1); /* save r0 in stackframe */ \
167 std r10,GPR1(r1); /* save r1 in stackframe */ \
168 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
169 std r2,GPR2(r1); /* save r2 in stackframe */ \
170 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
171 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
172 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
173 ld r10,area+EX_R10(r13); \
174 std r9,GPR9(r1); \
175 std r10,GPR10(r1); \
176 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
177 ld r10,area+EX_R12(r13); \
178 ld r11,area+EX_R13(r13); \
179 std r9,GPR11(r1); \
180 std r10,GPR12(r1); \
181 std r11,GPR13(r1); \
Paul Mackerras48404f22011-05-01 19:48:20 +0000182 BEGIN_FTR_SECTION_NESTED(66); \
183 ld r10,area+EX_CFAR(r13); \
184 std r10,ORIG_GPR3(r1); \
185 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000186 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
187 mflr r9; /* save LR in stackframe */ \
188 std r9,_LINK(r1); \
189 mfctr r10; /* save CTR in stackframe */ \
190 std r10,_CTR(r1); \
191 lbz r10,PACASOFTIRQEN(r13); \
192 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
193 std r10,SOFTE(r1); \
194 std r11,_XER(r1); \
195 li r9,(n)+1; \
196 std r9,_TRAP(r1); /* set trap number */ \
197 li r10,0; \
198 ld r11,exception_marker@toc(r2); \
199 std r10,RESULT(r1); /* clear regs->result */ \
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000200 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
201 ACCOUNT_STOLEN_TIME
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000202
203/*
204 * Exception vectors.
205 */
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000206#define STD_EXCEPTION_PSERIES(loc, vec, label) \
207 . = loc; \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000208 .globl label##_pSeries; \
209label##_pSeries: \
210 HMT_MEDIUM; \
Paul Mackerras673b1892011-04-05 13:59:58 +1000211 SET_SCRATCH0(r13); /* save r13 */ \
Paul Mackerrasb01c8b52011-06-29 00:18:26 +0000212 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
213 EXC_STD, KVMTEST, vec)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000214
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000215#define STD_EXCEPTION_HV(loc, vec, label) \
216 . = loc; \
217 .globl label##_hv; \
218label##_hv: \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000219 HMT_MEDIUM; \
Paul Mackerrasb01c8b52011-06-29 00:18:26 +0000220 SET_SCRATCH0(r13); /* save r13 */ \
221 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
222 EXC_HV, KVMTEST, vec)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000223
Paul Mackerrasb01c8b52011-06-29 00:18:26 +0000224#define __SOFTEN_TEST(h) \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000225 lbz r10,PACASOFTIRQEN(r13); \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000226 cmpwi r10,0; \
Paul Mackerrasb01c8b52011-06-29 00:18:26 +0000227 beq masked_##h##interrupt
228#define _SOFTEN_TEST(h) __SOFTEN_TEST(h)
229
230#define SOFTEN_TEST(vec) \
231 KVMTEST(vec); \
232 _SOFTEN_TEST(EXC_STD)
233
234#define SOFTEN_TEST_HV(vec) \
235 KVMTEST(vec); \
236 _SOFTEN_TEST(EXC_HV)
237
238#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
239 HMT_MEDIUM; \
240 SET_SCRATCH0(r13); /* save r13 */ \
241 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
242 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
243#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
244 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000245
246#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
247 . = loc; \
248 .globl label##_pSeries; \
249label##_pSeries: \
Paul Mackerrasb01c8b52011-06-29 00:18:26 +0000250 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
251 EXC_STD, SOFTEN_TEST)
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000252
253#define MASKABLE_EXCEPTION_HV(loc, vec, label) \
254 . = loc; \
255 .globl label##_hv; \
256label##_hv: \
Paul Mackerrasb01c8b52011-06-29 00:18:26 +0000257 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
258 EXC_HV, SOFTEN_TEST_HV)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000259
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000260#ifdef CONFIG_PPC_ISERIES
261#define DISABLE_INTS \
262 li r11,0; \
263 stb r11,PACASOFTIRQEN(r13); \
264BEGIN_FW_FTR_SECTION; \
265 stb r11,PACAHARDIRQEN(r13); \
266END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
Benjamin Herrenschmidt945feb12008-04-17 14:35:01 +1000267 TRACE_DISABLE_INTS; \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000268BEGIN_FW_FTR_SECTION; \
269 mfmsr r10; \
270 ori r10,r10,MSR_EE; \
271 mtmsrd r10,1; \
272END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000273#else
274#define DISABLE_INTS \
275 li r11,0; \
276 stb r11,PACASOFTIRQEN(r13); \
Benjamin Herrenschmidt945feb12008-04-17 14:35:01 +1000277 stb r11,PACAHARDIRQEN(r13); \
278 TRACE_DISABLE_INTS
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000279#endif /* CONFIG_PPC_ISERIES */
280
281#define ENABLE_INTS \
282 ld r12,_MSR(r1); \
283 mfmsr r11; \
284 rlwimi r11,r12,0,MSR_EE; \
285 mtmsrd r11,1
286
287#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
288 .align 7; \
289 .globl label##_common; \
290label##_common: \
291 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
292 DISABLE_INTS; \
293 bl .save_nvgprs; \
294 addi r3,r1,STACK_FRAME_OVERHEAD; \
295 bl hdlr; \
296 b .ret_from_except
297
298/*
299 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
300 * in the idle task and therefore need the special idle handling.
301 */
302#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
303 .align 7; \
304 .globl label##_common; \
305label##_common: \
306 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
307 FINISH_NAP; \
308 DISABLE_INTS; \
309 bl .save_nvgprs; \
310 addi r3,r1,STACK_FRAME_OVERHEAD; \
311 bl hdlr; \
312 b .ret_from_except
313
314#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
315 .align 7; \
316 .globl label##_common; \
317label##_common: \
318 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
319 FINISH_NAP; \
320 DISABLE_INTS; \
Olof Johanssona4165612007-09-05 12:42:30 +1000321BEGIN_FTR_SECTION \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000322 bl .ppc64_runlatch_on; \
Olof Johanssona4165612007-09-05 12:42:30 +1000323END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000324 addi r3,r1,STACK_FRAME_OVERHEAD; \
325 bl hdlr; \
326 b .ret_from_except_lite
327
328/*
329 * When the idle code in power4_idle puts the CPU into NAP mode,
330 * it has to do so in a loop, and relies on the external interrupt
331 * and decrementer interrupt entry code to get it out of the loop.
332 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
333 * to signal that it is in the loop and needs help to get out.
334 */
335#ifdef CONFIG_PPC_970_NAP
336#define FINISH_NAP \
337BEGIN_FTR_SECTION \
338 clrrdi r11,r1,THREAD_SHIFT; \
339 ld r9,TI_LOCAL_FLAGS(r11); \
340 andi. r10,r9,_TLF_NAPPING; \
341 bnel power4_fixup_nap; \
342END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
343#else
344#define FINISH_NAP
345#endif
346
347#endif /* _ASM_POWERPC_EXCEPTION_H */