blob: d4a5fe42f6e029cc8b5fd3fee975967a1d4dd168 [file] [log] [blame]
Richard Purdie7f137ab2006-10-06 18:38:37 +02001config SND_SOC_AC97_CODEC
2 tristate
Takashi Iwai89fe5112008-05-23 16:10:37 +02003 select SND_AC97_CODEC
Richard Purdie7f137ab2006-10-06 18:38:37 +02004
5config SND_SOC_WM8731
6 tristate
Richard Purdie7f137ab2006-10-06 18:38:37 +02007
8config SND_SOC_WM8750
9 tristate
Richard Purdie7f137ab2006-10-06 18:38:37 +020010
Liam Girdwood33703b72007-04-16 19:18:15 +020011config SND_SOC_WM8753
12 tristate
Liam Girdwood33703b72007-04-16 19:18:15 +020013
Richard Purdie7f137ab2006-10-06 18:38:37 +020014config SND_SOC_WM9712
15 tristate
Timur Tabib0c813c2007-07-31 18:18:44 +020016
Liam Girdwood83ac08c2008-02-15 16:43:11 +010017config SND_SOC_WM9713
18 tristate
Liam Girdwood83ac08c2008-02-15 16:43:11 +010019
Timur Tabib0c813c2007-07-31 18:18:44 +020020# Cirrus Logic CS4270 Codec
21config SND_SOC_CS4270
22 tristate
Timur Tabib0c813c2007-07-31 18:18:44 +020023
24# Cirrus Logic CS4270 Codec Hardware Mute Support
25# Select if you have external muting circuitry attached to your CS4270.
26config SND_SOC_CS4270_HWMUTE
27 bool
28 depends on SND_SOC_CS4270
29
30# Cirrus Logic CS4270 Codec VD = 3.3V Errata
31# Select if you are affected by the errata where the part will not function
32# if MCLK divide-by-1.5 is selected and VD is set to 3.3V. The driver will
33# not select any sample rates that require MCLK to be divided by 1.5.
34config SND_SOC_CS4270_VD33_ERRATA
35 bool
36 depends on SND_SOC_CS4270
37
Vladimir Barinov44d0a872007-11-14 17:07:17 +010038config SND_SOC_TLV320AIC3X
39 tristate
Takashi Iwai89fe5112008-05-23 16:10:37 +020040 depends on I2C