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gerrit-public.fairphone.software / kernel / msm / b8a51e5ee85aaaf9d70a3276f7097650231d6584 / . / sound / soc / codecs / wcd9304-tables.c
blob: 7ec0152d8db3d43bba5d299f4fbaeb0f7a1bfce6 [file] [log] [blame]
Kuirong Wang80dedd62012-12-07 19:16:24 +0530[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
14#include <linux/mfd/wcd9xxx/wcd9304_registers.h>
15#include "wcd9304.h"
16
17const u8 sitar_reg_defaults[SITAR_CACHE_SIZE] = {
18 [WCD9XXX_A_CHIP_CTL] = WCD9XXX_A_CHIP_CTL__POR,
19 [WCD9XXX_A_CHIP_STATUS] = WCD9XXX_A_CHIP_STATUS__POR,
20 [WCD9XXX_A_CHIP_ID_BYTE_0] = WCD9XXX_A_CHIP_ID_BYTE_0__POR,
21 [WCD9XXX_A_CHIP_ID_BYTE_1] = WCD9XXX_A_CHIP_ID_BYTE_1__POR,
22 [WCD9XXX_A_CHIP_ID_BYTE_2] = WCD9XXX_A_CHIP_ID_BYTE_2__POR,
23 [WCD9XXX_A_CHIP_ID_BYTE_3] = WCD9XXX_A_CHIP_ID_BYTE_3__POR,
24 [WCD9XXX_A_CHIP_VERSION] = WCD9XXX_A_CHIP_VERSION__POR,
25 [WCD9XXX_A_SB_VERSION] = WCD9XXX_A_SB_VERSION__POR,
26 [WCD9XXX_A_SLAVE_ID_1] = WCD9XXX_A_SLAVE_ID_1__POR,
27 [WCD9XXX_A_SLAVE_ID_2] = WCD9XXX_A_SLAVE_ID_2__POR,
28 [WCD9XXX_A_SLAVE_ID_3] = WCD9XXX_A_SLAVE_ID_3__POR,
29 [SITAR_A_PIN_CTL_OE0] = SITAR_A_PIN_CTL_OE0__POR,
30 [SITAR_A_PIN_CTL_OE1] = SITAR_A_PIN_CTL_OE1__POR,
31 [SITAR_A_PIN_CTL_DATA0] = SITAR_A_PIN_CTL_DATA0__POR,
32 [SITAR_A_PIN_CTL_DATA1] = SITAR_A_PIN_CTL_DATA1__POR,
33 [SITAR_A_HDRIVE_GENERIC] = SITAR_A_HDRIVE_GENERIC__POR,
34 [SITAR_A_HDRIVE_OVERRIDE] = SITAR_A_HDRIVE_OVERRIDE__POR,
35 [SITAR_A_ANA_CSR_WAIT_STATE] = SITAR_A_ANA_CSR_WAIT_STATE__POR,
36 [SITAR_A_PROCESS_MONITOR_CTL0] = SITAR_A_PROCESS_MONITOR_CTL0__POR,
37 [SITAR_A_PROCESS_MONITOR_CTL1] = SITAR_A_PROCESS_MONITOR_CTL1__POR,
38 [SITAR_A_PROCESS_MONITOR_CTL2] = SITAR_A_PROCESS_MONITOR_CTL2__POR,
39 [SITAR_A_PROCESS_MONITOR_CTL3] = SITAR_A_PROCESS_MONITOR_CTL3__POR,
40 [SITAR_A_QFUSE_CTL] = SITAR_A_QFUSE_CTL__POR,
41 [SITAR_A_QFUSE_STATUS] = SITAR_A_QFUSE_STATUS__POR,
42 [SITAR_A_QFUSE_DATA_OUT0] = SITAR_A_QFUSE_DATA_OUT0__POR,
43 [SITAR_A_QFUSE_DATA_OUT1] = SITAR_A_QFUSE_DATA_OUT1__POR,
44 [SITAR_A_QFUSE_DATA_OUT2] = SITAR_A_QFUSE_DATA_OUT2__POR,
45 [SITAR_A_QFUSE_DATA_OUT3] = SITAR_A_QFUSE_DATA_OUT3__POR,
46 [SITAR_A_CDC_CTL] = SITAR_A_CDC_CTL__POR,
47 [SITAR_A_LEAKAGE_CTL] = SITAR_A_LEAKAGE_CTL__POR,
48 [SITAR_A_INTR_MODE] = SITAR_A_INTR_MODE__POR,
49 [SITAR_A_INTR_MASK0] = SITAR_A_INTR_MASK0__POR,
50 [SITAR_A_INTR_MASK1] = SITAR_A_INTR_MASK1__POR,
51 [SITAR_A_INTR_MASK2] = SITAR_A_INTR_MASK2__POR,
52 [SITAR_A_INTR_STATUS0] = SITAR_A_INTR_STATUS0__POR,
53 [SITAR_A_INTR_STATUS1] = SITAR_A_INTR_STATUS1__POR,
54 [SITAR_A_INTR_STATUS2] = SITAR_A_INTR_STATUS2__POR,
55 [SITAR_A_INTR_CLEAR0] = SITAR_A_INTR_CLEAR0__POR,
56 [SITAR_A_INTR_CLEAR1] = SITAR_A_INTR_CLEAR1__POR,
57 [SITAR_A_INTR_CLEAR2] = SITAR_A_INTR_CLEAR2__POR,
58 [SITAR_A_INTR_LEVEL0] = SITAR_A_INTR_LEVEL0__POR,
59 [SITAR_A_INTR_LEVEL1] = SITAR_A_INTR_LEVEL1__POR,
60 [SITAR_A_INTR_LEVEL2] = SITAR_A_INTR_LEVEL2__POR,
61 [SITAR_A_INTR_TEST0] = SITAR_A_INTR_TEST0__POR,
62 [SITAR_A_INTR_TEST1] = SITAR_A_INTR_TEST1__POR,
63 [SITAR_A_INTR_TEST2] = SITAR_A_INTR_TEST2__POR,
64 [SITAR_A_INTR_SET0] = SITAR_A_INTR_SET0__POR,
65 [SITAR_A_INTR_SET1] = SITAR_A_INTR_SET1__POR,
66 [SITAR_A_INTR_SET2] = SITAR_A_INTR_SET2__POR,
67 [SITAR_A_CDC_TX_I2S_SCK_MODE] = SITAR_A_CDC_TX_I2S_SCK_MODE__POR,
68 [SITAR_A_CDC_TX_I2S_WS_MODE] = SITAR_A_CDC_TX_I2S_WS_MODE__POR,
69 [SITAR_A_CDC_DMIC_DATA0_MODE] = SITAR_A_CDC_DMIC_DATA0_MODE__POR,
70 [SITAR_A_CDC_DMIC_CLK0_MODE] = SITAR_A_CDC_DMIC_CLK0_MODE__POR,
71 [SITAR_A_CDC_DMIC_DATA1_MODE] = SITAR_A_CDC_DMIC_DATA1_MODE__POR,
72 [SITAR_A_CDC_DMIC_CLK1_MODE] = SITAR_A_CDC_DMIC_CLK1_MODE__POR,
73 [SITAR_A_CDC_TX_I2S_SD0_MODE] = SITAR_A_CDC_TX_I2S_SD0_MODE__POR,
74 [SITAR_A_CDC_INTR_MODE] = SITAR_A_CDC_INTR_MODE__POR,
75 [SITAR_A_CDC_RX_I2S_SD0_MODE] = SITAR_A_CDC_RX_I2S_SD0_MODE__POR,
76 [SITAR_A_CDC_RX_I2S_SD1_MODE] = SITAR_A_CDC_RX_I2S_SD1_MODE__POR,
77 [SITAR_A_BIAS_REF_CTL] = SITAR_A_BIAS_REF_CTL__POR,
78 [SITAR_A_BIAS_CENTRAL_BG_CTL] = SITAR_A_BIAS_CENTRAL_BG_CTL__POR,
79 [SITAR_A_BIAS_PRECHRG_CTL] = SITAR_A_BIAS_PRECHRG_CTL__POR,
80 [SITAR_A_BIAS_CURR_CTL_1] = SITAR_A_BIAS_CURR_CTL_1__POR,
81 [SITAR_A_BIAS_CURR_CTL_2] = SITAR_A_BIAS_CURR_CTL_2__POR,
82 [SITAR_A_BIAS_OSC_BG_CTL] = SITAR_A_BIAS_OSC_BG_CTL__POR,
83 [SITAR_A_CLK_BUFF_EN1] = SITAR_A_CLK_BUFF_EN1__POR,
84 [SITAR_A_CLK_BUFF_EN2] = SITAR_A_CLK_BUFF_EN2__POR,
85 [SITAR_A_LDO_H_MODE_1] = SITAR_A_LDO_H_MODE_1__POR,
86 [SITAR_A_LDO_H_MODE_2] = SITAR_A_LDO_H_MODE_2__POR,
87 [SITAR_A_LDO_H_LOOP_CTL] = SITAR_A_LDO_H_LOOP_CTL__POR,
88 [SITAR_A_LDO_H_COMP_1] = SITAR_A_LDO_H_COMP_1__POR,
89 [SITAR_A_LDO_H_COMP_2] = SITAR_A_LDO_H_COMP_2__POR,
90 [SITAR_A_LDO_H_BIAS_1] = SITAR_A_LDO_H_BIAS_1__POR,
91 [SITAR_A_LDO_H_BIAS_2] = SITAR_A_LDO_H_BIAS_2__POR,
92 [SITAR_A_LDO_H_BIAS_3] = SITAR_A_LDO_H_BIAS_3__POR,
93 [SITAR_A_MICB_CFILT_1_CTL] = SITAR_A_MICB_CFILT_1_CTL__POR,
94 [SITAR_A_MICB_CFILT_1_VAL] = SITAR_A_MICB_CFILT_1_VAL__POR,
95 [SITAR_A_MICB_CFILT_1_PRECHRG] = SITAR_A_MICB_CFILT_1_PRECHRG__POR,
96 [SITAR_A_MICB_1_CTL] = SITAR_A_MICB_1_CTL__POR,
97 [SITAR_A_MICB_1_INT_RBIAS] = SITAR_A_MICB_1_INT_RBIAS__POR,
98 [SITAR_A_MICB_1_MBHC] = SITAR_A_MICB_1_MBHC__POR,
99 [SITAR_A_MICB_CFILT_2_CTL] = SITAR_A_MICB_CFILT_2_CTL__POR,
100 [SITAR_A_MICB_CFILT_2_VAL] = SITAR_A_MICB_CFILT_2_VAL__POR,
101 [SITAR_A_MICB_CFILT_2_PRECHRG] = SITAR_A_MICB_CFILT_2_PRECHRG__POR,
102 [SITAR_A_MICB_2_CTL] = SITAR_A_MICB_2_CTL__POR,
103 [SITAR_A_MICB_2_INT_RBIAS] = SITAR_A_MICB_2_INT_RBIAS__POR,
104 [SITAR_A_MICB_2_MBHC] = SITAR_A_MICB_2_MBHC__POR,
105 [SITAR_A_TX_COM_BIAS] = SITAR_A_TX_COM_BIAS__POR,
106 [SITAR_A_MBHC_SCALING_MUX_1] = SITAR_A_MBHC_SCALING_MUX_1__POR,
107 [SITAR_A_MBHC_SCALING_MUX_2] = SITAR_A_MBHC_SCALING_MUX_2__POR,
108 [SITAR_A_TX_SUP_SWITCH_CTRL_1] = SITAR_A_TX_SUP_SWITCH_CTRL_1__POR,
109 [SITAR_A_TX_SUP_SWITCH_CTRL_2] = SITAR_A_TX_SUP_SWITCH_CTRL_2__POR,
110 [SITAR_A_TX_1_2_EN] = SITAR_A_TX_1_2_EN__POR,
111 [SITAR_A_TX_1_2_TEST_EN] = SITAR_A_TX_1_2_TEST_EN__POR,
112 [SITAR_A_TX_1_2_ADC_CH1] = SITAR_A_TX_1_2_ADC_CH1__POR,
113 [SITAR_A_TX_1_2_ADC_CH2] = SITAR_A_TX_1_2_ADC_CH2__POR,
114 [SITAR_A_TX_1_2_ATEST_REFCTRL] = SITAR_A_TX_1_2_ATEST_REFCTRL__POR,
115 [SITAR_A_TX_1_2_TEST_CTL] = SITAR_A_TX_1_2_TEST_CTL__POR,
116 [SITAR_A_TX_1_2_TEST_BLOCK_EN] = SITAR_A_TX_1_2_TEST_BLOCK_EN__POR,
117 [SITAR_A_TX_1_2_TXFE_CLKDIV] = SITAR_A_TX_1_2_TXFE_CLKDIV__POR,
118 [SITAR_A_TX_1_2_SAR_ERR_CH1] = SITAR_A_TX_1_2_SAR_ERR_CH1__POR,
119 [SITAR_A_TX_1_2_SAR_ERR_CH2] = SITAR_A_TX_1_2_SAR_ERR_CH2__POR,
120 [SITAR_A_TX_3_EN] = SITAR_A_TX_3_EN__POR,
121 [SITAR_A_TX_3_TEST_EN] = SITAR_A_TX_3_TEST_EN__POR,
122 [SITAR_A_TX_3_ADC] = SITAR_A_TX_3_ADC__POR,
123 [SITAR_A_TX_3_MBHC_ATEST_REFCTRL] =
124 SITAR_A_TX_3_MBHC_ATEST_REFCTRL__POR,
125 [SITAR_A_TX_3_TEST_CTL] = SITAR_A_TX_3_TEST_CTL__POR,
126 [SITAR_A_TX_3_TEST_BLOCK_EN] = SITAR_A_TX_3_TEST_BLOCK_EN__POR,
127 [SITAR_A_TX_3_TXFE_CKDIV] = SITAR_A_TX_3_TXFE_CKDIV__POR,
128 [SITAR_A_TX_3_SAR_ERR] = SITAR_A_TX_3_SAR_ERR__POR,
129 [SITAR_A_TX_4_MBHC_EN] = SITAR_A_TX_4_MBHC_EN__POR,
130 [SITAR_A_TX_4_MBHC_ADC] = SITAR_A_TX_4_MBHC_ADC__POR,
131 [SITAR_A_TX_4_MBHC_TEST_CTL] = SITAR_A_TX_4_MBHC_TEST_CTL__POR,
132 [SITAR_A_TX_4_MBHC_SAR_ERR] = SITAR_A_TX_4_MBHC_SAR_ERR__POR,
133 [SITAR_A_TX_4_TXFE_CLKDIV] = SITAR_A_TX_4_TXFE_CLKDIV__POR,
134 [SITAR_A_AUX_COM_CTL] = SITAR_A_AUX_COM_CTL__POR,
135 [SITAR_A_AUX_COM_ATEST] = SITAR_A_AUX_COM_ATEST__POR,
136 [SITAR_A_AUX_L_EN] = SITAR_A_AUX_L_EN__POR,
137 [SITAR_A_AUX_L_GAIN] = SITAR_A_AUX_L_GAIN__POR,
138 [SITAR_A_AUX_L_PA_CONN] = SITAR_A_AUX_L_PA_CONN__POR,
139 [SITAR_A_AUX_L_PA_CONN_INV] = SITAR_A_AUX_L_PA_CONN_INV__POR,
140 [SITAR_A_AUX_R_EN] = SITAR_A_AUX_R_EN__POR,
141 [SITAR_A_AUX_R_GAIN] = SITAR_A_AUX_R_GAIN__POR,
142 [SITAR_A_AUX_R_PA_CONN] = SITAR_A_AUX_R_PA_CONN__POR,
143 [SITAR_A_AUX_R_PA_CONN_INV] = SITAR_A_AUX_R_PA_CONN_INV__POR,
144 [SITAR_A_CP_EN] = SITAR_A_CP_EN__POR,
145 [SITAR_A_CP_CLK] = SITAR_A_CP_CLK__POR,
146 [SITAR_A_CP_STATIC] = SITAR_A_CP_STATIC__POR,
147 [SITAR_A_CP_DCC1] = SITAR_A_CP_DCC1__POR,
148 [SITAR_A_CP_DCC3] = SITAR_A_CP_DCC3__POR,
149 [SITAR_A_CP_ATEST] = SITAR_A_CP_ATEST__POR,
150 [SITAR_A_CP_DTEST] = SITAR_A_CP_DTEST__POR,
151 [SITAR_A_RX_COM_TIMER_DIV] = SITAR_A_RX_COM_TIMER_DIV__POR,
152 [SITAR_A_RX_COM_OCP_CTL] = SITAR_A_RX_COM_OCP_CTL__POR,
153 [SITAR_A_RX_COM_OCP_COUNT] = SITAR_A_RX_COM_OCP_COUNT__POR,
154 [SITAR_A_RX_COM_DAC_CTL] = SITAR_A_RX_COM_DAC_CTL__POR,
155 [SITAR_A_RX_COM_BIAS] = SITAR_A_RX_COM_BIAS__POR,
156 [SITAR_A_RX_HPH_BIAS_PA] = SITAR_A_RX_HPH_BIAS_PA__POR,
157 [SITAR_A_RX_HPH_BIAS_LDO] = SITAR_A_RX_HPH_BIAS_LDO__POR,
158 [SITAR_A_RX_HPH_BIAS_CNP] = SITAR_A_RX_HPH_BIAS_CNP__POR,
159 [SITAR_A_RX_HPH_BIAS_WG] = SITAR_A_RX_HPH_BIAS_WG__POR,
160 [SITAR_A_RX_HPH_OCP_CTL] = SITAR_A_RX_HPH_OCP_CTL__POR,
161 [SITAR_A_RX_HPH_CNP_EN] = SITAR_A_RX_HPH_CNP_EN__POR,
162 [SITAR_A_RX_HPH_CNP_WG_CTL] = SITAR_A_RX_HPH_CNP_WG_CTL__POR,
163 [SITAR_A_RX_HPH_CNP_WG_TIME] = SITAR_A_RX_HPH_CNP_WG_TIME__POR,
164 [SITAR_A_RX_HPH_L_GAIN] = SITAR_A_RX_HPH_L_GAIN__POR,
165 [SITAR_A_RX_HPH_L_TEST] = SITAR_A_RX_HPH_L_TEST__POR,
166 [SITAR_A_RX_HPH_L_PA_CTL] = SITAR_A_RX_HPH_L_PA_CTL__POR,
167 [SITAR_A_RX_HPH_L_DAC_CTL] = SITAR_A_RX_HPH_L_DAC_CTL__POR,
168 [SITAR_A_RX_HPH_L_ATEST] = SITAR_A_RX_HPH_L_ATEST__POR,
169 [SITAR_A_RX_HPH_L_STATUS] = SITAR_A_RX_HPH_L_STATUS__POR,
170 [SITAR_A_RX_HPH_R_GAIN] = SITAR_A_RX_HPH_R_GAIN__POR,
171 [SITAR_A_RX_HPH_R_TEST] = SITAR_A_RX_HPH_R_TEST__POR,
172 [SITAR_A_RX_HPH_R_PA_CTL] = SITAR_A_RX_HPH_R_PA_CTL__POR,
173 [SITAR_A_RX_HPH_R_DAC_CTL] = SITAR_A_RX_HPH_R_DAC_CTL__POR,
174 [SITAR_A_RX_HPH_R_ATEST] = SITAR_A_RX_HPH_R_ATEST__POR,
175 [SITAR_A_RX_HPH_R_STATUS] = SITAR_A_RX_HPH_R_STATUS__POR,
176 [SITAR_A_RX_EAR_BIAS_PA] = SITAR_A_RX_EAR_BIAS_PA__POR,
177 [SITAR_A_RX_EAR_BIAS_CMBUFF] = SITAR_A_RX_EAR_BIAS_CMBUFF__POR,
178 [SITAR_A_RX_EAR_EN] = SITAR_A_RX_EAR_EN__POR,
179 [SITAR_A_RX_EAR_GAIN] = SITAR_A_RX_EAR_GAIN__POR,
180 [SITAR_A_RX_EAR_CMBUFF] = SITAR_A_RX_EAR_CMBUFF__POR,
181 [SITAR_A_RX_EAR_ICTL] = SITAR_A_RX_EAR_ICTL__POR,
182 [SITAR_A_RX_EAR_CCOMP] = SITAR_A_RX_EAR_CCOMP__POR,
183 [SITAR_A_RX_EAR_VCM] = SITAR_A_RX_EAR_VCM__POR,
184 [SITAR_A_RX_EAR_CNP] = SITAR_A_RX_EAR_CNP__POR,
185 [SITAR_A_RX_EAR_ATEST] = SITAR_A_RX_EAR_ATEST__POR,
186 [SITAR_A_RX_EAR_STATUS] = SITAR_A_RX_EAR_STATUS__POR,
187 [SITAR_A_RX_LINE_BIAS_PA] = SITAR_A_RX_LINE_BIAS_PA__POR,
188 [SITAR_A_RX_LINE_BIAS_LDO] = SITAR_A_RX_LINE_BIAS_LDO__POR,
189 [SITAR_A_RX_LINE_BIAS_CNP1] = SITAR_A_RX_LINE_BIAS_CNP1__POR,
190 [SITAR_A_RX_LINE_COM] = SITAR_A_RX_LINE_COM__POR,
191 [SITAR_A_RX_LINE_CNP_EN] = SITAR_A_RX_LINE_CNP_EN__POR,
192 [SITAR_A_RX_LINE_CNP_WG_CTL] = SITAR_A_RX_LINE_CNP_WG_CTL__POR,
193 [SITAR_A_RX_LINE_CNP_WG_TIME] = SITAR_A_RX_LINE_CNP_WG_TIME__POR,
194 [SITAR_A_RX_LINE_1_GAIN] = SITAR_A_RX_LINE_1_GAIN__POR,
195 [SITAR_A_RX_LINE_1_TEST] = SITAR_A_RX_LINE_1_TEST__POR,
196 [SITAR_A_RX_LINE_1_DAC_CTL] = SITAR_A_RX_LINE_1_DAC_CTL__POR,
197 [SITAR_A_RX_LINE_1_STATUS] = SITAR_A_RX_LINE_1_STATUS__POR,
198 [SITAR_A_RX_LINE_2_GAIN] = SITAR_A_RX_LINE_2_GAIN__POR,
199 [SITAR_A_RX_LINE_2_TEST] = SITAR_A_RX_LINE_2_TEST__POR,
200 [SITAR_A_RX_LINE_2_DAC_CTL] = SITAR_A_RX_LINE_2_DAC_CTL__POR,
201 [SITAR_A_RX_LINE_2_STATUS] = SITAR_A_RX_LINE_2_STATUS__POR,
202 [SITAR_A_RX_LINE_BIAS_CNP2] = SITAR_A_RX_LINE_BIAS_CNP2__POR,
203 [SITAR_A_RX_LINE_OCP_CTL] = SITAR_A_RX_LINE_OCP_CTL__POR,
204 [SITAR_A_RX_LINE_1_PA_CTL] = SITAR_A_RX_LINE_1_PA_CTL__POR,
205 [SITAR_A_RX_LINE_2_PA_CTL] = SITAR_A_RX_LINE_2_PA_CTL__POR,
206 [SITAR_A_RX_LINE_CNP_DBG] = SITAR_A_RX_LINE_CNP_DBG__POR,
207 [SITAR_A_MBHC_HPH] = SITAR_A_MBHC_HPH__POR,
208 [SITAR_A_RC_OSC_FREQ] = SITAR_A_RC_OSC_FREQ__POR,
209 [SITAR_A_RC_OSC_TEST] = SITAR_A_RC_OSC_TEST__POR,
210 [SITAR_A_RC_OSC_STATUS] = SITAR_A_RC_OSC_STATUS__POR,
211 [SITAR_A_RC_OSC_TUNER] = SITAR_A_RC_OSC_TUNER__POR,
212 [SITAR_A_CDC_ANC1_CTL] = SITAR_A_CDC_ANC1_CTL__POR,
213 [SITAR_A_CDC_ANC1_SHIFT] = SITAR_A_CDC_ANC1_SHIFT__POR,
214 [SITAR_A_CDC_ANC1_IIR_B1_CTL] = SITAR_A_CDC_ANC1_IIR_B1_CTL__POR,
215 [SITAR_A_CDC_ANC1_IIR_B2_CTL] = SITAR_A_CDC_ANC1_IIR_B2_CTL__POR,
216 [SITAR_A_CDC_ANC1_IIR_B3_CTL] = SITAR_A_CDC_ANC1_IIR_B3_CTL__POR,
217 [SITAR_A_CDC_ANC1_IIR_B4_CTL] = SITAR_A_CDC_ANC1_IIR_B4_CTL__POR,
218 [SITAR_A_CDC_ANC1_LPF_B1_CTL] = SITAR_A_CDC_ANC1_LPF_B1_CTL__POR,
219 [SITAR_A_CDC_ANC1_LPF_B2_CTL] = SITAR_A_CDC_ANC1_LPF_B2_CTL__POR,
220 [SITAR_A_CDC_ANC1_LPF_B3_CTL] = SITAR_A_CDC_ANC1_LPF_B3_CTL__POR,
221 [SITAR_A_CDC_ANC1_SPARE] = SITAR_A_CDC_ANC1_SPARE__POR,
222 [SITAR_A_CDC_ANC1_SMLPF_CTL] = SITAR_A_CDC_ANC1_SMLPF_CTL__POR,
223 [SITAR_A_CDC_ANC1_DCFLT_CTL] = SITAR_A_CDC_ANC1_DCFLT_CTL__POR,
224 [SITAR_A_CDC_TX1_VOL_CTL_TIMER] = SITAR_A_CDC_TX1_VOL_CTL_TIMER__POR,
225 [SITAR_A_CDC_TX1_VOL_CTL_GAIN] = SITAR_A_CDC_TX1_VOL_CTL_GAIN__POR,
226 [SITAR_A_CDC_TX1_VOL_CTL_CFG] = SITAR_A_CDC_TX1_VOL_CTL_CFG__POR,
227 [SITAR_A_CDC_TX1_MUX_CTL] = SITAR_A_CDC_TX1_MUX_CTL__POR,
228 [SITAR_A_CDC_TX1_CLK_FS_CTL] = SITAR_A_CDC_TX1_CLK_FS_CTL__POR,
229 [SITAR_A_CDC_TX1_DMIC_CTL] = SITAR_A_CDC_TX1_DMIC_CTL__POR,
230 [SITAR_A_CDC_SRC1_PDA_CFG] = SITAR_A_CDC_SRC1_PDA_CFG__POR,
231 [SITAR_A_CDC_SRC1_FS_CTL] = SITAR_A_CDC_SRC1_FS_CTL__POR,
232 [SITAR_A_CDC_RX1_B1_CTL] = SITAR_A_CDC_RX1_B1_CTL__POR,
233 [SITAR_A_CDC_RX1_B2_CTL] = SITAR_A_CDC_RX1_B2_CTL__POR,
234 [SITAR_A_CDC_RX1_B3_CTL] = SITAR_A_CDC_RX1_B3_CTL__POR,
235 [SITAR_A_CDC_RX1_B4_CTL] = SITAR_A_CDC_RX1_B4_CTL__POR,
236 [SITAR_A_CDC_RX1_B5_CTL] = SITAR_A_CDC_RX1_B5_CTL__POR,
237 [SITAR_A_CDC_RX1_B6_CTL] = SITAR_A_CDC_RX1_B6_CTL__POR,
Kuirong Wang80dedd62012-12-07 19:16:24 +0530[diff] [blame]238 [SITAR_A_CDC_RX2_B1_CTL] = SITAR_A_CDC_RX2_B1_CTL__POR,
239 [SITAR_A_CDC_RX2_B2_CTL] = SITAR_A_CDC_RX2_B2_CTL__POR,
240 [SITAR_A_CDC_RX2_B3_CTL] = SITAR_A_CDC_RX2_B3_CTL__POR,
241 [SITAR_A_CDC_RX2_B4_CTL] = SITAR_A_CDC_RX2_B4_CTL__POR,
242 [SITAR_A_CDC_RX2_B5_CTL] = SITAR_A_CDC_RX2_B5_CTL__POR,
243 [SITAR_A_CDC_RX2_B6_CTL] = SITAR_A_CDC_RX2_B6_CTL__POR,
244 [SITAR_A_CDC_RX3_B1_CTL] = SITAR_A_CDC_RX3_B1_CTL__POR,
245 [SITAR_A_CDC_RX3_B2_CTL] = SITAR_A_CDC_RX3_B2_CTL__POR,
246 [SITAR_A_CDC_RX3_B3_CTL] = SITAR_A_CDC_RX3_B3_CTL__POR,
247 [SITAR_A_CDC_RX3_B4_CTL] = SITAR_A_CDC_RX3_B4_CTL__POR,
248 [SITAR_A_CDC_RX3_B5_CTL] = SITAR_A_CDC_RX3_B5_CTL__POR,
249 [SITAR_A_CDC_RX3_B6_CTL] = SITAR_A_CDC_RX3_B6_CTL__POR,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]250 [SITAR_A_CDC_RX1_VOL_CTL_B1_CTL] = SITAR_A_CDC_RX1_VOL_CTL_B1_CTL__POR,
251 [SITAR_A_CDC_RX1_VOL_CTL_B2_CTL] = SITAR_A_CDC_RX1_VOL_CTL_B2_CTL__POR,
Kuirong Wang80dedd62012-12-07 19:16:24 +0530[diff] [blame]252 [SITAR_A_CDC_RX2_VOL_CTL_B1_CTL] = SITAR_A_CDC_RX2_VOL_CTL_B1_CTL__POR,
253 [SITAR_A_CDC_RX2_VOL_CTL_B2_CTL] = SITAR_A_CDC_RX2_VOL_CTL_B2_CTL__POR,
254 [SITAR_A_CDC_RX3_VOL_CTL_B1_CTL] = SITAR_A_CDC_RX3_VOL_CTL_B1_CTL__POR,
255 [SITAR_A_CDC_RX3_VOL_CTL_B2_CTL] = SITAR_A_CDC_RX3_VOL_CTL_B2_CTL__POR,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]256 [SITAR_A_CDC_CLK_ANC_RESET_CTL] = SITAR_A_CDC_CLK_ANC_RESET_CTL__POR,
257 [SITAR_A_CDC_CLK_RX_RESET_CTL] = SITAR_A_CDC_CLK_RX_RESET_CTL__POR,
258 [SITAR_A_CDC_CLK_TX_RESET_B1_CTL] =
259 SITAR_A_CDC_CLK_TX_RESET_B1_CTL__POR,
260 [SITAR_A_CDC_CLK_TX_RESET_B2_CTL] =
261 SITAR_A_CDC_CLK_TX_RESET_B2_CTL__POR,
262 [SITAR_A_CDC_CLK_DMIC_CTL] = SITAR_A_CDC_CLK_DMIC_CTL__POR,
263 [SITAR_A_CDC_CLK_RX_I2S_CTL] = SITAR_A_CDC_CLK_RX_I2S_CTL__POR,
264 [SITAR_A_CDC_CLK_TX_I2S_CTL] = SITAR_A_CDC_CLK_TX_I2S_CTL__POR,
265 [SITAR_A_CDC_CLK_OTHR_RESET_CTL] = SITAR_A_CDC_CLK_OTHR_RESET_CTL__POR,
266 [SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL] =
267 SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR,
268 [SITAR_A_CDC_CLK_OTHR_CTL] = SITAR_A_CDC_CLK_OTHR_CTL__POR,
269 [SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL] =
270 SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL__POR,
271 [SITAR_A_CDC_CLK_ANC_CLK_EN_CTL] = SITAR_A_CDC_CLK_ANC_CLK_EN_CTL__POR,
272 [SITAR_A_CDC_CLK_RX_B1_CTL] = SITAR_A_CDC_CLK_RX_B1_CTL__POR,
273 [SITAR_A_CDC_CLK_RX_B2_CTL] = SITAR_A_CDC_CLK_RX_B2_CTL__POR,
274 [SITAR_A_CDC_CLK_MCLK_CTL] = SITAR_A_CDC_CLK_MCLK_CTL__POR,
275 [SITAR_A_CDC_CLK_PDM_CTL] = SITAR_A_CDC_CLK_PDM_CTL__POR,
276 [SITAR_A_CDC_CLK_SD_CTL] = SITAR_A_CDC_CLK_SD_CTL__POR,
277 [SITAR_A_CDC_CLK_LP_CTL] = SITAR_A_CDC_CLK_LP_CTL__POR,
278 [SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL] =
279 SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL__POR,
280 [SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL] =
281 SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL__POR,
282 [SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL] =
283 SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL__POR,
284 [SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL] =
285 SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL__POR,
286 [SITAR_A_CDC_CLSG_GAIN_THRESH_CTL] =
287 SITAR_A_CDC_CLSG_GAIN_THRESH_CTL__POR,
288 [SITAR_A_CDC_CLSG_TIMER_B1_CFG] = SITAR_A_CDC_CLSG_TIMER_B1_CFG__POR,
289 [SITAR_A_CDC_CLSG_TIMER_B2_CFG] = SITAR_A_CDC_CLSG_TIMER_B2_CFG__POR,
290 [SITAR_A_CDC_CLSG_CTL] = SITAR_A_CDC_CLSG_CTL__POR,
291 [SITAR_A_CDC_IIR1_GAIN_B1_CTL] = SITAR_A_CDC_IIR1_GAIN_B1_CTL__POR,
292 [SITAR_A_CDC_IIR1_GAIN_B2_CTL] = SITAR_A_CDC_IIR1_GAIN_B2_CTL__POR,
293 [SITAR_A_CDC_IIR1_GAIN_B3_CTL] = SITAR_A_CDC_IIR1_GAIN_B3_CTL__POR,
294 [SITAR_A_CDC_IIR1_GAIN_B4_CTL] = SITAR_A_CDC_IIR1_GAIN_B4_CTL__POR,
295 [SITAR_A_CDC_IIR1_GAIN_B5_CTL] = SITAR_A_CDC_IIR1_GAIN_B5_CTL__POR,
296 [SITAR_A_CDC_IIR1_GAIN_B6_CTL] = SITAR_A_CDC_IIR1_GAIN_B6_CTL__POR,
297 [SITAR_A_CDC_IIR1_GAIN_B7_CTL] = SITAR_A_CDC_IIR1_GAIN_B7_CTL__POR,
298 [SITAR_A_CDC_IIR1_GAIN_B8_CTL] = SITAR_A_CDC_IIR1_GAIN_B8_CTL__POR,
299 [SITAR_A_CDC_IIR1_CTL] = SITAR_A_CDC_IIR1_CTL__POR,
300 [SITAR_A_CDC_IIR1_GAIN_TIMER_CTL] =
301 SITAR_A_CDC_IIR1_GAIN_TIMER_CTL__POR,
302 [SITAR_A_CDC_IIR1_COEF_B1_CTL] = SITAR_A_CDC_IIR1_COEF_B1_CTL__POR,
303 [SITAR_A_CDC_IIR1_COEF_B2_CTL] = SITAR_A_CDC_IIR1_COEF_B2_CTL__POR,
304 [SITAR_A_CDC_IIR1_COEF_B3_CTL] = SITAR_A_CDC_IIR1_COEF_B3_CTL__POR,
305 [SITAR_A_CDC_IIR1_COEF_B4_CTL] = SITAR_A_CDC_IIR1_COEF_B4_CTL__POR,
306 [SITAR_A_CDC_IIR1_COEF_B5_CTL] = SITAR_A_CDC_IIR1_COEF_B5_CTL__POR,
Asish Bhattacharyaa7354892012-05-28 12:49:01 +0530[diff] [blame]307 [SITAR_A_CDC_IIR2_GAIN_B1_CTL] = SITAR_A_CDC_IIR2_GAIN_B1_CTL__POR,
308 [SITAR_A_CDC_IIR2_GAIN_B2_CTL] = SITAR_A_CDC_IIR2_GAIN_B2_CTL__POR,
309 [SITAR_A_CDC_IIR2_GAIN_B3_CTL] = SITAR_A_CDC_IIR2_GAIN_B3_CTL__POR,
310 [SITAR_A_CDC_IIR2_GAIN_B4_CTL] = SITAR_A_CDC_IIR2_GAIN_B4_CTL__POR,
311 [SITAR_A_CDC_IIR2_GAIN_B5_CTL] = SITAR_A_CDC_IIR2_GAIN_B5_CTL__POR,
312 [SITAR_A_CDC_IIR2_GAIN_B6_CTL] = SITAR_A_CDC_IIR2_GAIN_B6_CTL__POR,
313 [SITAR_A_CDC_IIR2_GAIN_B7_CTL] = SITAR_A_CDC_IIR2_GAIN_B7_CTL__POR,
314 [SITAR_A_CDC_IIR2_GAIN_B8_CTL] = SITAR_A_CDC_IIR2_GAIN_B8_CTL__POR,
315 [SITAR_A_CDC_IIR2_CTL] = SITAR_A_CDC_IIR2_CTL__POR,
316 [SITAR_A_CDC_IIR2_GAIN_TIMER_CTL] =
317 SITAR_A_CDC_IIR2_GAIN_TIMER_CTL__POR,
318 [SITAR_A_CDC_IIR2_COEF_B1_CTL] = SITAR_A_CDC_IIR2_COEF_B1_CTL__POR,
319 [SITAR_A_CDC_IIR2_COEF_B2_CTL] = SITAR_A_CDC_IIR2_COEF_B2_CTL__POR,
320 [SITAR_A_CDC_IIR2_COEF_B3_CTL] = SITAR_A_CDC_IIR2_COEF_B3_CTL__POR,
321 [SITAR_A_CDC_IIR2_COEF_B4_CTL] = SITAR_A_CDC_IIR2_COEF_B4_CTL__POR,
322 [SITAR_A_CDC_IIR2_COEF_B5_CTL] = SITAR_A_CDC_IIR2_COEF_B5_CTL__POR,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]323 [SITAR_A_CDC_TOP_GAIN_UPDATE] = SITAR_A_CDC_TOP_GAIN_UPDATE__POR,
324 [SITAR_A_CDC_TOP_RDAC_DOUT_CTL] = SITAR_A_CDC_TOP_RDAC_DOUT_CTL__POR,
325 [SITAR_A_CDC_DEBUG_B1_CTL] = SITAR_A_CDC_DEBUG_B1_CTL__POR,
326 [SITAR_A_CDC_DEBUG_B2_CTL] = SITAR_A_CDC_DEBUG_B2_CTL__POR,
327 [SITAR_A_CDC_DEBUG_B3_CTL] = SITAR_A_CDC_DEBUG_B3_CTL__POR,
328 [SITAR_A_CDC_DEBUG_B4_CTL] = SITAR_A_CDC_DEBUG_B4_CTL__POR,
329 [SITAR_A_CDC_DEBUG_B5_CTL] = SITAR_A_CDC_DEBUG_B5_CTL__POR,
330 [SITAR_A_CDC_DEBUG_B6_CTL] = SITAR_A_CDC_DEBUG_B6_CTL__POR,
331 [SITAR_A_CDC_DEBUG_B7_CTL] = SITAR_A_CDC_DEBUG_B7_CTL__POR,
332 [SITAR_A_CDC_COMP1_B1_CTL] = SITAR_A_CDC_COMP1_B1_CTL__POR,
333 [SITAR_A_CDC_COMP1_B2_CTL] = SITAR_A_CDC_COMP1_B2_CTL__POR,
334 [SITAR_A_CDC_COMP1_B3_CTL] = SITAR_A_CDC_COMP1_B3_CTL__POR,
335 [SITAR_A_CDC_COMP1_B4_CTL] = SITAR_A_CDC_COMP1_B4_CTL__POR,
336 [SITAR_A_CDC_COMP1_B5_CTL] = SITAR_A_CDC_COMP1_B5_CTL__POR,
337 [SITAR_A_CDC_COMP1_B6_CTL] = SITAR_A_CDC_COMP1_B6_CTL__POR,
338 [SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS] =
339 SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS__POR,
340 [SITAR_A_CDC_COMP1_FS_CFG] = SITAR_A_CDC_COMP1_FS_CFG__POR,
Kuirong Wang80dedd62012-12-07 19:16:24 +0530[diff] [blame]341 [SITAR_A_CDC_COMP2_B1_CTL] = SITAR_A_CDC_COMP2_B1_CTL__POR,
342 [SITAR_A_CDC_COMP2_B2_CTL] = SITAR_A_CDC_COMP2_B2_CTL__POR,
343 [SITAR_A_CDC_COMP2_B3_CTL] = SITAR_A_CDC_COMP2_B3_CTL__POR,
344 [SITAR_A_CDC_COMP2_B4_CTL] = SITAR_A_CDC_COMP2_B4_CTL__POR,
345 [SITAR_A_CDC_COMP2_B5_CTL] = SITAR_A_CDC_COMP2_B5_CTL__POR,
346 [SITAR_A_CDC_COMP2_B6_CTL] = SITAR_A_CDC_COMP2_B6_CTL__POR,
347 [SITAR_A_CDC_COMP2_SHUT_DOWN_STATUS] =
348 SITAR_A_CDC_COMP2_SHUT_DOWN_STATUS__POR,
349 [SITAR_A_CDC_COMP2_FS_CFG] = SITAR_A_CDC_COMP2_FS_CFG__POR,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]350 [SITAR_A_CDC_CONN_RX1_B1_CTL] = SITAR_A_CDC_CONN_RX1_B1_CTL__POR,
351 [SITAR_A_CDC_CONN_RX1_B2_CTL] = SITAR_A_CDC_CONN_RX1_B2_CTL__POR,
352 [SITAR_A_CDC_CONN_RX1_B3_CTL] = SITAR_A_CDC_CONN_RX1_B3_CTL__POR,
353 [SITAR_A_CDC_CONN_RX2_B1_CTL] = SITAR_A_CDC_CONN_RX2_B1_CTL__POR,
354 [SITAR_A_CDC_CONN_RX2_B2_CTL] = SITAR_A_CDC_CONN_RX2_B2_CTL__POR,
355 [SITAR_A_CDC_CONN_RX2_B3_CTL] = SITAR_A_CDC_CONN_RX2_B3_CTL__POR,
356 [SITAR_A_CDC_CONN_RX3_B1_CTL] = SITAR_A_CDC_CONN_RX3_B1_CTL__POR,
357 [SITAR_A_CDC_CONN_RX3_B2_CTL] = SITAR_A_CDC_CONN_RX3_B2_CTL__POR,
358 [SITAR_A_CDC_CONN_RX3_B3_CTL] = SITAR_A_CDC_CONN_RX3_B3_CTL__POR,
359 [SITAR_A_CDC_CONN_ANC_B1_CTL] = SITAR_A_CDC_CONN_ANC_B1_CTL__POR,
360 [SITAR_A_CDC_CONN_ANC_B2_CTL] = SITAR_A_CDC_CONN_ANC_B2_CTL__POR,
361 [SITAR_A_CDC_CONN_TX_B1_CTL] = SITAR_A_CDC_CONN_TX_B1_CTL__POR,
362 [SITAR_A_CDC_CONN_TX_B2_CTL] = SITAR_A_CDC_CONN_TX_B2_CTL__POR,
363 [SITAR_A_CDC_CONN_EQ1_B1_CTL] = SITAR_A_CDC_CONN_EQ1_B1_CTL__POR,
364 [SITAR_A_CDC_CONN_EQ1_B2_CTL] = SITAR_A_CDC_CONN_EQ1_B2_CTL__POR,
365 [SITAR_A_CDC_CONN_EQ1_B3_CTL] = SITAR_A_CDC_CONN_EQ1_B3_CTL__POR,
366 [SITAR_A_CDC_CONN_EQ1_B4_CTL] = SITAR_A_CDC_CONN_EQ1_B4_CTL__POR,
367 [SITAR_A_CDC_CONN_EQ2_B1_CTL] = SITAR_A_CDC_CONN_EQ2_B1_CTL__POR,
368 [SITAR_A_CDC_CONN_EQ2_B2_CTL] = SITAR_A_CDC_CONN_EQ2_B2_CTL__POR,
369 [SITAR_A_CDC_CONN_EQ2_B3_CTL] = SITAR_A_CDC_CONN_EQ2_B3_CTL__POR,
370 [SITAR_A_CDC_CONN_EQ2_B4_CTL] = SITAR_A_CDC_CONN_EQ2_B4_CTL__POR,
371 [SITAR_A_CDC_CONN_SRC1_B1_CTL] = SITAR_A_CDC_CONN_SRC1_B1_CTL__POR,
372 [SITAR_A_CDC_CONN_SRC1_B2_CTL] = SITAR_A_CDC_CONN_SRC1_B2_CTL__POR,
373 [SITAR_A_CDC_CONN_SRC2_B1_CTL] = SITAR_A_CDC_CONN_SRC2_B1_CTL__POR,
374 [SITAR_A_CDC_CONN_SRC2_B2_CTL] = SITAR_A_CDC_CONN_SRC2_B2_CTL__POR,
375 [SITAR_A_CDC_CONN_TX_SB_B1_CTL] = SITAR_A_CDC_CONN_TX_SB_B1_CTL__POR,
376 [SITAR_A_CDC_CONN_TX_SB_B2_CTL] = SITAR_A_CDC_CONN_TX_SB_B2_CTL__POR,
377 [SITAR_A_CDC_CONN_TX_SB_B3_CTL] = SITAR_A_CDC_CONN_TX_SB_B3_CTL__POR,
378 [SITAR_A_CDC_CONN_TX_SB_B4_CTL] = SITAR_A_CDC_CONN_TX_SB_B4_CTL__POR,
379 [SITAR_A_CDC_CONN_TX_SB_B5_CTL] = SITAR_A_CDC_CONN_TX_SB_B5_CTL__POR,
380 [SITAR_A_CDC_CONN_RX_SB_B1_CTL] = SITAR_A_CDC_CONN_RX_SB_B1_CTL__POR,
381 [SITAR_A_CDC_CONN_RX_SB_B2_CTL] = SITAR_A_CDC_CONN_RX_SB_B2_CTL__POR,
382 [SITAR_A_CDC_CONN_CLSG_CTL] = SITAR_A_CDC_CONN_CLSG_CTL__POR,
383 [SITAR_A_CDC_CONN_SPARE] = SITAR_A_CDC_CONN_SPARE__POR,
384 [SITAR_A_CDC_MBHC_EN_CTL] = SITAR_A_CDC_MBHC_EN_CTL__POR,
385 [SITAR_A_CDC_MBHC_FIR_B1_CFG] = SITAR_A_CDC_MBHC_FIR_B1_CFG__POR,
386 [SITAR_A_CDC_MBHC_FIR_B2_CFG] = SITAR_A_CDC_MBHC_FIR_B2_CFG__POR,
387 [SITAR_A_CDC_MBHC_TIMER_B1_CTL] = SITAR_A_CDC_MBHC_TIMER_B1_CTL__POR,
388 [SITAR_A_CDC_MBHC_TIMER_B2_CTL] = SITAR_A_CDC_MBHC_TIMER_B2_CTL__POR,
389 [SITAR_A_CDC_MBHC_TIMER_B3_CTL] = SITAR_A_CDC_MBHC_TIMER_B3_CTL__POR,
390 [SITAR_A_CDC_MBHC_TIMER_B4_CTL] = SITAR_A_CDC_MBHC_TIMER_B4_CTL__POR,
391 [SITAR_A_CDC_MBHC_TIMER_B5_CTL] = SITAR_A_CDC_MBHC_TIMER_B5_CTL__POR,
392 [SITAR_A_CDC_MBHC_TIMER_B6_CTL] = SITAR_A_CDC_MBHC_TIMER_B6_CTL__POR,
393 [SITAR_A_CDC_MBHC_B1_STATUS] = SITAR_A_CDC_MBHC_B1_STATUS__POR,
394 [SITAR_A_CDC_MBHC_B2_STATUS] = SITAR_A_CDC_MBHC_B2_STATUS__POR,
395 [SITAR_A_CDC_MBHC_B3_STATUS] = SITAR_A_CDC_MBHC_B3_STATUS__POR,
396 [SITAR_A_CDC_MBHC_B4_STATUS] = SITAR_A_CDC_MBHC_B4_STATUS__POR,
397 [SITAR_A_CDC_MBHC_B5_STATUS] = SITAR_A_CDC_MBHC_B5_STATUS__POR,
398 [SITAR_A_CDC_MBHC_B1_CTL] = SITAR_A_CDC_MBHC_B1_CTL__POR,
399 [SITAR_A_CDC_MBHC_B2_CTL] = SITAR_A_CDC_MBHC_B2_CTL__POR,
400 [SITAR_A_CDC_MBHC_VOLT_B1_CTL] = SITAR_A_CDC_MBHC_VOLT_B1_CTL__POR,
401 [SITAR_A_CDC_MBHC_VOLT_B2_CTL] = SITAR_A_CDC_MBHC_VOLT_B2_CTL__POR,
402 [SITAR_A_CDC_MBHC_VOLT_B3_CTL] = SITAR_A_CDC_MBHC_VOLT_B3_CTL__POR,
403 [SITAR_A_CDC_MBHC_VOLT_B4_CTL] = SITAR_A_CDC_MBHC_VOLT_B4_CTL__POR,
404 [SITAR_A_CDC_MBHC_VOLT_B5_CTL] = SITAR_A_CDC_MBHC_VOLT_B5_CTL__POR,
405 [SITAR_A_CDC_MBHC_VOLT_B6_CTL] = SITAR_A_CDC_MBHC_VOLT_B6_CTL__POR,
406 [SITAR_A_CDC_MBHC_VOLT_B7_CTL] = SITAR_A_CDC_MBHC_VOLT_B7_CTL__POR,
407 [SITAR_A_CDC_MBHC_VOLT_B8_CTL] = SITAR_A_CDC_MBHC_VOLT_B8_CTL__POR,
408 [SITAR_A_CDC_MBHC_VOLT_B9_CTL] = SITAR_A_CDC_MBHC_VOLT_B9_CTL__POR,
409 [SITAR_A_CDC_MBHC_VOLT_B10_CTL] = SITAR_A_CDC_MBHC_VOLT_B10_CTL__POR,
410 [SITAR_A_CDC_MBHC_VOLT_B11_CTL] = SITAR_A_CDC_MBHC_VOLT_B11_CTL__POR,
411 [SITAR_A_CDC_MBHC_VOLT_B12_CTL] = SITAR_A_CDC_MBHC_VOLT_B12_CTL__POR,
412 [SITAR_A_CDC_MBHC_CLK_CTL] = SITAR_A_CDC_MBHC_CLK_CTL__POR,
413 [SITAR_A_CDC_MBHC_INT_CTL] = SITAR_A_CDC_MBHC_INT_CTL__POR,
414 [SITAR_A_CDC_MBHC_DEBUG_CTL] = SITAR_A_CDC_MBHC_DEBUG_CTL__POR,
415 [SITAR_A_CDC_MBHC_SPARE] = SITAR_A_CDC_MBHC_SPARE__POR,
416};
417
418const u8 sitar_reg_readable[SITAR_CACHE_SIZE] = {
419 [WCD9XXX_A_CHIP_CTL] = 1,
420 [WCD9XXX_A_CHIP_STATUS] = 1,
421 [WCD9XXX_A_CHIP_ID_BYTE_0] = 1,
422 [WCD9XXX_A_CHIP_ID_BYTE_1] = 1,
423 [WCD9XXX_A_CHIP_ID_BYTE_2] = 1,
424 [WCD9XXX_A_CHIP_ID_BYTE_3] = 1,
425 [WCD9XXX_A_CHIP_VERSION] = 1,
426 [WCD9XXX_A_SB_VERSION] = 1,
427 [WCD9XXX_A_SLAVE_ID_1] = 1,
428 [WCD9XXX_A_SLAVE_ID_2] = 1,
429 [WCD9XXX_A_SLAVE_ID_3] = 1,
430 [SITAR_A_PIN_CTL_OE0] = 1,
431 [SITAR_A_PIN_CTL_OE1] = 1,
432 [SITAR_A_PIN_CTL_DATA0] = 1,
433 [SITAR_A_PIN_CTL_DATA1] = 1,
434 [SITAR_A_HDRIVE_GENERIC] = 1,
435 [SITAR_A_HDRIVE_OVERRIDE] = 1,
436 [SITAR_A_ANA_CSR_WAIT_STATE] = 1,
437 [SITAR_A_PROCESS_MONITOR_CTL0] = 1,
438 [SITAR_A_PROCESS_MONITOR_CTL1] = 1,
439 [SITAR_A_PROCESS_MONITOR_CTL2] = 1,
440 [SITAR_A_PROCESS_MONITOR_CTL3] = 1,
441 [SITAR_A_QFUSE_CTL] = 1,
442 [SITAR_A_QFUSE_STATUS] = 1,
443 [SITAR_A_QFUSE_DATA_OUT0] = 1,
444 [SITAR_A_QFUSE_DATA_OUT1] = 1,
445 [SITAR_A_QFUSE_DATA_OUT2] = 1,
446 [SITAR_A_QFUSE_DATA_OUT3] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]447 [SITAR_A_QFUSE_DATA_OUT4] = 1,
448 [SITAR_A_QFUSE_DATA_OUT5] = 1,
449 [SITAR_A_QFUSE_DATA_OUT6] = 1,
450 [SITAR_A_QFUSE_DATA_OUT7] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]451 [SITAR_A_CDC_CTL] = 1,
452 [SITAR_A_LEAKAGE_CTL] = 1,
453 [SITAR_A_INTR_MODE] = 1,
454 [SITAR_A_INTR_MASK0] = 1,
455 [SITAR_A_INTR_MASK1] = 1,
456 [SITAR_A_INTR_MASK2] = 1,
457 [SITAR_A_INTR_STATUS0] = 1,
458 [SITAR_A_INTR_STATUS1] = 1,
459 [SITAR_A_INTR_STATUS2] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]460 [SITAR_A_INTR_CLEAR0] = 1,
461 [SITAR_A_INTR_CLEAR1] = 1,
462 [SITAR_A_INTR_CLEAR2] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]463 [SITAR_A_INTR_LEVEL0] = 1,
464 [SITAR_A_INTR_LEVEL1] = 1,
465 [SITAR_A_INTR_LEVEL2] = 1,
466 [SITAR_A_INTR_TEST0] = 1,
467 [SITAR_A_INTR_TEST1] = 1,
468 [SITAR_A_INTR_TEST2] = 1,
469 [SITAR_A_INTR_SET0] = 1,
470 [SITAR_A_INTR_SET1] = 1,
471 [SITAR_A_INTR_SET2] = 1,
472 [SITAR_A_CDC_TX_I2S_SCK_MODE] = 1,
473 [SITAR_A_CDC_TX_I2S_WS_MODE] = 1,
474 [SITAR_A_CDC_DMIC_DATA0_MODE] = 1,
475 [SITAR_A_CDC_DMIC_CLK0_MODE] = 1,
476 [SITAR_A_CDC_DMIC_DATA1_MODE] = 1,
477 [SITAR_A_CDC_DMIC_CLK1_MODE] = 1,
478 [SITAR_A_CDC_TX_I2S_SD0_MODE] = 1,
479 [SITAR_A_CDC_INTR_MODE] = 1,
480 [SITAR_A_CDC_RX_I2S_SD0_MODE] = 1,
481 [SITAR_A_CDC_RX_I2S_SD1_MODE] = 1,
482 [SITAR_A_BIAS_REF_CTL] = 1,
483 [SITAR_A_BIAS_CENTRAL_BG_CTL] = 1,
484 [SITAR_A_BIAS_PRECHRG_CTL] = 1,
485 [SITAR_A_BIAS_CURR_CTL_1] = 1,
486 [SITAR_A_BIAS_CURR_CTL_2] = 1,
487 [SITAR_A_BIAS_OSC_BG_CTL] = 1,
488 [SITAR_A_CLK_BUFF_EN1] = 1,
489 [SITAR_A_CLK_BUFF_EN2] = 1,
490 [SITAR_A_LDO_H_MODE_1] = 1,
491 [SITAR_A_LDO_H_MODE_2] = 1,
492 [SITAR_A_LDO_H_LOOP_CTL] = 1,
493 [SITAR_A_LDO_H_COMP_1] = 1,
494 [SITAR_A_LDO_H_COMP_2] = 1,
495 [SITAR_A_LDO_H_BIAS_1] = 1,
496 [SITAR_A_LDO_H_BIAS_2] = 1,
497 [SITAR_A_LDO_H_BIAS_3] = 1,
498 [SITAR_A_MICB_CFILT_1_CTL] = 1,
499 [SITAR_A_MICB_CFILT_1_VAL] = 1,
500 [SITAR_A_MICB_CFILT_1_PRECHRG] = 1,
501 [SITAR_A_MICB_1_CTL] = 1,
502 [SITAR_A_MICB_1_INT_RBIAS] = 1,
503 [SITAR_A_MICB_1_MBHC] = 1,
504 [SITAR_A_MICB_CFILT_2_CTL] = 1,
505 [SITAR_A_MICB_CFILT_2_VAL] = 1,
506 [SITAR_A_MICB_CFILT_2_PRECHRG] = 1,
507 [SITAR_A_MICB_2_CTL] = 1,
508 [SITAR_A_MICB_2_INT_RBIAS] = 1,
509 [SITAR_A_MICB_2_MBHC] = 1,
510 [SITAR_A_TX_COM_BIAS] = 1,
511 [SITAR_A_MBHC_SCALING_MUX_1] = 1,
512 [SITAR_A_MBHC_SCALING_MUX_2] = 1,
513 [SITAR_A_TX_SUP_SWITCH_CTRL_1] = 1,
514 [SITAR_A_TX_SUP_SWITCH_CTRL_2] = 1,
515 [SITAR_A_TX_1_2_EN] = 1,
516 [SITAR_A_TX_1_2_TEST_EN] = 1,
517 [SITAR_A_TX_1_2_ADC_CH1] = 1,
518 [SITAR_A_TX_1_2_ADC_CH2] = 1,
519 [SITAR_A_TX_1_2_ATEST_REFCTRL] = 1,
520 [SITAR_A_TX_1_2_TEST_CTL] = 1,
521 [SITAR_A_TX_1_2_TEST_BLOCK_EN] = 1,
522 [SITAR_A_TX_1_2_TXFE_CLKDIV] = 1,
523 [SITAR_A_TX_1_2_SAR_ERR_CH1] = 1,
524 [SITAR_A_TX_1_2_SAR_ERR_CH2] = 1,
525 [SITAR_A_TX_3_EN] = 1,
526 [SITAR_A_TX_3_TEST_EN] = 1,
527 [SITAR_A_TX_3_ADC] = 1,
528 [SITAR_A_TX_3_MBHC_ATEST_REFCTRL] = 1,
529 [SITAR_A_TX_3_TEST_CTL] = 1,
530 [SITAR_A_TX_3_TEST_BLOCK_EN] = 1,
531 [SITAR_A_TX_3_TXFE_CKDIV] = 1,
532 [SITAR_A_TX_3_SAR_ERR] = 1,
533 [SITAR_A_TX_4_MBHC_EN] = 1,
534 [SITAR_A_TX_4_MBHC_ADC] = 1,
535 [SITAR_A_TX_4_MBHC_TEST_CTL] = 1,
536 [SITAR_A_TX_4_MBHC_SAR_ERR] = 1,
537 [SITAR_A_TX_4_TXFE_CLKDIV] = 1,
538 [SITAR_A_AUX_COM_CTL] = 1,
539 [SITAR_A_AUX_COM_ATEST] = 1,
540 [SITAR_A_AUX_L_EN] = 1,
541 [SITAR_A_AUX_L_GAIN] = 1,
542 [SITAR_A_AUX_L_PA_CONN] = 1,
543 [SITAR_A_AUX_L_PA_CONN_INV] = 1,
544 [SITAR_A_AUX_R_EN] = 1,
545 [SITAR_A_AUX_R_GAIN] = 1,
546 [SITAR_A_AUX_R_PA_CONN] = 1,
547 [SITAR_A_AUX_R_PA_CONN_INV] = 1,
548 [SITAR_A_CP_EN] = 1,
549 [SITAR_A_CP_CLK] = 1,
550 [SITAR_A_CP_STATIC] = 1,
551 [SITAR_A_CP_DCC1] = 1,
552 [SITAR_A_CP_DCC3] = 1,
553 [SITAR_A_CP_ATEST] = 1,
554 [SITAR_A_CP_DTEST] = 1,
555 [SITAR_A_RX_COM_TIMER_DIV] = 1,
556 [SITAR_A_RX_COM_OCP_CTL] = 1,
557 [SITAR_A_RX_COM_OCP_COUNT] = 1,
558 [SITAR_A_RX_COM_DAC_CTL] = 1,
559 [SITAR_A_RX_COM_BIAS] = 1,
560 [SITAR_A_RX_HPH_BIAS_PA] = 1,
561 [SITAR_A_RX_HPH_BIAS_LDO] = 1,
562 [SITAR_A_RX_HPH_BIAS_CNP] = 1,
563 [SITAR_A_RX_HPH_BIAS_WG] = 1,
564 [SITAR_A_RX_HPH_OCP_CTL] = 1,
565 [SITAR_A_RX_HPH_CNP_EN] = 1,
566 [SITAR_A_RX_HPH_CNP_WG_CTL] = 1,
567 [SITAR_A_RX_HPH_CNP_WG_TIME] = 1,
568 [SITAR_A_RX_HPH_L_GAIN] = 1,
569 [SITAR_A_RX_HPH_L_TEST] = 1,
570 [SITAR_A_RX_HPH_L_PA_CTL] = 1,
571 [SITAR_A_RX_HPH_L_DAC_CTL] = 1,
572 [SITAR_A_RX_HPH_L_ATEST] = 1,
573 [SITAR_A_RX_HPH_L_STATUS] = 1,
574 [SITAR_A_RX_HPH_R_GAIN] = 1,
575 [SITAR_A_RX_HPH_R_TEST] = 1,
576 [SITAR_A_RX_HPH_R_PA_CTL] = 1,
577 [SITAR_A_RX_HPH_R_DAC_CTL] = 1,
578 [SITAR_A_RX_HPH_R_ATEST] = 1,
579 [SITAR_A_RX_HPH_R_STATUS] = 1,
580 [SITAR_A_RX_EAR_BIAS_PA] = 1,
581 [SITAR_A_RX_EAR_BIAS_CMBUFF] = 1,
582 [SITAR_A_RX_EAR_EN] = 1,
583 [SITAR_A_RX_EAR_GAIN] = 1,
584 [SITAR_A_RX_EAR_CMBUFF] = 1,
585 [SITAR_A_RX_EAR_ICTL] = 1,
586 [SITAR_A_RX_EAR_CCOMP] = 1,
587 [SITAR_A_RX_EAR_VCM] = 1,
588 [SITAR_A_RX_EAR_CNP] = 1,
589 [SITAR_A_RX_EAR_ATEST] = 1,
590 [SITAR_A_RX_EAR_STATUS] = 1,
591 [SITAR_A_RX_LINE_BIAS_PA] = 1,
592 [SITAR_A_RX_LINE_BIAS_LDO] = 1,
593 [SITAR_A_RX_LINE_BIAS_CNP1] = 1,
594 [SITAR_A_RX_LINE_COM] = 1,
595 [SITAR_A_RX_LINE_CNP_EN] = 1,
596 [SITAR_A_RX_LINE_CNP_WG_CTL] = 1,
597 [SITAR_A_RX_LINE_CNP_WG_TIME] = 1,
598 [SITAR_A_RX_LINE_1_GAIN] = 1,
599 [SITAR_A_RX_LINE_1_TEST] = 1,
600 [SITAR_A_RX_LINE_1_DAC_CTL] = 1,
601 [SITAR_A_RX_LINE_1_STATUS] = 1,
602 [SITAR_A_RX_LINE_2_GAIN] = 1,
603 [SITAR_A_RX_LINE_2_TEST] = 1,
604 [SITAR_A_RX_LINE_2_DAC_CTL] = 1,
605 [SITAR_A_RX_LINE_2_STATUS] = 1,
606 [SITAR_A_RX_LINE_BIAS_CNP2] = 1,
607 [SITAR_A_RX_LINE_OCP_CTL] = 1,
608 [SITAR_A_RX_LINE_1_PA_CTL] = 1,
609 [SITAR_A_RX_LINE_2_PA_CTL] = 1,
610 [SITAR_A_RX_LINE_CNP_DBG] = 1,
611 [SITAR_A_MBHC_HPH] = 1,
612 [SITAR_A_RC_OSC_FREQ] = 1,
613 [SITAR_A_RC_OSC_TEST] = 1,
614 [SITAR_A_RC_OSC_STATUS] = 1,
615 [SITAR_A_RC_OSC_TUNER] = 1,
616 [SITAR_A_CDC_ANC1_CTL] = 1,
617 [SITAR_A_CDC_ANC1_SHIFT] = 1,
618 [SITAR_A_CDC_ANC1_IIR_B1_CTL] = 1,
619 [SITAR_A_CDC_ANC1_IIR_B2_CTL] = 1,
620 [SITAR_A_CDC_ANC1_IIR_B3_CTL] = 1,
621 [SITAR_A_CDC_ANC1_IIR_B4_CTL] = 1,
622 [SITAR_A_CDC_ANC1_LPF_B1_CTL] = 1,
623 [SITAR_A_CDC_ANC1_LPF_B2_CTL] = 1,
624 [SITAR_A_CDC_ANC1_LPF_B3_CTL] = 1,
625 [SITAR_A_CDC_ANC1_SPARE] = 1,
626 [SITAR_A_CDC_ANC1_SMLPF_CTL] = 1,
627 [SITAR_A_CDC_ANC1_DCFLT_CTL] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]628 [SITAR_A_CDC_ANC2_CTL] = 1,
629 [SITAR_A_CDC_ANC2_SHIFT] = 1,
630 [SITAR_A_CDC_ANC2_IIR_B1_CTL] = 1,
631 [SITAR_A_CDC_ANC2_IIR_B2_CTL] = 1,
632 [SITAR_A_CDC_ANC2_IIR_B3_CTL] = 1,
633 [SITAR_A_CDC_ANC2_IIR_B4_CTL] = 1,
634 [SITAR_A_CDC_ANC2_LPF_B1_CTL] = 1,
635 [SITAR_A_CDC_ANC2_LPF_B2_CTL] = 1,
636 [SITAR_A_CDC_ANC2_LPF_B3_CTL] = 1,
637 [SITAR_A_CDC_ANC2_SPARE] = 1,
638 [SITAR_A_CDC_ANC2_SMLPF_CTL] = 1,
639 [SITAR_A_CDC_ANC2_DCFLT_CTL] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]640 [SITAR_A_CDC_TX1_VOL_CTL_TIMER] = 1,
641 [SITAR_A_CDC_TX1_VOL_CTL_GAIN] = 1,
642 [SITAR_A_CDC_TX1_VOL_CTL_CFG] = 1,
643 [SITAR_A_CDC_TX1_MUX_CTL] = 1,
644 [SITAR_A_CDC_TX1_CLK_FS_CTL] = 1,
645 [SITAR_A_CDC_TX1_DMIC_CTL] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]646 [SITAR_A_CDC_TX2_VOL_CTL_TIMER] = 1,
647 [SITAR_A_CDC_TX2_VOL_CTL_GAIN] = 1,
648 [SITAR_A_CDC_TX2_VOL_CTL_CFG] = 1,
649 [SITAR_A_CDC_TX2_MUX_CTL] = 1,
650 [SITAR_A_CDC_TX2_CLK_FS_CTL] = 1,
651 [SITAR_A_CDC_TX2_DMIC_CTL] = 1,
652 [SITAR_A_CDC_TX3_VOL_CTL_TIMER] = 1,
653 [SITAR_A_CDC_TX3_VOL_CTL_GAIN] = 1,
654 [SITAR_A_CDC_TX3_VOL_CTL_CFG] = 1,
655 [SITAR_A_CDC_TX3_MUX_CTL] = 1,
656 [SITAR_A_CDC_TX3_CLK_FS_CTL] = 1,
657 [SITAR_A_CDC_TX3_DMIC_CTL] = 1,
658 [SITAR_A_CDC_TX4_VOL_CTL_TIMER] = 1,
659 [SITAR_A_CDC_TX4_VOL_CTL_GAIN] = 1,
660 [SITAR_A_CDC_TX4_VOL_CTL_CFG] = 1,
661 [SITAR_A_CDC_TX4_MUX_CTL] = 1,
662 [SITAR_A_CDC_TX4_CLK_FS_CTL] = 1,
663 [SITAR_A_CDC_TX4_DMIC_CTL] = 1,
664 [SITAR_A_CDC_TX5_VOL_CTL_TIMER] = 1,
665 [SITAR_A_CDC_TX5_VOL_CTL_GAIN] = 1,
666 [SITAR_A_CDC_TX5_VOL_CTL_CFG] = 1,
667 [SITAR_A_CDC_TX5_MUX_CTL] = 1,
668 [SITAR_A_CDC_TX5_CLK_FS_CTL] = 1,
669 [SITAR_A_CDC_TX5_DMIC_CTL] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]670 [SITAR_A_CDC_SRC1_PDA_CFG] = 1,
671 [SITAR_A_CDC_SRC1_FS_CTL] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]672 [SITAR_A_CDC_SRC2_PDA_CFG] = 1,
673 [SITAR_A_CDC_SRC2_FS_CTL] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]674 [SITAR_A_CDC_RX1_B1_CTL] = 1,
675 [SITAR_A_CDC_RX1_B2_CTL] = 1,
676 [SITAR_A_CDC_RX1_B3_CTL] = 1,
677 [SITAR_A_CDC_RX1_B4_CTL] = 1,
678 [SITAR_A_CDC_RX1_B5_CTL] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]679 [SITAR_A_CDC_RX1_B6_CTL] = 1,
680 [SITAR_A_CDC_RX1_VOL_CTL_B1_CTL] = 1,
681 [SITAR_A_CDC_RX1_VOL_CTL_B2_CTL] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]682 [SITAR_A_CDC_RX2_B1_CTL] = 1,
683 [SITAR_A_CDC_RX2_B2_CTL] = 1,
684 [SITAR_A_CDC_RX2_B3_CTL] = 1,
685 [SITAR_A_CDC_RX2_B4_CTL] = 1,
686 [SITAR_A_CDC_RX2_B5_CTL] = 1,
687 [SITAR_A_CDC_RX2_B6_CTL] = 1,
688 [SITAR_A_CDC_RX2_VOL_CTL_B1_CTL] = 1,
689 [SITAR_A_CDC_RX2_VOL_CTL_B2_CTL] = 1,
690 [SITAR_A_CDC_RX3_B1_CTL] = 1,
691 [SITAR_A_CDC_RX3_B2_CTL] = 1,
692 [SITAR_A_CDC_RX3_B3_CTL] = 1,
693 [SITAR_A_CDC_RX3_B4_CTL] = 1,
694 [SITAR_A_CDC_RX3_B5_CTL] = 1,
695 [SITAR_A_CDC_RX3_B6_CTL] = 1,
696 [SITAR_A_CDC_RX3_VOL_CTL_B1_CTL] = 1,
697 [SITAR_A_CDC_RX3_VOL_CTL_B2_CTL] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]698 [SITAR_A_CDC_CLK_ANC_RESET_CTL] = 1,
699 [SITAR_A_CDC_CLK_RX_RESET_CTL] = 1,
700 [SITAR_A_CDC_CLK_TX_RESET_B1_CTL] = 1,
701 [SITAR_A_CDC_CLK_TX_RESET_B2_CTL] = 1,
702 [SITAR_A_CDC_CLK_DMIC_CTL] = 1,
703 [SITAR_A_CDC_CLK_RX_I2S_CTL] = 1,
704 [SITAR_A_CDC_CLK_TX_I2S_CTL] = 1,
705 [SITAR_A_CDC_CLK_OTHR_RESET_CTL] = 1,
706 [SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL] = 1,
707 [SITAR_A_CDC_CLK_OTHR_CTL] = 1,
708 [SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL] = 1,
709 [SITAR_A_CDC_CLK_ANC_CLK_EN_CTL] = 1,
710 [SITAR_A_CDC_CLK_RX_B1_CTL] = 1,
711 [SITAR_A_CDC_CLK_RX_B2_CTL] = 1,
712 [SITAR_A_CDC_CLK_MCLK_CTL] = 1,
713 [SITAR_A_CDC_CLK_PDM_CTL] = 1,
714 [SITAR_A_CDC_CLK_SD_CTL] = 1,
715 [SITAR_A_CDC_CLK_LP_CTL] = 1,
716 [SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL] = 1,
717 [SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL] = 1,
718 [SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL] = 1,
719 [SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL] = 1,
720 [SITAR_A_CDC_CLSG_GAIN_THRESH_CTL] = 1,
721 [SITAR_A_CDC_CLSG_TIMER_B1_CFG] = 1,
722 [SITAR_A_CDC_CLSG_TIMER_B2_CFG] = 1,
723 [SITAR_A_CDC_CLSG_CTL] = 1,
724 [SITAR_A_CDC_IIR1_GAIN_B1_CTL] = 1,
725 [SITAR_A_CDC_IIR1_GAIN_B2_CTL] = 1,
726 [SITAR_A_CDC_IIR1_GAIN_B3_CTL] = 1,
727 [SITAR_A_CDC_IIR1_GAIN_B4_CTL] = 1,
728 [SITAR_A_CDC_IIR1_GAIN_B5_CTL] = 1,
729 [SITAR_A_CDC_IIR1_GAIN_B6_CTL] = 1,
730 [SITAR_A_CDC_IIR1_GAIN_B7_CTL] = 1,
731 [SITAR_A_CDC_IIR1_GAIN_B8_CTL] = 1,
732 [SITAR_A_CDC_IIR1_CTL] = 1,
733 [SITAR_A_CDC_IIR1_GAIN_TIMER_CTL] = 1,
734 [SITAR_A_CDC_IIR1_COEF_B1_CTL] = 1,
735 [SITAR_A_CDC_IIR1_COEF_B2_CTL] = 1,
736 [SITAR_A_CDC_IIR1_COEF_B3_CTL] = 1,
737 [SITAR_A_CDC_IIR1_COEF_B4_CTL] = 1,
738 [SITAR_A_CDC_IIR1_COEF_B5_CTL] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]739 [SITAR_A_CDC_IIR2_GAIN_B1_CTL] = 1,
740 [SITAR_A_CDC_IIR2_GAIN_B2_CTL] = 1,
741 [SITAR_A_CDC_IIR2_GAIN_B3_CTL] = 1,
742 [SITAR_A_CDC_IIR2_GAIN_B4_CTL] = 1,
743 [SITAR_A_CDC_IIR2_GAIN_B5_CTL] = 1,
744 [SITAR_A_CDC_IIR2_GAIN_B6_CTL] = 1,
745 [SITAR_A_CDC_IIR2_GAIN_B7_CTL] = 1,
746 [SITAR_A_CDC_IIR2_GAIN_B8_CTL] = 1,
747 [SITAR_A_CDC_IIR2_CTL] = 1,
748 [SITAR_A_CDC_IIR2_GAIN_TIMER_CTL] = 1,
749 [SITAR_A_CDC_IIR2_COEF_B1_CTL] = 1,
750 [SITAR_A_CDC_IIR2_COEF_B2_CTL] = 1,
751 [SITAR_A_CDC_IIR2_COEF_B3_CTL] = 1,
752 [SITAR_A_CDC_IIR2_COEF_B4_CTL] = 1,
753 [SITAR_A_CDC_IIR2_COEF_B5_CTL] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]754 [SITAR_A_CDC_TOP_GAIN_UPDATE] = 1,
755 [SITAR_A_CDC_TOP_RDAC_DOUT_CTL] = 1,
756 [SITAR_A_CDC_DEBUG_B1_CTL] = 1,
757 [SITAR_A_CDC_DEBUG_B2_CTL] = 1,
758 [SITAR_A_CDC_DEBUG_B3_CTL] = 1,
759 [SITAR_A_CDC_DEBUG_B4_CTL] = 1,
760 [SITAR_A_CDC_DEBUG_B5_CTL] = 1,
761 [SITAR_A_CDC_DEBUG_B6_CTL] = 1,
762 [SITAR_A_CDC_DEBUG_B7_CTL] = 1,
763 [SITAR_A_CDC_COMP1_B1_CTL] = 1,
764 [SITAR_A_CDC_COMP1_B2_CTL] = 1,
765 [SITAR_A_CDC_COMP1_B3_CTL] = 1,
766 [SITAR_A_CDC_COMP1_B4_CTL] = 1,
767 [SITAR_A_CDC_COMP1_B5_CTL] = 1,
768 [SITAR_A_CDC_COMP1_B6_CTL] = 1,
769 [SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS] = 1,
770 [SITAR_A_CDC_COMP1_FS_CFG] = 1,
Asish Bhattacharyab8d02c62012-09-24 18:43:48 +0530[diff] [blame]771 [SITAR_A_CDC_COMP2_B1_CTL] = 1,
772 [SITAR_A_CDC_COMP2_B2_CTL] = 1,
773 [SITAR_A_CDC_COMP2_B3_CTL] = 1,
774 [SITAR_A_CDC_COMP2_B4_CTL] = 1,
775 [SITAR_A_CDC_COMP2_B5_CTL] = 1,
776 [SITAR_A_CDC_COMP2_B6_CTL] = 1,
777 [SITAR_A_CDC_COMP2_SHUT_DOWN_STATUS] = 1,
778 [SITAR_A_CDC_COMP2_FS_CFG] = 1,
Asish Bhattacharyab86c3472012-02-15 08:31:52 +0530[diff] [blame]779 [SITAR_A_CDC_CONN_RX1_B1_CTL] = 1,
780 [SITAR_A_CDC_CONN_RX1_B2_CTL] = 1,
781 [SITAR_A_CDC_CONN_RX1_B3_CTL] = 1,
782 [SITAR_A_CDC_CONN_RX2_B1_CTL] = 1,
783 [SITAR_A_CDC_CONN_RX2_B2_CTL] = 1,
784 [SITAR_A_CDC_CONN_RX2_B3_CTL] = 1,
785 [SITAR_A_CDC_CONN_RX3_B1_CTL] = 1,
786 [SITAR_A_CDC_CONN_RX3_B2_CTL] = 1,
787 [SITAR_A_CDC_CONN_RX3_B3_CTL] = 1,
788 [SITAR_A_CDC_CONN_ANC_B1_CTL] = 1,
789 [SITAR_A_CDC_CONN_ANC_B2_CTL] = 1,
790 [SITAR_A_CDC_CONN_TX_B1_CTL] = 1,
791 [SITAR_A_CDC_CONN_TX_B2_CTL] = 1,
792 [SITAR_A_CDC_CONN_EQ1_B1_CTL] = 1,
793 [SITAR_A_CDC_CONN_EQ1_B2_CTL] = 1,
794 [SITAR_A_CDC_CONN_EQ1_B3_CTL] = 1,
795 [SITAR_A_CDC_CONN_EQ1_B4_CTL] = 1,
796 [SITAR_A_CDC_CONN_EQ2_B1_CTL] = 1,
797 [SITAR_A_CDC_CONN_EQ2_B2_CTL] = 1,
798 [SITAR_A_CDC_CONN_EQ2_B3_CTL] = 1,
799 [SITAR_A_CDC_CONN_EQ2_B4_CTL] = 1,
800 [SITAR_A_CDC_CONN_SRC1_B1_CTL] = 1,
801 [SITAR_A_CDC_CONN_SRC1_B2_CTL] = 1,
802 [SITAR_A_CDC_CONN_SRC2_B1_CTL] = 1,
803 [SITAR_A_CDC_CONN_SRC2_B2_CTL] = 1,
804 [SITAR_A_CDC_CONN_TX_SB_B1_CTL] = 1,
805 [SITAR_A_CDC_CONN_TX_SB_B2_CTL] = 1,
806 [SITAR_A_CDC_CONN_TX_SB_B3_CTL] = 1,
807 [SITAR_A_CDC_CONN_TX_SB_B4_CTL] = 1,
808 [SITAR_A_CDC_CONN_TX_SB_B5_CTL] = 1,
809 [SITAR_A_CDC_CONN_RX_SB_B1_CTL] = 1,
810 [SITAR_A_CDC_CONN_RX_SB_B2_CTL] = 1,
811 [SITAR_A_CDC_CONN_CLSG_CTL] = 1,
812 [SITAR_A_CDC_CONN_SPARE] = 1,
813 [SITAR_A_CDC_MBHC_EN_CTL] = 1,
814 [SITAR_A_CDC_MBHC_FIR_B1_CFG] = 1,
815 [SITAR_A_CDC_MBHC_FIR_B2_CFG] = 1,
816 [SITAR_A_CDC_MBHC_TIMER_B1_CTL] = 1,
817 [SITAR_A_CDC_MBHC_TIMER_B2_CTL] = 1,
818 [SITAR_A_CDC_MBHC_TIMER_B3_CTL] = 1,
819 [SITAR_A_CDC_MBHC_TIMER_B4_CTL] = 1,
820 [SITAR_A_CDC_MBHC_TIMER_B5_CTL] = 1,
821 [SITAR_A_CDC_MBHC_TIMER_B6_CTL] = 1,
822 [SITAR_A_CDC_MBHC_B1_STATUS] = 1,
823 [SITAR_A_CDC_MBHC_B2_STATUS] = 1,
824 [SITAR_A_CDC_MBHC_B3_STATUS] = 1,
825 [SITAR_A_CDC_MBHC_B4_STATUS] = 1,
826 [SITAR_A_CDC_MBHC_B5_STATUS] = 1,
827 [SITAR_A_CDC_MBHC_B1_CTL] = 1,
828 [SITAR_A_CDC_MBHC_B2_CTL] = 1,
829 [SITAR_A_CDC_MBHC_VOLT_B1_CTL] = 1,
830 [SITAR_A_CDC_MBHC_VOLT_B2_CTL] = 1,
831 [SITAR_A_CDC_MBHC_VOLT_B3_CTL] = 1,
832 [SITAR_A_CDC_MBHC_VOLT_B4_CTL] = 1,
833 [SITAR_A_CDC_MBHC_VOLT_B5_CTL] = 1,
834 [SITAR_A_CDC_MBHC_VOLT_B6_CTL] = 1,
835 [SITAR_A_CDC_MBHC_VOLT_B7_CTL] = 1,
836 [SITAR_A_CDC_MBHC_VOLT_B8_CTL] = 1,
837 [SITAR_A_CDC_MBHC_VOLT_B9_CTL] = 1,
838 [SITAR_A_CDC_MBHC_VOLT_B10_CTL] = 1,
839 [SITAR_A_CDC_MBHC_VOLT_B11_CTL] = 1,
840 [SITAR_A_CDC_MBHC_VOLT_B12_CTL] = 1,
841 [SITAR_A_CDC_MBHC_CLK_CTL] = 1,
842 [SITAR_A_CDC_MBHC_INT_CTL] = 1,
843 [SITAR_A_CDC_MBHC_DEBUG_CTL] = 1,
844 [SITAR_A_CDC_MBHC_SPARE] = 1,
845};