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Dragos Carp00b8fd22007-05-10 22:22:52 -07001/*
2 * MPC52xx SPC in SPI mode driver.
3 *
4 * Maintainer: Dragos Carp
5 *
6 * Copyright (C) 2006 TOPTICA Photonics AG.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18
19#if defined(CONFIG_PPC_MERGE)
20#include <asm/of_platform.h>
21#else
22#include <linux/platform_device.h>
23#endif
24
25#include <linux/workqueue.h>
26#include <linux/completion.h>
27#include <linux/io.h>
28#include <linux/delay.h>
29#include <linux/spi/spi.h>
30#include <linux/fsl_devices.h>
31
32#include <asm/mpc52xx.h>
33#include <asm/mpc52xx_psc.h>
34
35#define MCLK 20000000 /* PSC port MClk in hz */
36
37struct mpc52xx_psc_spi {
38 /* fsl_spi_platform data */
39 void (*activate_cs)(u8, u8);
40 void (*deactivate_cs)(u8, u8);
41 u32 sysclk;
42
43 /* driver internal data */
44 struct mpc52xx_psc __iomem *psc;
Grant Likely4874cc12008-03-04 14:28:42 -080045 struct mpc52xx_psc_fifo __iomem *fifo;
Dragos Carp00b8fd22007-05-10 22:22:52 -070046 unsigned int irq;
47 u8 bits_per_word;
48 u8 busy;
49
50 struct workqueue_struct *workqueue;
51 struct work_struct work;
52
53 struct list_head queue;
54 spinlock_t lock;
55
56 struct completion done;
57};
58
59/* controller state */
60struct mpc52xx_psc_spi_cs {
61 int bits_per_word;
62 int speed_hz;
63};
64
65/* set clock freq, clock ramp, bits per work
66 * if t is NULL then reset the values to the default values
67 */
68static int mpc52xx_psc_spi_transfer_setup(struct spi_device *spi,
69 struct spi_transfer *t)
70{
71 struct mpc52xx_psc_spi_cs *cs = spi->controller_state;
72
73 cs->speed_hz = (t && t->speed_hz)
74 ? t->speed_hz : spi->max_speed_hz;
75 cs->bits_per_word = (t && t->bits_per_word)
76 ? t->bits_per_word : spi->bits_per_word;
77 cs->bits_per_word = ((cs->bits_per_word + 7) / 8) * 8;
78 return 0;
79}
80
81static void mpc52xx_psc_spi_activate_cs(struct spi_device *spi)
82{
83 struct mpc52xx_psc_spi_cs *cs = spi->controller_state;
84 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
85 struct mpc52xx_psc __iomem *psc = mps->psc;
86 u32 sicr;
87 u16 ccr;
88
89 sicr = in_be32(&psc->sicr);
90
91 /* Set clock phase and polarity */
92 if (spi->mode & SPI_CPHA)
93 sicr |= 0x00001000;
94 else
95 sicr &= ~0x00001000;
96 if (spi->mode & SPI_CPOL)
97 sicr |= 0x00002000;
98 else
99 sicr &= ~0x00002000;
100
101 if (spi->mode & SPI_LSB_FIRST)
102 sicr |= 0x10000000;
103 else
104 sicr &= ~0x10000000;
105 out_be32(&psc->sicr, sicr);
106
107 /* Set clock frequency and bits per word
108 * Because psc->ccr is defined as 16bit register instead of 32bit
109 * just set the lower byte of BitClkDiv
110 */
111 ccr = in_be16(&psc->ccr);
112 ccr &= 0xFF00;
113 if (cs->speed_hz)
114 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF;
115 else /* by default SPI Clk 1MHz */
116 ccr |= (MCLK / 1000000 - 1) & 0xFF;
117 out_be16(&psc->ccr, ccr);
118 mps->bits_per_word = cs->bits_per_word;
119
120 if (mps->activate_cs)
121 mps->activate_cs(spi->chip_select,
122 (spi->mode & SPI_CS_HIGH) ? 1 : 0);
123}
124
125static void mpc52xx_psc_spi_deactivate_cs(struct spi_device *spi)
126{
127 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
128
129 if (mps->deactivate_cs)
130 mps->deactivate_cs(spi->chip_select,
131 (spi->mode & SPI_CS_HIGH) ? 1 : 0);
132}
133
134#define MPC52xx_PSC_BUFSIZE (MPC52xx_PSC_RFNUM_MASK + 1)
135/* wake up when 80% fifo full */
136#define MPC52xx_PSC_RFALARM (MPC52xx_PSC_BUFSIZE * 20 / 100)
137
138static int mpc52xx_psc_spi_transfer_rxtx(struct spi_device *spi,
139 struct spi_transfer *t)
140{
141 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
142 struct mpc52xx_psc __iomem *psc = mps->psc;
Grant Likely4874cc12008-03-04 14:28:42 -0800143 struct mpc52xx_psc_fifo __iomem *fifo = mps->fifo;
Dragos Carp00b8fd22007-05-10 22:22:52 -0700144 unsigned rb = 0; /* number of bytes receieved */
145 unsigned sb = 0; /* number of bytes sent */
146 unsigned char *rx_buf = (unsigned char *)t->rx_buf;
147 unsigned char *tx_buf = (unsigned char *)t->tx_buf;
148 unsigned rfalarm;
149 unsigned send_at_once = MPC52xx_PSC_BUFSIZE;
150 unsigned recv_at_once;
151 unsigned bpw = mps->bits_per_word / 8;
152
153 if (!t->tx_buf && !t->rx_buf && t->len)
154 return -EINVAL;
155
156 /* enable transmiter/receiver */
157 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
158 while (rb < t->len) {
159 if (t->len - rb > MPC52xx_PSC_BUFSIZE) {
160 rfalarm = MPC52xx_PSC_RFALARM;
161 } else {
162 send_at_once = t->len - sb;
163 rfalarm = MPC52xx_PSC_BUFSIZE - (t->len - rb);
164 }
165
166 dev_dbg(&spi->dev, "send %d bytes...\n", send_at_once);
167 if (tx_buf) {
168 for (; send_at_once; sb++, send_at_once--) {
169 /* set EOF flag */
170 if (mps->bits_per_word
171 && (sb + 1) % bpw == 0)
172 out_8(&psc->ircr2, 0x01);
173 out_8(&psc->mpc52xx_psc_buffer_8, tx_buf[sb]);
174 }
175 } else {
176 for (; send_at_once; sb++, send_at_once--) {
177 /* set EOF flag */
178 if (mps->bits_per_word
179 && ((sb + 1) % bpw) == 0)
180 out_8(&psc->ircr2, 0x01);
181 out_8(&psc->mpc52xx_psc_buffer_8, 0);
182 }
183 }
184
185
Robert P. J. Day3a4fa0a2007-10-19 23:10:43 +0200186 /* enable interrupts and wait for wake up
Dragos Carp00b8fd22007-05-10 22:22:52 -0700187 * if just one byte is expected the Rx FIFO genererates no
188 * FFULL interrupt, so activate the RxRDY interrupt
189 */
190 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
191 if (t->len - rb == 1) {
192 out_8(&psc->mode, 0);
193 } else {
194 out_8(&psc->mode, MPC52xx_PSC_MODE_FFULL);
Grant Likely4874cc12008-03-04 14:28:42 -0800195 out_be16(&fifo->rfalarm, rfalarm);
Dragos Carp00b8fd22007-05-10 22:22:52 -0700196 }
197 out_be16(&psc->mpc52xx_psc_imr, MPC52xx_PSC_IMR_RXRDY);
198 wait_for_completion(&mps->done);
Grant Likely4874cc12008-03-04 14:28:42 -0800199 recv_at_once = in_be16(&fifo->rfnum);
Dragos Carp00b8fd22007-05-10 22:22:52 -0700200 dev_dbg(&spi->dev, "%d bytes received\n", recv_at_once);
201
202 send_at_once = recv_at_once;
203 if (rx_buf) {
204 for (; recv_at_once; rb++, recv_at_once--)
205 rx_buf[rb] = in_8(&psc->mpc52xx_psc_buffer_8);
206 } else {
207 for (; recv_at_once; rb++, recv_at_once--)
208 in_8(&psc->mpc52xx_psc_buffer_8);
209 }
210 }
211 /* disable transmiter/receiver */
212 out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
213
214 return 0;
215}
216
217static void mpc52xx_psc_spi_work(struct work_struct *work)
218{
219 struct mpc52xx_psc_spi *mps =
220 container_of(work, struct mpc52xx_psc_spi, work);
221
222 spin_lock_irq(&mps->lock);
223 mps->busy = 1;
224 while (!list_empty(&mps->queue)) {
225 struct spi_message *m;
226 struct spi_device *spi;
227 struct spi_transfer *t = NULL;
228 unsigned cs_change;
229 int status;
230
231 m = container_of(mps->queue.next, struct spi_message, queue);
232 list_del_init(&m->queue);
233 spin_unlock_irq(&mps->lock);
234
235 spi = m->spi;
236 cs_change = 1;
237 status = 0;
238 list_for_each_entry (t, &m->transfers, transfer_list) {
239 if (t->bits_per_word || t->speed_hz) {
240 status = mpc52xx_psc_spi_transfer_setup(spi, t);
241 if (status < 0)
242 break;
243 }
244
245 if (cs_change)
246 mpc52xx_psc_spi_activate_cs(spi);
247 cs_change = t->cs_change;
248
249 status = mpc52xx_psc_spi_transfer_rxtx(spi, t);
250 if (status)
251 break;
252 m->actual_length += t->len;
253
254 if (t->delay_usecs)
255 udelay(t->delay_usecs);
256
257 if (cs_change)
258 mpc52xx_psc_spi_deactivate_cs(spi);
259 }
260
261 m->status = status;
262 m->complete(m->context);
263
264 if (status || !cs_change)
265 mpc52xx_psc_spi_deactivate_cs(spi);
266
267 mpc52xx_psc_spi_transfer_setup(spi, NULL);
268
269 spin_lock_irq(&mps->lock);
270 }
271 mps->busy = 0;
272 spin_unlock_irq(&mps->lock);
273}
274
David Brownelldccd5732007-07-17 04:04:02 -0700275/* the spi->mode bits understood by this driver: */
276#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST)
277
Dragos Carp00b8fd22007-05-10 22:22:52 -0700278static int mpc52xx_psc_spi_setup(struct spi_device *spi)
279{
280 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
281 struct mpc52xx_psc_spi_cs *cs = spi->controller_state;
282 unsigned long flags;
283
284 if (spi->bits_per_word%8)
285 return -EINVAL;
286
David Brownelldccd5732007-07-17 04:04:02 -0700287 if (spi->mode & ~MODEBITS) {
288 dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
289 spi->mode & ~MODEBITS);
290 return -EINVAL;
291 }
292
Dragos Carp00b8fd22007-05-10 22:22:52 -0700293 if (!cs) {
294 cs = kzalloc(sizeof *cs, GFP_KERNEL);
295 if (!cs)
296 return -ENOMEM;
297 spi->controller_state = cs;
298 }
299
300 cs->bits_per_word = spi->bits_per_word;
301 cs->speed_hz = spi->max_speed_hz;
302
303 spin_lock_irqsave(&mps->lock, flags);
304 if (!mps->busy)
305 mpc52xx_psc_spi_deactivate_cs(spi);
306 spin_unlock_irqrestore(&mps->lock, flags);
307
308 return 0;
309}
310
311static int mpc52xx_psc_spi_transfer(struct spi_device *spi,
312 struct spi_message *m)
313{
314 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
315 unsigned long flags;
316
317 m->actual_length = 0;
318 m->status = -EINPROGRESS;
319
320 spin_lock_irqsave(&mps->lock, flags);
321 list_add_tail(&m->queue, &mps->queue);
322 queue_work(mps->workqueue, &mps->work);
323 spin_unlock_irqrestore(&mps->lock, flags);
324
325 return 0;
326}
327
328static void mpc52xx_psc_spi_cleanup(struct spi_device *spi)
329{
330 kfree(spi->controller_state);
331}
332
333static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
334{
Dragos Carp00b8fd22007-05-10 22:22:52 -0700335 struct mpc52xx_psc __iomem *psc = mps->psc;
Grant Likely4874cc12008-03-04 14:28:42 -0800336 struct mpc52xx_psc_fifo __iomem *fifo = mps->fifo;
Dragos Carp00b8fd22007-05-10 22:22:52 -0700337 u32 mclken_div;
338 int ret = 0;
339
Dragos Carp00b8fd22007-05-10 22:22:52 -0700340 /* default sysclk is 512MHz */
Grant Likely4fb4c552008-01-24 22:25:31 -0700341 mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK;
342 mpc52xx_set_psc_clkdiv(psc_id, mclken_div);
Dragos Carp00b8fd22007-05-10 22:22:52 -0700343
344 /* Reset the PSC into a known state */
345 out_8(&psc->command, MPC52xx_PSC_RST_RX);
346 out_8(&psc->command, MPC52xx_PSC_RST_TX);
347 out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
348
349 /* Disable interrupts, interrupts are based on alarm level */
350 out_be16(&psc->mpc52xx_psc_imr, 0);
351 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
Grant Likely4874cc12008-03-04 14:28:42 -0800352 out_8(&fifo->rfcntl, 0);
Dragos Carp00b8fd22007-05-10 22:22:52 -0700353 out_8(&psc->mode, MPC52xx_PSC_MODE_FFULL);
354
355 /* Configure 8bit codec mode as a SPI master and use EOF flags */
356 /* SICR_SIM_CODEC8|SICR_GENCLK|SICR_SPI|SICR_MSTR|SICR_USEEOF */
357 out_be32(&psc->sicr, 0x0180C800);
358 out_be16(&psc->ccr, 0x070F); /* by default SPI Clk 1MHz */
359
360 /* Set 2ms DTL delay */
361 out_8(&psc->ctur, 0x00);
362 out_8(&psc->ctlr, 0x84);
363
364 mps->bits_per_word = 8;
365
Dragos Carp00b8fd22007-05-10 22:22:52 -0700366 return ret;
367}
368
369static irqreturn_t mpc52xx_psc_spi_isr(int irq, void *dev_id)
370{
371 struct mpc52xx_psc_spi *mps = (struct mpc52xx_psc_spi *)dev_id;
372 struct mpc52xx_psc __iomem *psc = mps->psc;
373
374 /* disable interrupt and wake up the work queue */
375 if (in_be16(&psc->mpc52xx_psc_isr) & MPC52xx_PSC_IMR_RXRDY) {
376 out_be16(&psc->mpc52xx_psc_imr, 0);
377 complete(&mps->done);
378 return IRQ_HANDLED;
379 }
380 return IRQ_NONE;
381}
382
383/* bus_num is used only for the case dev->platform_data == NULL */
384static int __init mpc52xx_psc_spi_do_probe(struct device *dev, u32 regaddr,
385 u32 size, unsigned int irq, s16 bus_num)
386{
387 struct fsl_spi_platform_data *pdata = dev->platform_data;
388 struct mpc52xx_psc_spi *mps;
389 struct spi_master *master;
390 int ret;
391
Dragos Carp00b8fd22007-05-10 22:22:52 -0700392 master = spi_alloc_master(dev, sizeof *mps);
393 if (master == NULL)
394 return -ENOMEM;
395
396 dev_set_drvdata(dev, master);
397 mps = spi_master_get_devdata(master);
398
399 mps->irq = irq;
400 if (pdata == NULL) {
401 dev_warn(dev, "probe called without platform data, no "
402 "(de)activate_cs function will be called\n");
403 mps->activate_cs = NULL;
404 mps->deactivate_cs = NULL;
405 mps->sysclk = 0;
406 master->bus_num = bus_num;
407 master->num_chipselect = 255;
408 } else {
409 mps->activate_cs = pdata->activate_cs;
410 mps->deactivate_cs = pdata->deactivate_cs;
411 mps->sysclk = pdata->sysclk;
412 master->bus_num = pdata->bus_num;
413 master->num_chipselect = pdata->max_chipselect;
414 }
415 master->setup = mpc52xx_psc_spi_setup;
416 master->transfer = mpc52xx_psc_spi_transfer;
417 master->cleanup = mpc52xx_psc_spi_cleanup;
418
419 mps->psc = ioremap(regaddr, size);
420 if (!mps->psc) {
421 dev_err(dev, "could not ioremap I/O port range\n");
422 ret = -EFAULT;
423 goto free_master;
424 }
Grant Likely4874cc12008-03-04 14:28:42 -0800425 /* On the 5200, fifo regs are immediately ajacent to the psc regs */
426 mps->fifo = ((void __iomem *)mps->psc) + sizeof(struct mpc52xx_psc);
Dragos Carp00b8fd22007-05-10 22:22:52 -0700427
428 ret = request_irq(mps->irq, mpc52xx_psc_spi_isr, 0, "mpc52xx-psc-spi",
429 mps);
430 if (ret)
431 goto free_master;
432
433 ret = mpc52xx_psc_spi_port_config(master->bus_num, mps);
434 if (ret < 0)
435 goto free_irq;
436
437 spin_lock_init(&mps->lock);
438 init_completion(&mps->done);
439 INIT_WORK(&mps->work, mpc52xx_psc_spi_work);
440 INIT_LIST_HEAD(&mps->queue);
441
442 mps->workqueue = create_singlethread_workqueue(
Tony Jones49dce682007-10-16 01:27:48 -0700443 master->dev.parent->bus_id);
Dragos Carp00b8fd22007-05-10 22:22:52 -0700444 if (mps->workqueue == NULL) {
445 ret = -EBUSY;
446 goto free_irq;
447 }
448
449 ret = spi_register_master(master);
450 if (ret < 0)
451 goto unreg_master;
452
453 return ret;
454
455unreg_master:
456 destroy_workqueue(mps->workqueue);
457free_irq:
458 free_irq(mps->irq, mps);
459free_master:
460 if (mps->psc)
461 iounmap(mps->psc);
462 spi_master_put(master);
463
464 return ret;
465}
466
467static int __exit mpc52xx_psc_spi_do_remove(struct device *dev)
468{
469 struct spi_master *master = dev_get_drvdata(dev);
470 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master);
471
472 flush_workqueue(mps->workqueue);
473 destroy_workqueue(mps->workqueue);
474 spi_unregister_master(master);
475 free_irq(mps->irq, mps);
476 if (mps->psc)
477 iounmap(mps->psc);
478
479 return 0;
480}
481
482#if !defined(CONFIG_PPC_MERGE)
483static int __init mpc52xx_psc_spi_probe(struct platform_device *dev)
484{
485 switch(dev->id) {
486 case 1:
487 case 2:
488 case 3:
489 case 6:
490 return mpc52xx_psc_spi_do_probe(&dev->dev,
491 MPC52xx_PA(MPC52xx_PSCx_OFFSET(dev->id)),
492 MPC52xx_PSC_SIZE, platform_get_irq(dev, 0), dev->id);
493 default:
494 return -EINVAL;
495 }
496}
497
498static int __exit mpc52xx_psc_spi_remove(struct platform_device *dev)
499{
500 return mpc52xx_psc_spi_do_remove(&dev->dev);
501}
502
Kay Sievers7e38c3c2008-04-10 21:29:20 -0700503/* work with hotplug and coldplug */
504MODULE_ALIAS("platform:mpc52xx-psc-spi");
505
Dragos Carp00b8fd22007-05-10 22:22:52 -0700506static struct platform_driver mpc52xx_psc_spi_platform_driver = {
507 .remove = __exit_p(mpc52xx_psc_spi_remove),
508 .driver = {
509 .name = "mpc52xx-psc-spi",
510 .owner = THIS_MODULE,
511 },
512};
513
514static int __init mpc52xx_psc_spi_init(void)
515{
516 return platform_driver_probe(&mpc52xx_psc_spi_platform_driver,
517 mpc52xx_psc_spi_probe);
518}
519module_init(mpc52xx_psc_spi_init);
520
521static void __exit mpc52xx_psc_spi_exit(void)
522{
523 platform_driver_unregister(&mpc52xx_psc_spi_platform_driver);
524}
525module_exit(mpc52xx_psc_spi_exit);
526
527#else /* defined(CONFIG_PPC_MERGE) */
528
529static int __init mpc52xx_psc_spi_of_probe(struct of_device *op,
530 const struct of_device_id *match)
531{
532 const u32 *regaddr_p;
533 u64 regaddr64, size64;
534 s16 id = -1;
535
536 regaddr_p = of_get_address(op->node, 0, &size64, NULL);
537 if (!regaddr_p) {
538 printk(KERN_ERR "Invalid PSC address\n");
539 return -EINVAL;
540 }
541 regaddr64 = of_translate_address(op->node, regaddr_p);
542
Domen Puncer88887352007-05-23 13:57:32 -0700543 /* get PSC id (1..6, used by port_config) */
Dragos Carp00b8fd22007-05-10 22:22:52 -0700544 if (op->dev.platform_data == NULL) {
Domen Puncer88887352007-05-23 13:57:32 -0700545 const u32 *psc_nump;
Dragos Carp00b8fd22007-05-10 22:22:52 -0700546
Domen Puncer88887352007-05-23 13:57:32 -0700547 psc_nump = of_get_property(op->node, "cell-index", NULL);
548 if (!psc_nump || *psc_nump > 5) {
549 printk(KERN_ERR "mpc52xx_psc_spi: Device node %s has invalid "
550 "cell-index property\n", op->node->full_name);
551 return -EINVAL;
Dragos Carp00b8fd22007-05-10 22:22:52 -0700552 }
Domen Puncer88887352007-05-23 13:57:32 -0700553 id = *psc_nump + 1;
Dragos Carp00b8fd22007-05-10 22:22:52 -0700554 }
555
556 return mpc52xx_psc_spi_do_probe(&op->dev, (u32)regaddr64, (u32)size64,
557 irq_of_parse_and_map(op->node, 0), id);
558}
559
560static int __exit mpc52xx_psc_spi_of_remove(struct of_device *op)
561{
562 return mpc52xx_psc_spi_do_remove(&op->dev);
563}
564
565static struct of_device_id mpc52xx_psc_spi_of_match[] = {
Grant Likely66ffbe42008-01-24 22:25:31 -0700566 { .compatible = "fsl,mpc5200-psc-spi", },
567 { .compatible = "mpc5200-psc-spi", }, /* old */
568 {}
Dragos Carp00b8fd22007-05-10 22:22:52 -0700569};
570
571MODULE_DEVICE_TABLE(of, mpc52xx_psc_spi_of_match);
572
573static struct of_platform_driver mpc52xx_psc_spi_of_driver = {
574 .owner = THIS_MODULE,
575 .name = "mpc52xx-psc-spi",
576 .match_table = mpc52xx_psc_spi_of_match,
577 .probe = mpc52xx_psc_spi_of_probe,
578 .remove = __exit_p(mpc52xx_psc_spi_of_remove),
579 .driver = {
580 .name = "mpc52xx-psc-spi",
581 .owner = THIS_MODULE,
582 },
583};
584
585static int __init mpc52xx_psc_spi_init(void)
586{
587 return of_register_platform_driver(&mpc52xx_psc_spi_of_driver);
588}
589module_init(mpc52xx_psc_spi_init);
590
591static void __exit mpc52xx_psc_spi_exit(void)
592{
593 of_unregister_platform_driver(&mpc52xx_psc_spi_of_driver);
594}
595module_exit(mpc52xx_psc_spi_exit);
596
597#endif /* defined(CONFIG_PPC_MERGE) */
598
599MODULE_AUTHOR("Dragos Carp");
600MODULE_DESCRIPTION("MPC52xx PSC SPI Driver");
601MODULE_LICENSE("GPL");