blob: 8327285143979780fd9c01eca53ec49fa824bace [file] [log] [blame]
Taniya Das2e948192011-12-20 11:15:13 +05301/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
Jordan Crouse914de9b2012-07-09 13:49:46 -060016#include <mach/kgsl.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070017#include <linux/regulator/machine.h>
Taniya Das2e948192011-12-20 11:15:13 +053018#include <linux/init.h>
Taniya Das43bcdd62011-12-02 17:33:27 +053019#include <linux/irq.h>
Taniya Das9d0c3c52012-05-04 14:40:55 +053020#include <linux/notifier.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070021#include <mach/irqs.h>
22#include <mach/msm_iomap.h>
23#include <mach/board.h>
24#include <mach/dma.h>
25#include <mach/dal_axi.h>
26#include <asm/mach/flash.h>
Taniya Das43bcdd62011-12-02 17:33:27 +053027#include <asm/hardware/gic.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <asm/hardware/cache-l2x0.h>
29#include <asm/mach/mmc.h>
Taniya Das9d0c3c52012-05-04 14:40:55 +053030#include <asm/cacheflush.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070031#include <mach/rpc_hsusb.h>
32#include <mach/socinfo.h>
Matt Wagantall33d01f52012-02-23 23:27:44 -080033#include <mach/clk-provider.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034
35#include "devices.h"
36#include "devices-msm7x2xa.h"
37#include "footswitch.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -070038#include "acpuclock.h"
Murali Nalajala41786ab2012-03-06 10:47:32 +053039#include "spm.h"
Taniya Dasfcb35002012-03-09 15:28:12 +053040#include "mpm-8625.h"
Murali Nalajala2a0bbda2012-03-28 12:12:54 +053041#include "irq.h"
42#include "pm.h"
Kaushal Kumarc0e5d672012-07-31 16:07:49 +053043#include "msm_cpr.h"
44#include "msm_smem_iface.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070045
46/* Address of GSBI blocks */
47#define MSM_GSBI0_PHYS 0xA1200000
48#define MSM_GSBI1_PHYS 0xA1300000
49
50/* GSBI QUPe devices */
51#define MSM_GSBI0_QUP_PHYS (MSM_GSBI0_PHYS + 0x80000)
52#define MSM_GSBI1_QUP_PHYS (MSM_GSBI1_PHYS + 0x80000)
53
Kaushal Kumarc0e5d672012-07-31 16:07:49 +053054#define A11S_TEST_BUS_SEL_ADDR (MSM_CSR_BASE + 0x518)
55#define RBCPR_CLK_MUX_SEL (1 << 13)
56
57/* Reset Address of RBCPR (Active Low)*/
58#define RBCPR_SW_RESET_N (MSM_CSR_BASE + 0x64)
59
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060static struct resource gsbi0_qup_i2c_resources[] = {
61 {
62 .name = "qup_phys_addr",
63 .start = MSM_GSBI0_QUP_PHYS,
64 .end = MSM_GSBI0_QUP_PHYS + SZ_4K - 1,
65 .flags = IORESOURCE_MEM,
66 },
67 {
68 .name = "gsbi_qup_i2c_addr",
69 .start = MSM_GSBI0_PHYS,
70 .end = MSM_GSBI0_PHYS + SZ_4K - 1,
71 .flags = IORESOURCE_MEM,
72 },
73 {
74 .name = "qup_err_intr",
75 .start = INT_PWB_I2C,
76 .end = INT_PWB_I2C,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81/* Use GSBI0 QUP for /dev/i2c-0 */
82struct platform_device msm_gsbi0_qup_i2c_device = {
83 .name = "qup_i2c",
84 .id = MSM_GSBI0_QUP_I2C_BUS_ID,
85 .num_resources = ARRAY_SIZE(gsbi0_qup_i2c_resources),
86 .resource = gsbi0_qup_i2c_resources,
87};
88
89static struct resource gsbi1_qup_i2c_resources[] = {
90 {
91 .name = "qup_phys_addr",
92 .start = MSM_GSBI1_QUP_PHYS,
93 .end = MSM_GSBI1_QUP_PHYS + SZ_4K - 1,
94 .flags = IORESOURCE_MEM,
95 },
96 {
97 .name = "gsbi_qup_i2c_addr",
98 .start = MSM_GSBI1_PHYS,
99 .end = MSM_GSBI1_PHYS + SZ_4K - 1,
100 .flags = IORESOURCE_MEM,
101 },
102 {
103 .name = "qup_err_intr",
104 .start = INT_ARM11_DMA,
105 .end = INT_ARM11_DMA,
106 .flags = IORESOURCE_IRQ,
107 },
108};
109
110/* Use GSBI1 QUP for /dev/i2c-1 */
111struct platform_device msm_gsbi1_qup_i2c_device = {
112 .name = "qup_i2c",
113 .id = MSM_GSBI1_QUP_I2C_BUS_ID,
114 .num_resources = ARRAY_SIZE(gsbi1_qup_i2c_resources),
115 .resource = gsbi1_qup_i2c_resources,
116};
117
118#define MSM_HSUSB_PHYS 0xA0800000
119static struct resource resources_hsusb_otg[] = {
120 {
121 .start = MSM_HSUSB_PHYS,
122 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
123 .flags = IORESOURCE_MEM,
124 },
125 {
126 .start = INT_USB_HS,
127 .end = INT_USB_HS,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static u64 dma_mask = 0xffffffffULL;
133struct platform_device msm_device_otg = {
134 .name = "msm_otg",
135 .id = -1,
136 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
137 .resource = resources_hsusb_otg,
138 .dev = {
139 .dma_mask = &dma_mask,
140 .coherent_dma_mask = 0xffffffffULL,
141 },
142};
143
144static struct resource resources_gadget_peripheral[] = {
145 {
146 .start = MSM_HSUSB_PHYS,
147 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
148 .flags = IORESOURCE_MEM,
149 },
150 {
151 .start = INT_USB_HS,
152 .end = INT_USB_HS,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
157struct platform_device msm_device_gadget_peripheral = {
158 .name = "msm_hsusb",
159 .id = -1,
160 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
161 .resource = resources_gadget_peripheral,
162 .dev = {
163 .dma_mask = &dma_mask,
164 .coherent_dma_mask = 0xffffffffULL,
165 },
166};
167
168static struct resource resources_hsusb_host[] = {
169 {
170 .start = MSM_HSUSB_PHYS,
171 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
172 .flags = IORESOURCE_MEM,
173 },
174 {
175 .start = INT_USB_HS,
176 .end = INT_USB_HS,
177 .flags = IORESOURCE_IRQ,
178 },
179};
180
181struct platform_device msm_device_hsusb_host = {
182 .name = "msm_hsusb_host",
183 .id = 0,
184 .num_resources = ARRAY_SIZE(resources_hsusb_host),
185 .resource = resources_hsusb_host,
186 .dev = {
187 .dma_mask = &dma_mask,
188 .coherent_dma_mask = 0xffffffffULL,
189 },
190};
191
192static struct platform_device *msm_host_devices[] = {
193 &msm_device_hsusb_host,
194};
195
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700196static struct resource msm_dmov_resource[] = {
197 {
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700198 .start = INT_ADM_AARM,
199 .flags = IORESOURCE_IRQ,
200 },
201 {
202 .start = 0xA9700000,
203 .end = 0xA9700000 + SZ_4K - 1,
204 .flags = IORESOURCE_MEM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700205 },
206};
207
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700208static struct msm_dmov_pdata msm_dmov_pdata = {
209 .sd = 3,
210 .sd_size = 0x400,
211};
212
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700213struct platform_device msm_device_dmov = {
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700214 .name = "msm_dmov",
215 .id = -1,
216 .resource = msm_dmov_resource,
217 .num_resources = ARRAY_SIZE(msm_dmov_resource),
218 .dev = {
219 .platform_data = &msm_dmov_pdata,
220 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700221};
222
Matt Wagantallbf430eb2012-03-22 11:45:49 -0700223static struct acpuclk_pdata msm7x27a_acpuclk_pdata = {
224 .max_speed_delta_khz = 400000,
225};
226
227struct platform_device msm7x27a_device_acpuclk = {
228 .name = "acpuclk-7627",
229 .id = -1,
230 .dev.platform_data = &msm7x27a_acpuclk_pdata,
231};
232
233static struct acpuclk_pdata msm7x27aa_acpuclk_pdata = {
234 .max_speed_delta_khz = 504000,
235};
236
237struct platform_device msm7x27aa_device_acpuclk = {
238 .name = "acpuclk-7627",
239 .id = -1,
240 .dev.platform_data = &msm7x27aa_acpuclk_pdata,
241};
242
243static struct acpuclk_pdata msm8625_acpuclk_pdata = {
244 /* TODO: Need to update speed delta from H/w Team */
245 .max_speed_delta_khz = 604800,
246};
247
Kaushal Kumar86473f02012-06-28 19:35:58 +0530248static struct acpuclk_pdata msm8625ab_acpuclk_pdata = {
249 .max_speed_delta_khz = 801600,
250};
251
Matt Wagantallbf430eb2012-03-22 11:45:49 -0700252struct platform_device msm8625_device_acpuclk = {
253 .name = "acpuclk-7627",
254 .id = -1,
255 .dev.platform_data = &msm8625_acpuclk_pdata,
256};
257
Kaushal Kumar86473f02012-06-28 19:35:58 +0530258struct platform_device msm8625ab_device_acpuclk = {
259 .name = "acpuclk-7627",
260 .id = -1,
261 .dev.platform_data = &msm8625ab_acpuclk_pdata,
262};
263
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700264struct platform_device msm_device_smd = {
265 .name = "msm_smd",
266 .id = -1,
267};
268
Angshuman Sarkarfb1cce92012-02-21 15:20:43 +0530269static struct resource smd_8625_resource[] = {
270 {
271 .name = "a9_m2a_0",
272 .start = MSM8625_INT_A9_M2A_0,
273 .flags = IORESOURCE_IRQ,
274 },
275 {
276 .name = "a9_m2a_5",
277 .start = MSM8625_INT_A9_M2A_5,
278 .flags = IORESOURCE_IRQ,
279 },
280};
281
282static struct smd_subsystem_config smd_8625_config_list[] = {
283 {
284 .irq_config_id = SMD_MODEM,
285 .subsys_name = "modem",
286 .edge = SMD_APPS_MODEM,
287
288 .smd_int.irq_name = "a9_m2a_0",
289 .smd_int.flags = IRQF_TRIGGER_RISING,
290 .smd_int.irq_id = -1,
291 .smd_int.device_name = "smd_dev",
292 .smd_int.dev_id = 0,
293
294 .smd_int.out_bit_pos = 1,
295 .smd_int.out_base = (void __iomem *)MSM_CSR_BASE,
296 .smd_int.out_offset = 0x400 + (0) * 4,
297
298 .smsm_int.irq_name = "a9_m2a_5",
299 .smsm_int.flags = IRQF_TRIGGER_RISING,
300 .smsm_int.irq_id = -1,
301 .smsm_int.device_name = "smsm_dev",
302 .smsm_int.dev_id = 0,
303
304 .smsm_int.out_bit_pos = 1,
305 .smsm_int.out_base = (void __iomem *)MSM_CSR_BASE,
306 .smsm_int.out_offset = 0x400 + (5) * 4,
307
308 }
309};
310
311static struct smd_platform smd_8625_platform_data = {
312 .num_ss_configs = ARRAY_SIZE(smd_8625_config_list),
313 .smd_ss_configs = smd_8625_config_list,
314};
315
316struct platform_device msm8625_device_smd = {
317 .name = "msm_smd",
318 .id = -1,
319 .resource = smd_8625_resource,
320 .num_resources = ARRAY_SIZE(smd_8625_resource),
321 .dev = {
322 .platform_data = &smd_8625_platform_data,
323 }
324};
325
Laxminath Kasam5faa1ca2012-02-15 12:06:45 +0530326static struct resource resources_adsp[] = {
327 {
328 .start = INT_ADSP_A9_A11,
329 .end = INT_ADSP_A9_A11,
330 .flags = IORESOURCE_IRQ,
331 },
332};
333
334struct platform_device msm_adsp_device = {
335 .name = "msm_adsp",
336 .id = -1,
337 .num_resources = ARRAY_SIZE(resources_adsp),
338 .resource = resources_adsp,
339};
340
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700341static struct resource resources_uart1[] = {
342 {
343 .start = INT_UART1,
344 .end = INT_UART1,
345 .flags = IORESOURCE_IRQ,
346 },
347 {
Taniya Das13b811a2011-12-09 18:33:45 +0530348 .start = MSM7XXX_UART1_PHYS,
349 .end = MSM7XXX_UART1_PHYS + MSM7XXX_UART1_SIZE - 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700350 .flags = IORESOURCE_MEM,
351 },
352};
353
354struct platform_device msm_device_uart1 = {
355 .name = "msm_serial",
356 .id = 0,
357 .num_resources = ARRAY_SIZE(resources_uart1),
358 .resource = resources_uart1,
359};
360
361#define MSM_UART1DM_PHYS 0xA0200000
362static struct resource msm_uart1_dm_resources[] = {
363 {
364 .start = MSM_UART1DM_PHYS,
365 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 {
369 .start = INT_UART1DM_IRQ,
370 .end = INT_UART1DM_IRQ,
371 .flags = IORESOURCE_IRQ,
372 },
373 {
374 .start = INT_UART1DM_RX,
375 .end = INT_UART1DM_RX,
376 .flags = IORESOURCE_IRQ,
377 },
378 {
379 .start = DMOV_HSUART1_TX_CHAN,
380 .end = DMOV_HSUART1_RX_CHAN,
381 .name = "uartdm_channels",
382 .flags = IORESOURCE_DMA,
383 },
384 {
385 .start = DMOV_HSUART1_TX_CRCI,
386 .end = DMOV_HSUART1_RX_CRCI,
387 .name = "uartdm_crci",
388 .flags = IORESOURCE_DMA,
389 },
390};
391
392static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
393struct platform_device msm_device_uart_dm1 = {
394 .name = "msm_serial_hs",
395 .id = 0,
396 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
397 .resource = msm_uart1_dm_resources,
398 .dev = {
399 .dma_mask = &msm_uart_dm1_dma_mask,
400 .coherent_dma_mask = DMA_BIT_MASK(32),
401 },
402};
403
404#define MSM_UART2DM_PHYS 0xA0300000
405static struct resource msm_uart2dm_resources[] = {
406 {
407 .start = MSM_UART2DM_PHYS,
408 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
409 .name = "uartdm_resource",
410 .flags = IORESOURCE_MEM,
411 },
412 {
413 .start = INT_UART2DM_IRQ,
414 .end = INT_UART2DM_IRQ,
415 .flags = IORESOURCE_IRQ,
416 },
417};
418
419struct platform_device msm_device_uart_dm2 = {
420 .name = "msm_serial_hsl",
421 .id = 0,
422 .num_resources = ARRAY_SIZE(msm_uart2dm_resources),
423 .resource = msm_uart2dm_resources,
424};
425
426#define MSM_NAND_PHYS 0xA0A00000
427#define MSM_NANDC01_PHYS 0xA0A40000
428#define MSM_NANDC10_PHYS 0xA0A80000
429#define MSM_NANDC11_PHYS 0xA0AC0000
430#define EBI2_REG_BASE 0xA0D00000
431static struct resource resources_nand[] = {
432 [0] = {
433 .name = "msm_nand_dmac",
434 .start = DMOV_NAND_CHAN,
435 .end = DMOV_NAND_CHAN,
436 .flags = IORESOURCE_DMA,
437 },
438 [1] = {
439 .name = "msm_nand_phys",
440 .start = MSM_NAND_PHYS,
441 .end = MSM_NAND_PHYS + 0x7FF,
442 .flags = IORESOURCE_MEM,
443 },
444 [2] = {
445 .name = "msm_nandc01_phys",
446 .start = MSM_NANDC01_PHYS,
447 .end = MSM_NANDC01_PHYS + 0x7FF,
448 .flags = IORESOURCE_MEM,
449 },
450 [3] = {
451 .name = "msm_nandc10_phys",
452 .start = MSM_NANDC10_PHYS,
453 .end = MSM_NANDC10_PHYS + 0x7FF,
454 .flags = IORESOURCE_MEM,
455 },
456 [4] = {
457 .name = "msm_nandc11_phys",
458 .start = MSM_NANDC11_PHYS,
459 .end = MSM_NANDC11_PHYS + 0x7FF,
460 .flags = IORESOURCE_MEM,
461 },
462 [5] = {
463 .name = "ebi2_reg_base",
464 .start = EBI2_REG_BASE,
465 .end = EBI2_REG_BASE + 0x60,
466 .flags = IORESOURCE_MEM,
467 },
468};
469
Sujit Reddy Thummaec9b3252012-04-23 15:53:45 +0530470struct flash_platform_data msm_nand_data = {
471 .version = VERSION_2,
472};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700473
474struct platform_device msm_device_nand = {
475 .name = "msm_nand",
476 .id = -1,
477 .num_resources = ARRAY_SIZE(resources_nand),
478 .resource = resources_nand,
479 .dev = {
480 .platform_data = &msm_nand_data,
481 },
482};
483
Murali Nalajala2a0bbda2012-03-28 12:12:54 +0530484static struct msm_pm_irq_calls msm7x27a_pm_irq_calls = {
485 .irq_pending = msm_irq_pending,
486 .idle_sleep_allowed = msm_irq_idle_sleep_allowed,
487 .enter_sleep1 = msm_irq_enter_sleep1,
488 .enter_sleep2 = msm_irq_enter_sleep2,
489 .exit_sleep1 = msm_irq_exit_sleep1,
490 .exit_sleep2 = msm_irq_exit_sleep2,
491 .exit_sleep3 = msm_irq_exit_sleep3,
492};
493
494static struct msm_pm_irq_calls msm8625_pm_irq_calls = {
495 .irq_pending = msm_gic_spi_ppi_pending,
496 .idle_sleep_allowed = msm_gic_irq_idle_sleep_allowed,
497 .enter_sleep1 = msm_gic_irq_enter_sleep1,
498 .enter_sleep2 = msm_gic_irq_enter_sleep2,
499 .exit_sleep1 = msm_gic_irq_exit_sleep1,
500 .exit_sleep2 = msm_gic_irq_exit_sleep2,
501 .exit_sleep3 = msm_gic_irq_exit_sleep3,
502};
503
Stephen Boyd986c9632012-04-24 16:31:45 -0700504void __init msm_pm_register_irqs(void)
Murali Nalajala2a0bbda2012-03-28 12:12:54 +0530505{
506 if (cpu_is_msm8625())
507 msm_pm_set_irq_extns(&msm8625_pm_irq_calls);
508 else
509 msm_pm_set_irq_extns(&msm7x27a_pm_irq_calls);
510
511}
512
Murali Nalajalaff723ec2012-07-13 16:54:40 +0530513static struct msm_pm_cpr_ops msm8625_pm_cpr_ops = {
514 .cpr_suspend = msm_cpr_pm_suspend,
515 .cpr_resume = msm_cpr_pm_resume,
516};
517
518void __init msm_pm_register_cpr_ops(void)
519{
520 /* CPR presents on revision >= v2.0 chipsets */
521 if (cpu_is_msm8625() &&
522 SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2)
523 msm_pm_set_cpr_ops(&msm8625_pm_cpr_ops);
524}
525
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700526#define MSM_SDC1_BASE 0xA0400000
527#define MSM_SDC2_BASE 0xA0500000
528#define MSM_SDC3_BASE 0xA0600000
529#define MSM_SDC4_BASE 0xA0700000
530static struct resource resources_sdc1[] = {
531 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530532 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700533 .start = MSM_SDC1_BASE,
534 .end = MSM_SDC1_BASE + SZ_4K - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530538 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700539 .start = INT_SDC1_0,
540 .end = INT_SDC1_1,
541 .flags = IORESOURCE_IRQ,
542 },
543 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530544 .name = "dma_chnl",
Krishna Konda25786ec2011-07-25 16:21:36 -0700545 .start = DMOV_SDC1_CHAN,
546 .end = DMOV_SDC1_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700547 .flags = IORESOURCE_DMA,
548 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700549 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530550 .name = "dma_crci",
Krishna Konda25786ec2011-07-25 16:21:36 -0700551 .start = DMOV_SDC1_CRCI,
552 .end = DMOV_SDC1_CRCI,
553 .flags = IORESOURCE_DMA,
554 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700555};
556
557static struct resource resources_sdc2[] = {
558 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530559 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700560 .start = MSM_SDC2_BASE,
561 .end = MSM_SDC2_BASE + SZ_4K - 1,
562 .flags = IORESOURCE_MEM,
563 },
564 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530565 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700566 .start = INT_SDC2_0,
567 .end = INT_SDC2_1,
568 .flags = IORESOURCE_IRQ,
569 },
570 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530571 .name = "dma_chnl",
Krishna Konda25786ec2011-07-25 16:21:36 -0700572 .start = DMOV_SDC2_CHAN,
573 .end = DMOV_SDC2_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700574 .flags = IORESOURCE_DMA,
575 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700576 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530577 .name = "dma_crci",
Krishna Konda25786ec2011-07-25 16:21:36 -0700578 .start = DMOV_SDC2_CRCI,
579 .end = DMOV_SDC2_CRCI,
580 .flags = IORESOURCE_DMA,
581 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700582};
583
584static struct resource resources_sdc3[] = {
585 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530586 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700587 .start = MSM_SDC3_BASE,
588 .end = MSM_SDC3_BASE + SZ_4K - 1,
589 .flags = IORESOURCE_MEM,
590 },
591 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530592 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700593 .start = INT_SDC3_0,
594 .end = INT_SDC3_1,
595 .flags = IORESOURCE_IRQ,
596 },
597 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530598 .name = "dma_chnl",
Subhash Jadavanif29aefd2012-06-21 00:43:15 +0530599 .start = DMOV_NAND_CHAN,
600 .end = DMOV_NAND_CHAN,
Krishna Konda25786ec2011-07-25 16:21:36 -0700601 .flags = IORESOURCE_DMA,
602 },
603 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530604 .name = "dma_crci",
Sujit Reddy Thumma119bfbb2011-10-12 11:52:21 +0530605 .start = DMOV_SDC3_CRCI,
606 .end = DMOV_SDC3_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700607 .flags = IORESOURCE_DMA,
608 },
609};
610
611static struct resource resources_sdc4[] = {
612 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530613 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700614 .start = MSM_SDC4_BASE,
615 .end = MSM_SDC4_BASE + SZ_4K - 1,
616 .flags = IORESOURCE_MEM,
617 },
618 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530619 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700620 .start = INT_SDC4_0,
621 .end = INT_SDC4_1,
622 .flags = IORESOURCE_IRQ,
623 },
624 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530625 .name = "dma_chnl",
Sujit Reddy Thumma119bfbb2011-10-12 11:52:21 +0530626 .start = DMOV_SDC4_CHAN,
627 .end = DMOV_SDC4_CHAN,
Krishna Konda25786ec2011-07-25 16:21:36 -0700628 .flags = IORESOURCE_DMA,
629 },
630 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530631 .name = "dma_crci",
Sujit Reddy Thumma119bfbb2011-10-12 11:52:21 +0530632 .start = DMOV_SDC4_CRCI,
633 .end = DMOV_SDC4_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700634 .flags = IORESOURCE_DMA,
635 },
636};
637
638struct platform_device msm_device_sdc1 = {
639 .name = "msm_sdcc",
640 .id = 1,
641 .num_resources = ARRAY_SIZE(resources_sdc1),
642 .resource = resources_sdc1,
643 .dev = {
644 .coherent_dma_mask = 0xffffffff,
645 },
646};
647
648struct platform_device msm_device_sdc2 = {
649 .name = "msm_sdcc",
650 .id = 2,
651 .num_resources = ARRAY_SIZE(resources_sdc2),
652 .resource = resources_sdc2,
653 .dev = {
654 .coherent_dma_mask = 0xffffffff,
655 },
656};
657
658struct platform_device msm_device_sdc3 = {
659 .name = "msm_sdcc",
660 .id = 3,
661 .num_resources = ARRAY_SIZE(resources_sdc3),
662 .resource = resources_sdc3,
663 .dev = {
664 .coherent_dma_mask = 0xffffffff,
665 },
666};
667
668struct platform_device msm_device_sdc4 = {
669 .name = "msm_sdcc",
670 .id = 4,
671 .num_resources = ARRAY_SIZE(resources_sdc4),
672 .resource = resources_sdc4,
673 .dev = {
674 .coherent_dma_mask = 0xffffffff,
675 },
676};
677
678static struct platform_device *msm_sdcc_devices[] __initdata = {
679 &msm_device_sdc1,
680 &msm_device_sdc2,
681 &msm_device_sdc3,
682 &msm_device_sdc4,
683};
684
Suresh Vankadara20cd3be72012-01-18 00:34:06 +0530685#ifdef CONFIG_MSM_CAMERA_V4L2
Suresh Vankadara6050cef52012-04-16 21:44:59 +0530686static int apps_reset;
Suresh Vankadara20cd3be72012-01-18 00:34:06 +0530687static struct resource msm_csic0_resources[] = {
688 {
689 .name = "csic",
690 .start = 0xA0F00000,
691 .end = 0xA0F00000 + 0x00100000 - 1,
692 .flags = IORESOURCE_MEM,
693 },
694 {
695 .name = "csic",
696 .start = INT_CSI_IRQ_0,
697 .end = INT_CSI_IRQ_0,
698 .flags = IORESOURCE_IRQ,
699 },
700};
701
702static struct resource msm_csic1_resources[] = {
703 {
704 .name = "csic",
705 .start = 0xA1000000,
706 .end = 0xA1000000 + 0x00100000 - 1,
707 .flags = IORESOURCE_MEM,
708 },
709 {
710 .name = "csic",
711 .start = INT_CSI_IRQ_1,
712 .end = INT_CSI_IRQ_1,
713 .flags = IORESOURCE_IRQ,
714 },
715};
716
717struct platform_device msm7x27a_device_csic0 = {
718 .name = "msm_csic",
719 .id = 0,
720 .resource = msm_csic0_resources,
721 .num_resources = ARRAY_SIZE(msm_csic0_resources),
722};
723
724struct platform_device msm7x27a_device_csic1 = {
725 .name = "msm_csic",
726 .id = 1,
727 .resource = msm_csic1_resources,
728 .num_resources = ARRAY_SIZE(msm_csic1_resources),
729};
730
731static struct resource msm_clkctl_resources[] = {
732 {
733 .name = "clk_ctl",
Taniya Das13b811a2011-12-09 18:33:45 +0530734 .start = MSM7XXX_CLK_CTL_PHYS,
735 .end = MSM7XXX_CLK_CTL_PHYS + MSM7XXX_CLK_CTL_SIZE - 1,
Suresh Vankadara20cd3be72012-01-18 00:34:06 +0530736 .flags = IORESOURCE_MEM,
737 },
738};
739struct platform_device msm7x27a_device_clkctl = {
740 .name = "msm_clk_ctl",
741 .id = 0,
742 .resource = msm_clkctl_resources,
743 .num_resources = ARRAY_SIZE(msm_clkctl_resources),
Suresh Vankadara6050cef52012-04-16 21:44:59 +0530744 .dev = {
745 .platform_data = &apps_reset,
746 },
Suresh Vankadara20cd3be72012-01-18 00:34:06 +0530747};
748
749struct platform_device msm7x27a_device_vfe = {
750 .name = "msm_vfe",
751 .id = 0,
752};
753
754#endif
755
Murali Nalajala41786ab2012-03-06 10:47:32 +0530756/* Command sequence for simple WFI */
757static uint8_t spm_wfi_cmd_sequence[] __initdata = {
Murali Nalajala2250a272012-03-13 15:56:59 +0530758 0x04, 0x03, 0x04, 0x0f,
Murali Nalajala41786ab2012-03-06 10:47:32 +0530759};
760
761/* Command sequence for GDFS, this won't send any interrupt to the modem */
762static uint8_t spm_pc_without_modem[] __initdata = {
763 0x20, 0x00, 0x30, 0x10,
Murali Nalajala2250a272012-03-13 15:56:59 +0530764 0x03, 0x1e, 0x0e, 0x3e,
765 0x4e, 0x4e, 0x4e, 0x4e,
766 0x4e, 0x4e, 0x4e, 0x4e,
767 0x4e, 0x4e, 0x4e, 0x4e,
768 0x4e, 0x4e, 0x4e, 0x4e,
769 0x2E, 0x0f,
Murali Nalajala41786ab2012-03-06 10:47:32 +0530770};
771
772static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
773 [0] = {
774 .mode = MSM_SPM_MODE_CLOCK_GATING,
775 .notify_rpm = false,
776 .cmd = spm_wfi_cmd_sequence,
777 },
778 [1] = {
779 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
780 .notify_rpm = false,
781 .cmd = spm_pc_without_modem,
782 },
783};
784
785static struct msm_spm_platform_data msm_spm_data[] __initdata = {
786 [0] = {
787 .reg_base_addr = MSM_SAW0_BASE,
788 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x0,
789 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
790 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
791 .modes = msm_spm_seq_list,
792 },
793 [1] = {
794 .reg_base_addr = MSM_SAW1_BASE,
795 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x0,
796 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
797 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
798 .modes = msm_spm_seq_list,
799 },
800};
801
802void __init msm8x25_spm_device_init(void)
803{
804 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
805}
806
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700807#define MDP_BASE 0xAA200000
808#define MIPI_DSI_HW_BASE 0xA1100000
809
810static struct resource msm_mipi_dsi_resources[] = {
811 {
812 .name = "mipi_dsi",
813 .start = MIPI_DSI_HW_BASE,
814 .end = MIPI_DSI_HW_BASE + 0x000F0000 - 1,
815 .flags = IORESOURCE_MEM,
816 },
817 {
818 .start = INT_DSI_IRQ,
819 .end = INT_DSI_IRQ,
820 .flags = IORESOURCE_IRQ,
821 },
822};
823
824static struct platform_device msm_mipi_dsi_device = {
825 .name = "mipi_dsi",
826 .id = 1,
827 .num_resources = ARRAY_SIZE(msm_mipi_dsi_resources),
828 .resource = msm_mipi_dsi_resources,
829};
830
831static struct resource msm_mdp_resources[] = {
832 {
833 .name = "mdp",
834 .start = MDP_BASE,
835 .end = MDP_BASE + 0x000F1008 - 1,
836 .flags = IORESOURCE_MEM,
837 },
838 {
839 .start = INT_MDP,
840 .end = INT_MDP,
841 .flags = IORESOURCE_IRQ,
842 },
843};
844
845static struct platform_device msm_mdp_device = {
846 .name = "mdp",
847 .id = 0,
848 .num_resources = ARRAY_SIZE(msm_mdp_resources),
849 .resource = msm_mdp_resources,
850};
851
Padmanabhan Komandurue77bcf52012-07-26 12:43:39 +0530852struct platform_device msm_lcdc_device = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700853 .name = "lcdc",
854 .id = 0,
855};
856
857static struct resource kgsl_3d0_resources[] = {
858 {
859 .name = KGSL_3D0_REG_MEMORY,
860 .start = 0xA0000000,
861 .end = 0xA001ffff,
862 .flags = IORESOURCE_MEM,
863 },
864 {
865 .name = KGSL_3D0_IRQ,
866 .start = INT_GRAPHICS,
867 .end = INT_GRAPHICS,
868 .flags = IORESOURCE_IRQ,
869 },
870};
871
872static struct kgsl_device_platform_data kgsl_3d0_pdata = {
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600873 .pwrlevel = {
874 {
875 .gpu_freq = 245760000,
876 .bus_freq = 200000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700877 },
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600878 {
Lynus Vazeaf0aac2012-01-05 12:28:47 +0530879 .gpu_freq = 192000000,
880 .bus_freq = 160000000,
881 },
882 {
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600883 .gpu_freq = 133330000,
884 .bus_freq = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700885 },
886 },
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600887 .init_level = 0,
Lynus Vazeaf0aac2012-01-05 12:28:47 +0530888 .num_levels = 3,
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600889 .set_grp_async = set_grp_xbar_async,
Sudhakara Rao Tentu38ad6e12012-03-30 15:25:18 -0700890 .idle_timeout = HZ,
Lynus Vazfe4bede2012-04-06 11:53:30 -0700891 .strtstp_sleepwake = true,
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600892 .nap_allowed = false,
893 .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700894};
895
896struct platform_device msm_kgsl_3d0 = {
897 .name = "kgsl-3d0",
898 .id = 0,
899 .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
900 .resource = kgsl_3d0_resources,
901 .dev = {
902 .platform_data = &kgsl_3d0_pdata,
903 },
904};
905
906void __init msm7x25a_kgsl_3d0_init(void)
907{
Pankaj Kumarfee56a82012-04-17 14:26:49 +0530908 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa() || cpu_is_msm7x25ab()) {
Lynus Vaz971610e2012-01-06 11:00:32 +0530909 kgsl_3d0_pdata.num_levels = 2;
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600910 kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 133330000;
911 kgsl_3d0_pdata.pwrlevel[0].bus_freq = 160000000;
912 kgsl_3d0_pdata.pwrlevel[1].gpu_freq = 96000000;
913 kgsl_3d0_pdata.pwrlevel[1].bus_freq = 0;
Rajesh Kemisettidf6e62f2012-03-12 14:02:30 +0530914 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700915}
916
Sudhakara Rao Tentu38ad6e12012-03-30 15:25:18 -0700917void __init msm8x25_kgsl_3d0_init(void)
918{
Lynus Vazfe4bede2012-04-06 11:53:30 -0700919 if (cpu_is_msm8625()) {
Sudhakara Rao Tentu38ad6e12012-03-30 15:25:18 -0700920 kgsl_3d0_pdata.idle_timeout = HZ/5;
Lynus Vazfe4bede2012-04-06 11:53:30 -0700921 kgsl_3d0_pdata.strtstp_sleepwake = false;
Ranjhith Kalisamy5fb30ef2012-08-12 16:26:36 +0530922
923 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2)
924 /* 8x25 v2.0 & above supports a higher GPU frequency */
925 kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 320000000;
926 else
927 kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 300000000;
928
Ranjhith Kalisamy24696322012-04-11 22:09:17 +0530929 kgsl_3d0_pdata.pwrlevel[0].bus_freq = 200000000;
Lynus Vazfe4bede2012-04-06 11:53:30 -0700930 }
Sudhakara Rao Tentu38ad6e12012-03-30 15:25:18 -0700931}
932
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700933static void __init msm_register_device(struct platform_device *pdev, void *data)
934{
935 int ret;
936
937 pdev->dev.platform_data = data;
938
939 ret = platform_device_register(pdev);
940
941 if (ret)
942 dev_err(&pdev->dev,
943 "%s: platform_device_register() failed = %d\n",
944 __func__, ret);
945}
946
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700947
948#define PERPH_WEB_BLOCK_ADDR (0xA9D00040)
949#define PDM0_CTL_OFFSET (0x04)
950#define SIZE_8B (0x08)
951
952static struct resource resources_led[] = {
953 {
954 .start = PERPH_WEB_BLOCK_ADDR,
955 .end = PERPH_WEB_BLOCK_ADDR + (SIZE_8B) - 1,
956 .name = "led-gpio-pdm",
957 .flags = IORESOURCE_MEM,
958 },
959};
960
961static struct led_info msm_kpbl_pdm_led_pdata = {
962 .name = "keyboard-backlight",
963};
964
965struct platform_device led_pdev = {
966 .name = "leds-msm-pdm",
967 /* use pdev id to represent pdm id */
968 .id = 0,
969 .num_resources = ARRAY_SIZE(resources_led),
970 .resource = resources_led,
971 .dev = {
972 .platform_data = &msm_kpbl_pdm_led_pdata,
973 },
974};
975
Manish Dewangan3a260992011-06-24 18:01:34 +0530976struct platform_device asoc_msm_pcm = {
977 .name = "msm-dsp-audio",
978 .id = 0,
979};
980
981struct platform_device asoc_msm_dai0 = {
982 .name = "msm-codec-dai",
983 .id = 0,
984};
985
986struct platform_device asoc_msm_dai1 = {
987 .name = "msm-cpu-dai",
988 .id = 0,
989};
990
Taniya Das2e948192011-12-20 11:15:13 +0530991static struct resource gpio_resources[] = {
992 {
993 .start = INT_GPIO_GROUP1,
994 .flags = IORESOURCE_IRQ,
995 },
996 {
997 .start = INT_GPIO_GROUP2,
998 .flags = IORESOURCE_IRQ,
999 },
1000};
1001
1002static struct platform_device msm_device_gpio = {
1003 .name = "msmgpio",
1004 .id = -1,
1005 .resource = gpio_resources,
1006 .num_resources = ARRAY_SIZE(gpio_resources),
1007};
1008
Taniya Das43bcdd62011-12-02 17:33:27 +05301009struct platform_device *msm_footswitch_devices[] = {
Matt Wagantalld6fbf232012-05-03 20:09:28 -07001010 FS_PCOM(FS_GFX3D, "vdd", "kgsl-3d0.0"),
Taniya Das43bcdd62011-12-02 17:33:27 +05301011};
1012unsigned msm_num_footswitch_devices = ARRAY_SIZE(msm_footswitch_devices);
1013
1014/* MSM8625 Devices */
1015
1016static struct resource msm8625_resources_uart1[] = {
1017 {
1018 .start = MSM8625_INT_UART1,
1019 .end = MSM8625_INT_UART1,
1020 .flags = IORESOURCE_IRQ,
1021 },
1022 {
Taniya Das13b811a2011-12-09 18:33:45 +05301023 .start = MSM7XXX_UART1_PHYS,
1024 .end = MSM7XXX_UART1_PHYS + MSM7XXX_UART1_SIZE - 1,
Taniya Das43bcdd62011-12-02 17:33:27 +05301025 .flags = IORESOURCE_MEM,
1026 },
1027};
1028
1029struct platform_device msm8625_device_uart1 = {
1030 .name = "msm_serial",
1031 .id = 0,
1032 .num_resources = ARRAY_SIZE(msm8625_resources_uart1),
1033 .resource = msm8625_resources_uart1,
1034};
1035
Trilok Soni269fff42012-02-13 20:35:30 +05301036static struct resource msm8625_uart1_dm_resources[] = {
1037 {
1038 .start = MSM_UART1DM_PHYS,
1039 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
1040 .flags = IORESOURCE_MEM,
1041 },
1042 {
1043 .start = MSM8625_INT_UART1DM_IRQ,
1044 .end = MSM8625_INT_UART1DM_IRQ,
1045 .flags = IORESOURCE_IRQ,
1046 },
1047 {
1048 .start = MSM8625_INT_UART1DM_RX,
1049 .end = MSM8625_INT_UART1DM_RX,
1050 .flags = IORESOURCE_IRQ,
1051 },
1052 {
1053 .start = DMOV_HSUART1_TX_CHAN,
1054 .end = DMOV_HSUART1_RX_CHAN,
1055 .name = "uartdm_channels",
1056 .flags = IORESOURCE_DMA,
1057 },
1058 {
1059 .start = DMOV_HSUART1_TX_CRCI,
1060 .end = DMOV_HSUART1_RX_CRCI,
1061 .name = "uartdm_crci",
1062 .flags = IORESOURCE_DMA,
1063 },
1064};
1065
1066struct platform_device msm8625_device_uart_dm1 = {
1067 .name = "msm_serial_hs",
1068 .id = 0,
1069 .num_resources = ARRAY_SIZE(msm8625_uart1_dm_resources),
1070 .resource = msm8625_uart1_dm_resources,
1071 .dev = {
1072 .dma_mask = &msm_uart_dm1_dma_mask,
1073 .coherent_dma_mask = DMA_BIT_MASK(32),
1074 },
1075};
1076
1077static struct resource msm8625_uart2dm_resources[] = {
1078 {
1079 .start = MSM_UART2DM_PHYS,
1080 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
1081 .name = "uartdm_resource",
1082 .flags = IORESOURCE_MEM,
1083 },
1084 {
1085 .start = MSM8625_INT_UART2DM_IRQ,
1086 .end = MSM8625_INT_UART2DM_IRQ,
1087 .flags = IORESOURCE_IRQ,
1088 },
1089};
1090
1091struct platform_device msm8625_device_uart_dm2 = {
1092 .name = "msm_serial_hsl",
1093 .id = 0,
1094 .num_resources = ARRAY_SIZE(msm8625_uart2dm_resources),
1095 .resource = msm8625_uart2dm_resources,
1096};
1097
Laxminath Kasam5faa1ca2012-02-15 12:06:45 +05301098static struct resource msm8625_resources_adsp[] = {
1099 {
1100 .start = MSM8625_INT_ADSP_A9_A11,
1101 .end = MSM8625_INT_ADSP_A9_A11,
1102 .flags = IORESOURCE_IRQ,
1103 },
1104};
1105
1106struct platform_device msm8625_device_adsp = {
1107 .name = "msm_adsp",
1108 .id = -1,
1109 .num_resources = ARRAY_SIZE(msm8625_resources_adsp),
1110 .resource = msm8625_resources_adsp,
1111};
1112
Taniya Das43bcdd62011-12-02 17:33:27 +05301113static struct resource msm8625_dmov_resource[] = {
1114 {
1115 .start = MSM8625_INT_ADM_AARM,
1116 .flags = IORESOURCE_IRQ,
1117 },
1118 {
1119 .start = 0xA9700000,
1120 .end = 0xA9700000 + SZ_4K - 1,
1121 .flags = IORESOURCE_MEM,
1122 },
1123};
1124
1125struct platform_device msm8625_device_dmov = {
1126 .name = "msm_dmov",
1127 .id = -1,
1128 .resource = msm8625_dmov_resource,
1129 .num_resources = ARRAY_SIZE(msm8625_dmov_resource),
1130 .dev = {
1131 .platform_data = &msm_dmov_pdata,
1132 },
1133};
Taniya Das2e948192011-12-20 11:15:13 +05301134
Taniya Das9d187142011-12-02 15:53:25 +05301135static struct resource gsbi0_msm8625_qup_resources[] = {
1136 {
1137 .name = "qup_phys_addr",
1138 .start = MSM_GSBI0_QUP_PHYS,
1139 .end = MSM_GSBI0_QUP_PHYS + SZ_4K - 1,
1140 .flags = IORESOURCE_MEM,
1141 },
1142 {
1143 .name = "gsbi_qup_i2c_addr",
1144 .start = MSM_GSBI0_PHYS,
1145 .end = MSM_GSBI0_PHYS + SZ_4K - 1,
1146 .flags = IORESOURCE_MEM,
1147 },
1148 {
1149 .name = "qup_err_intr",
1150 .start = MSM8625_INT_PWB_I2C,
1151 .end = MSM8625_INT_PWB_I2C,
1152 .flags = IORESOURCE_IRQ,
1153 },
1154};
1155
1156/* Use GSBI0 QUP for /dev/i2c-0 */
Taniya Dase3027e22012-02-27 16:32:27 +05301157struct platform_device msm8625_gsbi0_qup_i2c_device = {
Taniya Das9d187142011-12-02 15:53:25 +05301158 .name = "qup_i2c",
1159 .id = MSM_GSBI0_QUP_I2C_BUS_ID,
1160 .num_resources = ARRAY_SIZE(gsbi0_msm8625_qup_resources),
1161 .resource = gsbi0_msm8625_qup_resources,
1162};
1163
Trilok Soni633e59c2012-02-13 20:28:30 +05301164static struct resource gsbi1_msm8625_qup_i2c_resources[] = {
1165 {
1166 .name = "qup_phys_addr",
1167 .start = MSM_GSBI1_QUP_PHYS,
1168 .end = MSM_GSBI1_QUP_PHYS + SZ_4K - 1,
1169 .flags = IORESOURCE_MEM,
1170 },
1171 {
1172 .name = "gsbi_qup_i2c_addr",
1173 .start = MSM_GSBI1_PHYS,
1174 .end = MSM_GSBI1_PHYS + SZ_4K - 1,
1175 .flags = IORESOURCE_MEM,
1176 },
1177 {
1178 .name = "qup_err_intr",
1179 .start = MSM8625_INT_ARM11_DMA,
1180 .end = MSM8625_INT_ARM11_DMA,
1181 .flags = IORESOURCE_IRQ,
1182 },
1183};
1184
1185/* Use GSBI1 QUP for /dev/i2c-1 */
Taniya Dase3027e22012-02-27 16:32:27 +05301186struct platform_device msm8625_gsbi1_qup_i2c_device = {
Trilok Soni633e59c2012-02-13 20:28:30 +05301187 .name = "qup_i2c",
1188 .id = MSM_GSBI1_QUP_I2C_BUS_ID,
1189 .num_resources = ARRAY_SIZE(gsbi1_qup_i2c_resources),
1190 .resource = gsbi1_msm8625_qup_i2c_resources,
1191};
1192
Taniya Das6684d622012-01-12 10:29:09 +05301193static struct resource msm8625_gpio_resources[] = {
1194 {
1195 .start = MSM8625_INT_GPIO_GROUP1,
1196 .flags = IORESOURCE_IRQ,
1197 },
1198 {
1199 .start = MSM8625_INT_GPIO_GROUP2,
1200 .flags = IORESOURCE_IRQ,
1201 },
1202};
1203
1204static struct platform_device msm8625_device_gpio = {
1205 .name = "msmgpio",
1206 .id = -1,
1207 .resource = msm8625_gpio_resources,
1208 .num_resources = ARRAY_SIZE(msm8625_gpio_resources),
1209};
1210
Trilok Soniee75f6c2012-02-13 20:45:07 +05301211static struct resource msm8625_resources_sdc1[] = {
1212 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301213 .name = "core_mem",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301214 .start = MSM_SDC1_BASE,
1215 .end = MSM_SDC1_BASE + SZ_4K - 1,
1216 .flags = IORESOURCE_MEM,
1217 },
1218 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301219 .name = "core_irq",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301220 .start = MSM8625_INT_SDC1_0,
1221 .end = MSM8625_INT_SDC1_1,
1222 .flags = IORESOURCE_IRQ,
1223 },
1224 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301225 .name = "dma_chnl",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301226 .start = DMOV_SDC1_CHAN,
1227 .end = DMOV_SDC1_CHAN,
1228 .flags = IORESOURCE_DMA,
1229 },
1230 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301231 .name = "dma_crci",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301232 .start = DMOV_SDC1_CRCI,
1233 .end = DMOV_SDC1_CRCI,
1234 .flags = IORESOURCE_DMA,
1235 }
1236};
1237
1238static struct resource msm8625_resources_sdc2[] = {
1239 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301240 .name = "core_mem",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301241 .start = MSM_SDC2_BASE,
1242 .end = MSM_SDC2_BASE + SZ_4K - 1,
1243 .flags = IORESOURCE_MEM,
1244 },
1245 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301246 .name = "core_irq",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301247 .start = MSM8625_INT_SDC2_0,
1248 .end = MSM8625_INT_SDC2_1,
1249 .flags = IORESOURCE_IRQ,
1250 },
1251 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301252 .name = "dma_chnl",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301253 .start = DMOV_SDC2_CHAN,
1254 .end = DMOV_SDC2_CHAN,
1255 .flags = IORESOURCE_DMA,
1256 },
1257 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301258 .name = "dma_crci",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301259 .start = DMOV_SDC2_CRCI,
1260 .end = DMOV_SDC2_CRCI,
1261 .flags = IORESOURCE_DMA,
1262 }
1263};
1264
1265static struct resource msm8625_resources_sdc3[] = {
1266 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301267 .name = "core_mem",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301268 .start = MSM_SDC3_BASE,
1269 .end = MSM_SDC3_BASE + SZ_4K - 1,
1270 .flags = IORESOURCE_MEM,
1271 },
1272 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301273 .name = "core_irq",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301274 .start = MSM8625_INT_SDC3_0,
1275 .end = MSM8625_INT_SDC3_1,
1276 .flags = IORESOURCE_IRQ,
1277 },
1278 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301279 .name = "dma_chnl",
Pratibhasagar Vc483d202012-08-21 14:37:17 +05301280 .start = DMOV_NAND_CHAN,
1281 .end = DMOV_NAND_CHAN,
Trilok Soniee75f6c2012-02-13 20:45:07 +05301282 .flags = IORESOURCE_DMA,
1283 },
1284 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301285 .name = "dma_crci",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301286 .start = DMOV_SDC3_CRCI,
1287 .end = DMOV_SDC3_CRCI,
1288 .flags = IORESOURCE_DMA,
1289 },
1290};
1291
1292static struct resource msm8625_resources_sdc4[] = {
1293 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301294 .name = "core_mem",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301295 .start = MSM_SDC4_BASE,
1296 .end = MSM_SDC4_BASE + SZ_4K - 1,
1297 .flags = IORESOURCE_MEM,
1298 },
1299 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301300 .name = "core_irq",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301301 .start = MSM8625_INT_SDC4_0,
1302 .end = MSM8625_INT_SDC4_1,
1303 .flags = IORESOURCE_IRQ,
1304 },
1305 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301306 .name = "dma_chnl",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301307 .start = DMOV_SDC4_CHAN,
1308 .end = DMOV_SDC4_CHAN,
1309 .flags = IORESOURCE_DMA,
1310 },
1311 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +05301312 .name = "dma_crci",
Trilok Soniee75f6c2012-02-13 20:45:07 +05301313 .start = DMOV_SDC4_CRCI,
1314 .end = DMOV_SDC4_CRCI,
1315 .flags = IORESOURCE_DMA,
1316 },
1317};
1318
1319struct platform_device msm8625_device_sdc1 = {
1320 .name = "msm_sdcc",
1321 .id = 1,
1322 .num_resources = ARRAY_SIZE(msm8625_resources_sdc1),
1323 .resource = msm8625_resources_sdc1,
1324 .dev = {
1325 .coherent_dma_mask = 0xffffffff,
1326 },
1327};
1328
1329struct platform_device msm8625_device_sdc2 = {
1330 .name = "msm_sdcc",
1331 .id = 2,
1332 .num_resources = ARRAY_SIZE(msm8625_resources_sdc2),
1333 .resource = msm8625_resources_sdc2,
1334 .dev = {
1335 .coherent_dma_mask = 0xffffffff,
1336 },
1337};
1338
1339struct platform_device msm8625_device_sdc3 = {
1340 .name = "msm_sdcc",
1341 .id = 3,
1342 .num_resources = ARRAY_SIZE(msm8625_resources_sdc3),
1343 .resource = msm8625_resources_sdc3,
1344 .dev = {
1345 .coherent_dma_mask = 0xffffffff,
1346 },
1347};
1348
1349struct platform_device msm8625_device_sdc4 = {
1350 .name = "msm_sdcc",
1351 .id = 4,
1352 .num_resources = ARRAY_SIZE(msm8625_resources_sdc4),
1353 .resource = msm8625_resources_sdc4,
1354 .dev = {
1355 .coherent_dma_mask = 0xffffffff,
1356 },
1357};
1358
1359static struct platform_device *msm8625_sdcc_devices[] __initdata = {
1360 &msm8625_device_sdc1,
1361 &msm8625_device_sdc2,
1362 &msm8625_device_sdc3,
1363 &msm8625_device_sdc4,
1364};
1365
1366int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
1367{
1368 struct platform_device *pdev;
1369
1370 if (controller < 1 || controller > 4)
1371 return -EINVAL;
1372
1373 if (cpu_is_msm8625())
1374 pdev = msm8625_sdcc_devices[controller-1];
1375 else
1376 pdev = msm_sdcc_devices[controller-1];
1377
1378 pdev->dev.platform_data = plat;
1379 return platform_device_register(pdev);
1380}
1381
Trilok Sonida63a8b2012-02-13 20:50:03 +05301382static struct resource msm8625_resources_hsusb_otg[] = {
1383 {
1384 .start = MSM_HSUSB_PHYS,
1385 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
1386 .flags = IORESOURCE_MEM,
1387 },
1388 {
1389 .start = MSM8625_INT_USB_HS,
1390 .end = MSM8625_INT_USB_HS,
1391 .flags = IORESOURCE_IRQ,
1392 },
1393};
1394
1395struct platform_device msm8625_device_otg = {
1396 .name = "msm_otg",
1397 .id = -1,
1398 .num_resources = ARRAY_SIZE(msm8625_resources_hsusb_otg),
1399 .resource = msm8625_resources_hsusb_otg,
1400 .dev = {
1401 .dma_mask = &dma_mask,
1402 .coherent_dma_mask = 0xffffffffULL,
1403 },
1404};
1405
1406static struct resource msm8625_resources_gadget_peripheral[] = {
1407 {
1408 .start = MSM_HSUSB_PHYS,
1409 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
1410 .flags = IORESOURCE_MEM,
1411 },
1412 {
1413 .start = MSM8625_INT_USB_HS,
1414 .end = MSM8625_INT_USB_HS,
1415 .flags = IORESOURCE_IRQ,
1416 },
1417};
1418
1419struct platform_device msm8625_device_gadget_peripheral = {
1420 .name = "msm_hsusb",
1421 .id = -1,
1422 .num_resources = ARRAY_SIZE(msm8625_resources_gadget_peripheral),
1423 .resource = msm8625_resources_gadget_peripheral,
1424 .dev = {
1425 .dma_mask = &dma_mask,
1426 .coherent_dma_mask = 0xffffffffULL,
1427 },
1428};
1429
1430static struct resource msm8625_resources_hsusb_host[] = {
1431 {
1432 .start = MSM_HSUSB_PHYS,
1433 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
1434 .flags = IORESOURCE_MEM,
1435 },
1436 {
1437 .start = MSM8625_INT_USB_HS,
1438 .end = MSM8625_INT_USB_HS,
1439 .flags = IORESOURCE_IRQ,
1440 },
1441};
1442
1443struct platform_device msm8625_device_hsusb_host = {
1444 .name = "msm_hsusb_host",
1445 .id = 0,
1446 .num_resources = ARRAY_SIZE(msm8625_resources_hsusb_host),
1447 .resource = msm8625_resources_hsusb_host,
1448 .dev = {
1449 .dma_mask = &dma_mask,
1450 .coherent_dma_mask = 0xffffffffULL,
1451 },
1452};
1453
1454static struct platform_device *msm8625_host_devices[] = {
1455 &msm8625_device_hsusb_host,
1456};
1457
1458int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
1459{
1460 struct platform_device *pdev;
1461
1462 if (cpu_is_msm8625())
1463 pdev = msm8625_host_devices[host];
1464 else
1465 pdev = msm_host_devices[host];
1466 if (!pdev)
1467 return -ENODEV;
1468 pdev->dev.platform_data = plat;
1469 return platform_device_register(pdev);
1470}
1471
Trilok Soni88da2552012-02-13 21:01:24 +05301472#ifdef CONFIG_MSM_CAMERA_V4L2
1473static struct resource msm8625_csic0_resources[] = {
1474 {
1475 .name = "csic",
1476 .start = 0xA0F00000,
1477 .end = 0xA0F00000 + 0x00100000 - 1,
1478 .flags = IORESOURCE_MEM,
1479 },
1480 {
1481 .name = "csic",
1482 .start = MSM8625_INT_CSI_IRQ_0,
1483 .end = MSM8625_INT_CSI_IRQ_0,
1484 .flags = IORESOURCE_IRQ,
1485 },
1486};
1487
1488static struct resource msm8625_csic1_resources[] = {
1489 {
1490 .name = "csic",
1491 .start = 0xA1000000,
1492 .end = 0xA1000000 + 0x00100000 - 1,
1493 .flags = IORESOURCE_MEM,
1494 },
1495 {
1496 .name = "csic",
1497 .start = MSM8625_INT_CSI_IRQ_1,
1498 .end = MSM8625_INT_CSI_IRQ_1,
1499 .flags = IORESOURCE_IRQ,
1500 },
1501};
1502
1503struct platform_device msm8625_device_csic0 = {
1504 .name = "msm_csic",
1505 .id = 0,
1506 .resource = msm8625_csic0_resources,
1507 .num_resources = ARRAY_SIZE(msm8625_csic0_resources),
1508};
1509
1510struct platform_device msm8625_device_csic1 = {
1511 .name = "msm_csic",
1512 .id = 1,
1513 .resource = msm8625_csic1_resources,
1514 .num_resources = ARRAY_SIZE(msm8625_csic1_resources),
1515};
1516#endif
1517
Trilok Soniae4633d2012-02-13 21:08:32 +05301518static struct resource msm8625_mipi_dsi_resources[] = {
1519 {
1520 .name = "mipi_dsi",
1521 .start = MIPI_DSI_HW_BASE,
1522 .end = MIPI_DSI_HW_BASE + 0x000F0000 - 1,
1523 .flags = IORESOURCE_MEM,
1524 },
1525 {
1526 .start = MSM8625_INT_DSI_IRQ,
1527 .end = MSM8625_INT_DSI_IRQ,
1528 .flags = IORESOURCE_IRQ,
1529 },
1530};
1531
Padmanabhan Komanduru0b9517b2012-07-02 18:31:23 +05301532static struct platform_device msm8625_mipi_dsi_device = {
Trilok Soniae4633d2012-02-13 21:08:32 +05301533 .name = "mipi_dsi",
1534 .id = 1,
1535 .num_resources = ARRAY_SIZE(msm8625_mipi_dsi_resources),
1536 .resource = msm8625_mipi_dsi_resources,
1537};
1538
1539static struct resource msm8625_mdp_resources[] = {
1540 {
1541 .name = "mdp",
1542 .start = MDP_BASE,
1543 .end = MDP_BASE + 0x000F1008 - 1,
1544 .flags = IORESOURCE_MEM,
1545 },
1546 {
1547 .start = MSM8625_INT_MDP,
1548 .end = MSM8625_INT_MDP,
1549 .flags = IORESOURCE_IRQ,
1550 },
1551};
1552
1553static struct platform_device msm8625_mdp_device = {
1554 .name = "mdp",
1555 .id = 0,
1556 .num_resources = ARRAY_SIZE(msm8625_mdp_resources),
1557 .resource = msm8625_mdp_resources,
1558};
1559
Padmanabhan Komanduru0b9517b2012-07-02 18:31:23 +05301560struct platform_device mipi_dsi_device;
1561
Trilok Soniae4633d2012-02-13 21:08:32 +05301562void __init msm_fb_register_device(char *name, void *data)
1563{
1564 if (!strncmp(name, "mdp", 3)) {
1565 if (cpu_is_msm8625())
1566 msm_register_device(&msm8625_mdp_device, data);
1567 else
1568 msm_register_device(&msm_mdp_device, data);
1569 } else if (!strncmp(name, "mipi_dsi", 8)) {
Padmanabhan Komanduru0b9517b2012-07-02 18:31:23 +05301570 if (cpu_is_msm8625()) {
Trilok Soniae4633d2012-02-13 21:08:32 +05301571 msm_register_device(&msm8625_mipi_dsi_device, data);
Padmanabhan Komanduru0b9517b2012-07-02 18:31:23 +05301572 mipi_dsi_device = msm8625_mipi_dsi_device;
1573 } else {
Trilok Soniae4633d2012-02-13 21:08:32 +05301574 msm_register_device(&msm_mipi_dsi_device, data);
Padmanabhan Komanduru0b9517b2012-07-02 18:31:23 +05301575 mipi_dsi_device = msm_mipi_dsi_device;
1576 }
Trilok Soniae4633d2012-02-13 21:08:32 +05301577 } else if (!strncmp(name, "lcdc", 4)) {
1578 msm_register_device(&msm_lcdc_device, data);
1579 } else {
1580 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
1581 }
1582}
1583
Trilok Soni664b95d2012-02-13 21:13:15 +05301584static struct resource msm8625_kgsl_3d0_resources[] = {
1585 {
1586 .name = KGSL_3D0_REG_MEMORY,
1587 .start = 0xA0000000,
1588 .end = 0xA001ffff,
1589 .flags = IORESOURCE_MEM,
1590 },
1591 {
1592 .name = KGSL_3D0_IRQ,
1593 .start = MSM8625_INT_GRAPHICS,
1594 .end = MSM8625_INT_GRAPHICS,
1595 .flags = IORESOURCE_IRQ,
1596 },
1597};
1598
1599struct platform_device msm8625_kgsl_3d0 = {
1600 .name = "kgsl-3d0",
1601 .id = 0,
1602 .num_resources = ARRAY_SIZE(msm8625_kgsl_3d0_resources),
1603 .resource = msm8625_kgsl_3d0_resources,
1604 .dev = {
1605 .platform_data = &kgsl_3d0_pdata,
1606 },
1607};
1608
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301609enum {
1610 MSM8625,
1611 MSM8625A,
1612 MSM8625AB,
1613};
1614
1615static int __init msm8625_cpu_id(void)
1616{
1617 int raw_id, cpu;
1618
1619 raw_id = socinfo_get_raw_id();
1620 switch (raw_id) {
1621 /* Part number for 1GHz part */
1622 case 0x770:
1623 case 0x771:
1624 case 0x77C:
1625 case 0x780:
1626 case 0x8D0:
1627 cpu = MSM8625;
1628 break;
1629 /* Part number for 1.2GHz part */
1630 case 0x773:
1631 case 0x774:
1632 case 0x781:
1633 case 0x8D1:
1634 cpu = MSM8625A;
1635 break;
1636 case 0x775:
1637 case 0x776:
Kaushal Kumar5b700f32012-09-05 16:50:19 +05301638 case 0x779:
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301639 case 0x77D:
1640 case 0x782:
1641 case 0x8D2:
1642 cpu = MSM8625AB;
1643 break;
1644 default:
1645 pr_err("Invalid Raw ID\n");
1646 return -ENODEV;
1647 }
1648 return cpu;
1649}
1650
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301651static struct resource cpr_resources[] = {
1652 {
1653 .start = MSM8625_INT_CPR_IRQ0,
1654 .flags = IORESOURCE_IRQ,
1655 },
1656 {
1657 .start = MSM8625_CPR_PHYS,
1658 .end = MSM8625_CPR_PHYS + SZ_4K - 1,
1659 .flags = IORESOURCE_MEM,
1660 },
1661};
1662
1663/**
1664 * These are various Vdd levels supported by PMIC
1665 */
1666static uint32_t msm_c2_pmic_mv[] __initdata = {
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301667 1300000, 1287500, 1275000, 1262500, 1250000,
1668 1237500, 1225000, 1212500, 1200000, 1187500,
1669 1175000, 1162500, 1150000, 1137500, 1125000,
1670 1112500, 1100000, 1087500, 1075000, 1062500,
1671 1050000, 1037500, 1025000, 1012500, 0, 0, 0,
1672 0, 0, 0, 0, 1000,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301673};
1674
1675/**
1676 * This data will be based on CPR mode of operation
1677 */
1678static struct msm_cpr_mode msm_cpr_mode_data[] = {
1679 [NORMAL_MODE] = {
1680 .ring_osc_data = {
1681 {0, },
1682 {0, },
1683 {0, },
1684 {0, },
1685 {0, },
1686 {0, },
1687 {0, },
1688 {0, },
1689 },
1690 .ring_osc = 0,
1691 .step_quot = ~0,
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301692 .tgt_volt_offset = 0,
Trilok Sonidb64ae92012-09-02 02:09:04 +05301693 .nom_Vmax = 1350000,
1694 .nom_Vmin = 1250000,
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301695 .calibrated_uV = 1100000,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301696 },
1697 [TURBO_MODE] = {
1698 .ring_osc_data = {
1699 {0, },
1700 {0, },
1701 {0, },
1702 {0, },
1703 {0, },
1704 {0, },
1705 {0, },
1706 {0, },
1707 },
1708 .ring_osc = 0,
1709 .step_quot = ~0,
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301710 .tgt_volt_offset = 0,
Trilok Sonidb64ae92012-09-02 02:09:04 +05301711 .turbo_Vmax = 1350000,
Kaushal Kumarf4fd5e22012-09-27 07:23:33 +05301712 .turbo_Vmin = 1100000,
Trilok Sonidb64ae92012-09-02 02:09:04 +05301713 .nom_Vmax = 1350000,
Kaushal Kumarf4fd5e22012-09-27 07:23:33 +05301714 .nom_Vmin = 1100000,
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301715 .calibrated_uV = 1300000,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301716 },
1717};
1718
1719struct msm_cpr_vp_data vp_data = {
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301720 .min_volt = 1000000,
1721 .max_volt = 1350000,
1722 .default_volt = 1300000,
1723 .step_size = 12500,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301724};
1725
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301726static uint32_t
1727msm_cpr_get_quot(uint32_t max_quot, uint32_t max_freq, uint32_t new_freq)
1728{
1729 uint32_t quot;
1730
1731 /* This formula is as per chip characterization data */
Kaushal Kumarddd521c2012-09-18 19:50:53 +05301732 quot = max_quot - (((max_freq - new_freq) * 7) / 10);
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301733
1734 return quot;
1735}
1736
1737static void msm_cpr_clk_enable(void)
1738{
1739 uint32_t reg_val;
1740
1741 /* Select TCXO (19.2MHz) as clock source */
1742 reg_val = readl_relaxed(A11S_TEST_BUS_SEL_ADDR);
1743 reg_val |= RBCPR_CLK_MUX_SEL;
1744 writel_relaxed(reg_val, A11S_TEST_BUS_SEL_ADDR);
1745
1746 /* Get CPR out of reset */
1747 writel_relaxed(0x1, RBCPR_SW_RESET_N);
1748}
1749
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301750static struct msm_cpr_config msm_cpr_pdata = {
1751 .ref_clk_khz = 19200,
Kaushal Kumarf4fd5e22012-09-27 07:23:33 +05301752 .delay_us = 1000,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301753 .irq_line = 0,
1754 .cpr_mode_data = msm_cpr_mode_data,
1755 .tgt_count_div_N = 1,
1756 .floor = 0,
1757 .ceiling = 40,
1758 .sw_vlevel = 20,
1759 .up_threshold = 1,
Kaushal Kumarf4fd5e22012-09-27 07:23:33 +05301760 .dn_threshold = 4,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301761 .up_margin = 0,
1762 .dn_margin = 0,
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301763 .max_nom_freq = 700800,
1764 .max_freq = 1401600,
1765 .max_quot = 0,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301766 .vp_data = &vp_data,
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301767 .get_quot = msm_cpr_get_quot,
1768 .clk_enable = msm_cpr_clk_enable,
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301769};
1770
1771static struct platform_device msm8625_device_cpr = {
1772 .name = "msm-cpr",
1773 .id = -1,
1774 .num_resources = ARRAY_SIZE(cpr_resources),
1775 .resource = cpr_resources,
1776 .dev = {
1777 .platform_data = &msm_cpr_pdata,
1778 },
1779};
1780
1781static struct platform_device msm8625_vp_device = {
1782 .name = "vp-regulator",
1783 .id = -1,
1784};
1785
1786static void __init msm_cpr_init(void)
1787{
1788 struct cpr_info_type *cpr_info = NULL;
1789 uint8_t ring_osc = 0;
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301790
1791 cpr_info = kzalloc(sizeof(struct cpr_info_type), GFP_KERNEL);
1792 if (!cpr_info) {
1793 pr_err("%s: Out of memory %d\n", __func__, -ENOMEM);
1794 return;
1795 }
1796
1797 msm_smem_get_cpr_info(cpr_info);
1798
1799 /**
1800 * Set the ring_osc based on efuse BIT(0)
1801 * CPR_fuse[0] = 0 selects 2nd RO (010)
1802 * CPR_fuse[0] = 1 select 3rd RO (011)
1803 */
1804 if (cpr_info->ring_osc == 0x0)
1805 ring_osc = 0x2;
1806 else if (cpr_info->ring_osc == 0x1)
1807 ring_osc = 0x3;
1808
1809 msm_cpr_mode_data[TURBO_MODE].ring_osc = ring_osc;
1810 msm_cpr_mode_data[NORMAL_MODE].ring_osc = ring_osc;
1811
1812 /* GCNT = 1000 nsec/52nsec (@TCX0=19.2Mhz) = 19.2 */
1813 msm_cpr_mode_data[TURBO_MODE].ring_osc_data[ring_osc].gcnt = 19;
1814 msm_cpr_mode_data[NORMAL_MODE].ring_osc_data[ring_osc].gcnt = 19;
1815
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301816 /**
1817 * The scaling factor and offset are as per chip characterization data
1818 * This formula is used since available fuse bits in the chip are not
1819 * enough to represent the value of maximum quot
1820 */
Trilok Soni7f311172012-09-02 15:15:33 +05301821 msm_cpr_pdata.max_quot = cpr_info->turbo_quot * 10 + 600;
Kaushal Kumarbcb46d92012-10-04 11:31:14 +05301822 /**
1823 * Fused Quot value for 1.2GHz on a 1.2GHz part is lower than
1824 * the quot value calculated using the scaling factor formula for
1825 * 1.2GHz when running on a 1.4GHz part. So, prop up the Quot for
1826 * a 1.2GHz part by a chip characterization recommended value.
1827 * Ditto for a 1.0GHz part.
1828 */
1829 if (msm8625_cpu_id() == MSM8625A) {
1830 msm_cpr_pdata.max_quot += 100;
1831 if (msm_cpr_pdata.max_quot > 1400)
1832 msm_cpr_pdata.max_quot = 1400;
1833 } else if (msm8625_cpu_id() == MSM8625) {
1834 msm_cpr_pdata.max_quot += 120;
1835 if (msm_cpr_pdata.max_quot > 1350)
1836 msm_cpr_pdata.max_quot = 1350;
1837 }
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301838
1839 /**
1840 * Bits 4:0 of pvs_fuse provide mapping to the safe boot up voltage.
1841 * Boot up mode is by default Turbo.
1842 */
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301843 msm_cpr_mode_data[TURBO_MODE].calibrated_uV =
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301844 msm_c2_pmic_mv[cpr_info->pvs_fuse & 0x1F];
1845
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301846 pr_debug("%s: cpr: ring_osc: 0x%x\n", __func__,
1847 msm_cpr_mode_data[TURBO_MODE].ring_osc);
1848 pr_debug("%s: cpr: turbo_quot: 0x%x\n", __func__, cpr_info->turbo_quot);
1849 pr_debug("%s: cpr: pvs_fuse: 0x%x\n", __func__, cpr_info->pvs_fuse);
1850 kfree(cpr_info);
1851
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301852 if (msm8625_cpu_id() == MSM8625A)
1853 msm_cpr_pdata.max_freq = 1209600;
1854 else if (msm8625_cpu_id() == MSM8625)
1855 msm_cpr_pdata.max_freq = 1008000;
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301856
Kaushal Kumard0e4c812012-08-22 16:30:09 +05301857 msm_cpr_clk_enable();
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301858
1859 platform_device_register(&msm8625_vp_device);
1860 platform_device_register(&msm8625_device_cpr);
1861}
1862
Taniya Das7c9f0512011-12-02 14:26:46 +05301863static struct clk_lookup msm_clock_8625_dummy[] = {
1864 CLK_DUMMY("core_clk", adm_clk.c, "msm_dmov", 0),
1865 CLK_DUMMY("adsp_clk", adsp_clk.c, NULL, 0),
1866 CLK_DUMMY("ahb_m_clk", ahb_m_clk.c, NULL, 0),
1867 CLK_DUMMY("ahb_s_clk", ahb_s_clk.c, NULL, 0),
1868 CLK_DUMMY("cam_m_clk", cam_m_clk.c, NULL, 0),
1869 CLK_DUMMY("csi_clk", csi1_clk.c, NULL, 0),
1870 CLK_DUMMY("csi_pclk", csi1_p_clk.c, NULL, 0),
1871 CLK_DUMMY("csi_vfe_clk", csi1_vfe_clk.c, NULL, 0),
1872 CLK_DUMMY("dsi_byte_clk", dsi_byte_clk.c, NULL, 0),
1873 CLK_DUMMY("dsi_clk", dsi_clk.c, NULL, 0),
1874 CLK_DUMMY("dsi_esc_clk", dsi_esc_clk.c, NULL, 0),
1875 CLK_DUMMY("dsi_pixel_clk", dsi_pixel_clk.c, NULL, 0),
1876 CLK_DUMMY("dsi_ref_clk", dsi_ref_clk.c, NULL, 0),
1877 CLK_DUMMY("ebi1_clk", ebi1_clk.c, NULL, 0),
1878 CLK_DUMMY("ebi2_clk", ebi2_clk.c, NULL, 0),
1879 CLK_DUMMY("ecodec_clk", ecodec_clk.c, NULL, 0),
1880 CLK_DUMMY("gp_clk", gp_clk.c, NULL, 0),
1881 CLK_DUMMY("core_clk", gsbi1_qup_clk.c, "qup_i2c.0", 0),
1882 CLK_DUMMY("core_clk", gsbi2_qup_clk.c, "qup_i2c.1", 0),
1883 CLK_DUMMY("iface_clk", gsbi1_qup_p_clk.c, "qup_i2c.0", 0),
1884 CLK_DUMMY("iface_clk", gsbi2_qup_p_clk.c, "qup_i2c.1", 0),
1885 CLK_DUMMY("icodec_rx_clk", icodec_rx_clk.c, NULL, 0),
1886 CLK_DUMMY("icodec_tx_clk", icodec_tx_clk.c, NULL, 0),
1887 CLK_DUMMY("mem_clk", imem_clk.c, NULL, 0),
1888 CLK_DUMMY("mddi_clk", pmdh_clk.c, NULL, 0),
1889 CLK_DUMMY("mdp_clk", mdp_clk.c, NULL, 0),
1890 CLK_DUMMY("mdp_lcdc_pclk_clk", mdp_lcdc_pclk_clk.c, NULL, 0),
1891 CLK_DUMMY("mdp_lcdc_pad_pclk_clk", mdp_lcdc_pad_pclk_clk.c, NULL, 0),
1892 CLK_DUMMY("mdp_vsync_clk", mdp_vsync_clk.c, NULL, 0),
1893 CLK_DUMMY("mdp_dsi_pclk", mdp_dsi_p_clk.c, NULL, 0),
1894 CLK_DUMMY("pbus_clk", pbus_clk.c, NULL, 0),
1895 CLK_DUMMY("pcm_clk", pcm_clk.c, NULL, 0),
1896 CLK_DUMMY("sdac_clk", sdac_clk.c, NULL, 0),
1897 CLK_DUMMY("core_clk", sdc1_clk.c, "msm_sdcc.1", 0),
1898 CLK_DUMMY("iface_clk", sdc1_p_clk.c, "msm_sdcc.1", 0),
1899 CLK_DUMMY("core_clk", sdc2_clk.c, "msm_sdcc.2", 0),
1900 CLK_DUMMY("iface_clk", sdc2_p_clk.c, "msm_sdcc.2", 0),
1901 CLK_DUMMY("core_clk", sdc3_clk.c, "msm_sdcc.3", 0),
1902 CLK_DUMMY("iface_clk", sdc3_p_clk.c, "msm_sdcc.3", 0),
1903 CLK_DUMMY("core_clk", sdc4_clk.c, "msm_sdcc.4", 0),
1904 CLK_DUMMY("iface_clk", sdc4_p_clk.c, "msm_sdcc.4", 0),
1905 CLK_DUMMY("ref_clk", tsif_ref_clk.c, "msm_tsif.0", 0),
1906 CLK_DUMMY("iface_clk", tsif_p_clk.c, "msm_tsif.0", 0),
1907 CLK_DUMMY("core_clk", uart1_clk.c, "msm_serial.0", 0),
1908 CLK_DUMMY("core_clk", uart2_clk.c, "msm_serial.1", 0),
1909 CLK_DUMMY("core_clk", uart1dm_clk.c, "msm_serial_hs.0", 0),
1910 CLK_DUMMY("core_clk", uart2dm_clk.c, "msm_serial_hsl.0", 0),
1911 CLK_DUMMY("usb_hs_core_clk", usb_hs_core_clk.c, NULL, 0),
1912 CLK_DUMMY("usb_hs2_clk", usb_hs2_clk.c, NULL, 0),
1913 CLK_DUMMY("usb_hs_clk", usb_hs_clk.c, NULL, 0),
1914 CLK_DUMMY("usb_hs_pclk", usb_hs_p_clk.c, NULL, 0),
1915 CLK_DUMMY("usb_phy_clk", usb_phy_clk.c, NULL, 0),
1916 CLK_DUMMY("vdc_clk", vdc_clk.c, NULL, 0),
1917 CLK_DUMMY("ebi1_acpu_clk", ebi_acpu_clk.c, NULL, 0),
1918 CLK_DUMMY("ebi1_lcdc_clk", ebi_lcdc_clk.c, NULL, 0),
1919 CLK_DUMMY("ebi1_mddi_clk", ebi_mddi_clk.c, NULL, 0),
1920 CLK_DUMMY("ebi1_usb_clk", ebi_usb_clk.c, NULL, 0),
1921 CLK_DUMMY("ebi1_vfe_clk", ebi_vfe_clk.c, NULL, 0),
1922 CLK_DUMMY("mem_clk", ebi_adm_clk.c, "msm_dmov", 0),
1923};
1924
1925struct clock_init_data msm8625_dummy_clock_init_data __initdata = {
1926 .table = msm_clock_8625_dummy,
1927 .size = ARRAY_SIZE(msm_clock_8625_dummy),
1928};
Pankaj Kumar50c705c2012-01-10 12:02:07 +05301929
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001930int __init msm7x2x_misc_init(void)
1931{
Taniya Das7c9f0512011-12-02 14:26:46 +05301932 if (machine_is_msm8625_rumi3()) {
1933 msm_clock_init(&msm8625_dummy_clock_init_data);
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301934 msm_cpr_init();
Taniya Das43bcdd62011-12-02 17:33:27 +05301935 return 0;
Taniya Das7c9f0512011-12-02 14:26:46 +05301936 }
Taniya Das43bcdd62011-12-02 17:33:27 +05301937
Stephen Boydbb600ae2011-08-02 20:11:40 -07001938 msm_clock_init(&msm7x27a_clock_init_data);
Pankaj Kumarfee56a82012-04-17 14:26:49 +05301939 if (cpu_is_msm7x27aa() || cpu_is_msm7x25ab())
Matt Wagantallbf430eb2012-03-22 11:45:49 -07001940 platform_device_register(&msm7x27aa_device_acpuclk);
Pankaj Kumar50c705c2012-01-10 12:02:07 +05301941 else if (cpu_is_msm8625()) {
1942 if (msm8625_cpu_id() == MSM8625)
Matt Wagantallbf430eb2012-03-22 11:45:49 -07001943 platform_device_register(&msm7x27aa_device_acpuclk);
Pankaj Kumar50c705c2012-01-10 12:02:07 +05301944 else if (msm8625_cpu_id() == MSM8625A)
Matt Wagantallbf430eb2012-03-22 11:45:49 -07001945 platform_device_register(&msm8625_device_acpuclk);
Kaushal Kumar86473f02012-06-28 19:35:58 +05301946 else if (msm8625_cpu_id() == MSM8625AB)
1947 platform_device_register(&msm8625ab_device_acpuclk);
Matt Wagantallbf430eb2012-03-22 11:45:49 -07001948 } else {
1949 platform_device_register(&msm7x27a_device_acpuclk);
1950 }
Kaushal Kumarc0e5d672012-07-31 16:07:49 +05301951
1952 if (cpu_is_msm8625() &&
1953 (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2))
1954 msm_cpr_init();
1955
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001956 return 0;
1957}
1958
1959#ifdef CONFIG_CACHE_L2X0
1960static int __init msm7x27x_cache_init(void)
1961{
1962 int aux_ctrl = 0;
Prachee Ramsinghani86b1f652012-04-03 16:01:30 +05301963 int pctrl = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001964
1965 /* Way Size 010(0x2) 32KB */
1966 aux_ctrl = (0x1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | \
1967 (0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | \
1968 (0x1 << L2X0_AUX_CTRL_EVNT_MON_BUS_EN_SHIFT);
1969
Taniya Das379b5682011-12-02 14:53:46 +05301970 if (cpu_is_msm8625()) {
1971 /* Way Size 011(0x3) 64KB */
1972 aux_ctrl |= (0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | \
1973 (0x1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) | \
Prachee Ramsinghani86b1f652012-04-03 16:01:30 +05301974 (0X1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) | \
1975 (0x1 << L2X0_AUX_CTRL_L2_FORCE_NWA_SHIFT);
1976
1977 /* Write Prefetch Control settings */
1978 pctrl = readl_relaxed(MSM_L2CC_BASE + L2X0_PREFETCH_CTRL);
1979 pctrl |= (0x3 << L2X0_PREFETCH_CTRL_OFFSET_SHIFT) | \
1980 (0x1 << L2X0_PREFETCH_CTRL_WRAP8_INC_SHIFT) | \
1981 (0x1 << L2X0_PREFETCH_CTRL_WRAP8_SHIFT);
1982 writel_relaxed(pctrl , MSM_L2CC_BASE + L2X0_PREFETCH_CTRL);
Taniya Das379b5682011-12-02 14:53:46 +05301983 }
1984
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001985 l2x0_init(MSM_L2CC_BASE, aux_ctrl, L2X0_AUX_CTRL_MASK);
Prachee Ramsinghani86b1f652012-04-03 16:01:30 +05301986 if (cpu_is_msm8625()) {
1987 pctrl = readl_relaxed(MSM_L2CC_BASE + L2X0_PREFETCH_CTRL);
1988 pr_info("Prfetch Ctrl: 0x%08x\n", pctrl);
1989 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001990
1991 return 0;
1992}
1993#else
pankaj kumar80d7cb62011-08-23 13:37:55 +05301994static int __init msm7x27x_cache_init(void){ return 0; }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001995#endif
1996
1997void __init msm_common_io_init(void)
1998{
1999 msm_map_common_io();
Taniya Das43bcdd62011-12-02 17:33:27 +05302000 if (socinfo_init() < 0)
2001 pr_err("%s: socinfo_init() failed!\n", __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002002 msm7x27x_cache_init();
Taniya Das43bcdd62011-12-02 17:33:27 +05302003}
2004
2005void __init msm8625_init_irq(void)
2006{
Trilok Soni1a9fdee2012-05-28 19:54:11 +05302007 msm_gic_irq_extn_init();
Taniya Das43bcdd62011-12-02 17:33:27 +05302008 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
2009 (void *)MSM_QGIC_CPU_BASE);
Taniya Das43bcdd62011-12-02 17:33:27 +05302010}
2011
2012void __init msm8625_map_io(void)
2013{
2014 msm_map_msm8625_io();
2015
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07002016 if (socinfo_init() < 0)
2017 pr_err("%s: socinfo_init() failed!\n", __func__);
Taniya Das379b5682011-12-02 14:53:46 +05302018 msm7x27x_cache_init();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002019}
2020
Taniya Das43bcdd62011-12-02 17:33:27 +05302021static int msm7627a_init_gpio(void)
2022{
Taniya Das6684d622012-01-12 10:29:09 +05302023 if (cpu_is_msm8625())
2024 platform_device_register(&msm8625_device_gpio);
2025 else
2026 platform_device_register(&msm_device_gpio);
Taniya Das43bcdd62011-12-02 17:33:27 +05302027 return 0;
2028}
2029postcore_initcall(msm7627a_init_gpio);
Taniya Das9d0c3c52012-05-04 14:40:55 +05302030
2031static int msm7627a_panic_handler(struct notifier_block *this,
2032 unsigned long event, void *ptr)
2033{
2034 flush_cache_all();
2035 outer_flush_all();
2036 return NOTIFY_DONE;
2037}
2038
2039static struct notifier_block panic_handler = {
2040 .notifier_call = msm7627a_panic_handler,
Aparna Mallavarapua9990472012-09-26 12:25:24 +05302041 .priority = INT_MAX,
Taniya Das9d0c3c52012-05-04 14:40:55 +05302042};
2043
2044static int __init panic_register(void)
2045{
2046 atomic_notifier_chain_register(&panic_notifier_list,
2047 &panic_handler);
2048 return 0;
2049}
2050module_init(panic_register);