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Sergei Shtylyov33dced22007-02-07 18:18:45 +01001/*
Sergei Shtylyov33dced22007-02-07 18:18:45 +01002 * Copyright (C) 2002 Toshiba Corporation
3 * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
4 *
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
8 */
9
10#include <linux/types.h>
11#include <linux/pci.h>
12#include <linux/ide.h>
13
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020014static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
Sergei Shtylyov33dced22007-02-07 18:18:45 +010015{
16 ide_hwif_t *hwif = HWIF(drive);
17 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
Bartlomiej Zolnierkiewicz31e8a462007-10-19 00:30:08 +020018 u16 mode, scr = inw(scr_port);
Sergei Shtylyov33dced22007-02-07 18:18:45 +010019
Sergei Shtylyov33dced22007-02-07 18:18:45 +010020 switch (speed) {
21 case XFER_UDMA_4: mode = 0x00c0; break;
22 case XFER_UDMA_3: mode = 0x00b0; break;
23 case XFER_UDMA_2: mode = 0x00a0; break;
24 case XFER_UDMA_1: mode = 0x0090; break;
25 case XFER_UDMA_0: mode = 0x0080; break;
26 case XFER_MW_DMA_2: mode = 0x0070; break;
27 case XFER_MW_DMA_1: mode = 0x0060; break;
28 case XFER_MW_DMA_0: mode = 0x0050; break;
29 case XFER_PIO_4: mode = 0x0400; break;
30 case XFER_PIO_3: mode = 0x0300; break;
31 case XFER_PIO_2: mode = 0x0200; break;
32 case XFER_PIO_1: mode = 0x0100; break;
33 case XFER_PIO_0:
34 default: mode = 0x0000; break;
35 }
36
37 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
38 scr |= mode;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010039 outw(scr, scr_port);
Sergei Shtylyov33dced22007-02-07 18:18:45 +010040}
41
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020042static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio)
Sergei Shtylyov33dced22007-02-07 18:18:45 +010043{
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020044 tc86c001_set_mode(drive, XFER_PIO_0 + pio);
Sergei Shtylyov33dced22007-02-07 18:18:45 +010045}
46
47/*
48 * HACKITY HACK
49 *
50 * This is a workaround for the limitation 5 of the TC86C001 IDE controller:
51 * if a DMA transfer terminates prematurely, the controller leaves the device's
52 * interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
53 * set the interrupt bit in the DMA status register), thus no PCI interrupt
54 * will occur until a DMA transfer has been successfully completed.
55 *
56 * We work around this by initiating dummy, zero-length DMA transfer on
57 * a DMA timeout expiration. I found no better way to do this with the current
58 * IDE core than to temporarily replace a higher level driver's timer expiry
59 * handler with our own backing up to that handler in case our recovery fails.
60 */
61static int tc86c001_timer_expiry(ide_drive_t *drive)
62{
63 ide_hwif_t *hwif = HWIF(drive);
64 ide_expiry_t *expiry = ide_get_hwifdata(hwif);
65 ide_hwgroup_t *hwgroup = HWGROUP(drive);
Bartlomiej Zolnierkiewicz31e8a462007-10-19 00:30:08 +020066 u8 dma_stat = inb(hwif->dma_status);
Sergei Shtylyov33dced22007-02-07 18:18:45 +010067
68 /* Restore a higher level driver's expiry handler first. */
69 hwgroup->expiry = expiry;
70
71 if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */
72 unsigned long sc_base = hwif->config_data;
73 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
Bartlomiej Zolnierkiewicz31e8a462007-10-19 00:30:08 +020074 u8 dma_cmd = inb(hwif->dma_command);
Sergei Shtylyov33dced22007-02-07 18:18:45 +010075
76 printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
77 "attempting recovery...\n", drive->name);
78
79 /* Stop DMA */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010080 outb(dma_cmd & ~0x01, hwif->dma_command);
Sergei Shtylyov33dced22007-02-07 18:18:45 +010081
82 /* Setup the dummy DMA transfer */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010083 outw(0, sc_base + 0x0a); /* Sector Count */
84 outw(0, twcr_port); /* Transfer Word Count 1 or 2 */
Sergei Shtylyov33dced22007-02-07 18:18:45 +010085
86 /* Start the dummy DMA transfer */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010087 outb(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
88 outb(0x01, hwif->dma_command); /* set START_STOPBM */
Sergei Shtylyov33dced22007-02-07 18:18:45 +010089
90 /*
91 * If an interrupt was pending, it should come thru shortly.
92 * If not, a higher level driver's expiry handler should
93 * eventually cause some kind of recovery from the DMA stall.
94 */
95 return WAIT_MIN_SLEEP;
96 }
97
98 /* Chain to the restored expiry handler if DMA wasn't active. */
99 if (likely(expiry != NULL))
100 return expiry(drive);
101
102 /* If there was no handler, "emulate" that for ide_timer_expiry()... */
103 return -1;
104}
105
106static void tc86c001_dma_start(ide_drive_t *drive)
107{
108 ide_hwif_t *hwif = HWIF(drive);
109 ide_hwgroup_t *hwgroup = HWGROUP(drive);
110 unsigned long sc_base = hwif->config_data;
111 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
112 unsigned long nsectors = hwgroup->rq->nr_sectors;
113
114 /*
115 * We have to manually load the sector count and size into
116 * the appropriate system control registers for DMA to work
117 * with LBA48 and ATAPI devices...
118 */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100119 outw(nsectors, sc_base + 0x0a); /* Sector Count */
120 outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100121
122 /* Install our timeout expiry hook, saving the current handler... */
123 ide_set_hwifdata(hwif, hwgroup->expiry);
124 hwgroup->expiry = &tc86c001_timer_expiry;
125
126 ide_dma_start(drive);
127}
128
129static int tc86c001_busproc(ide_drive_t *drive, int state)
130{
131 ide_hwif_t *hwif = HWIF(drive);
132 unsigned long sc_base = hwif->config_data;
133 u16 scr1;
134
135 /* System Control 1 Register bit 11 (ATA Hard Reset) read */
Bartlomiej Zolnierkiewicz31e8a462007-10-19 00:30:08 +0200136 scr1 = inw(sc_base + 0x00);
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100137
138 switch (state) {
139 case BUSSTATE_ON:
140 if (!(scr1 & 0x0800))
141 return 0;
142 scr1 &= ~0x0800;
143
144 hwif->drives[0].failures = hwif->drives[1].failures = 0;
145 break;
146 case BUSSTATE_OFF:
147 if (scr1 & 0x0800)
148 return 0;
149 scr1 |= 0x0800;
150
151 hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
152 hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
153 break;
154 default:
155 return -EINVAL;
156 }
157
158 /* System Control 1 Register bit 11 (ATA Hard Reset) write */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100159 outw(scr1, sc_base + 0x00);
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100160 return 0;
161}
162
Bartlomiej Zolnierkiewiczbfa14b42008-02-02 19:56:31 +0100163static u8 __devinit tc86c001_cable_detect(ide_hwif_t *hwif)
164{
165 struct pci_dev *dev = to_pci_dev(hwif->dev);
166 unsigned long sc_base = pci_resource_start(dev, 5);
167 u16 scr1 = inw(sc_base + 0x00);
168
169 /*
170 * System Control 1 Register bit 13 (PDIAGN):
171 * 0=80-pin cable, 1=40-pin cable
172 */
173 return (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
174}
175
Adrian Bunke8ab7f52007-02-07 18:18:52 +0100176static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100177{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100178 struct pci_dev *dev = to_pci_dev(hwif->dev);
179 unsigned long sc_base = pci_resource_start(dev, 5);
Bartlomiej Zolnierkiewicz31e8a462007-10-19 00:30:08 +0200180 u16 scr1 = inw(sc_base + 0x00);
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100181
182 /* System Control 1 Register bit 15 (Soft Reset) set */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100183 outw(scr1 | 0x8000, sc_base + 0x00);
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100184
185 /* System Control 1 Register bit 14 (FIFO Reset) set */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100186 outw(scr1 | 0x4000, sc_base + 0x00);
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100187
188 /* System Control 1 Register: reset clear */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100189 outw(scr1 & ~0xc000, sc_base + 0x00);
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100190
191 /* Store the system control register base for convenience... */
192 hwif->config_data = sc_base;
193
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200194 hwif->set_pio_mode = &tc86c001_set_pio_mode;
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200195 hwif->set_dma_mode = &tc86c001_set_mode;
196
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100197 hwif->busproc = &tc86c001_busproc;
198
Bartlomiej Zolnierkiewiczbfa14b42008-02-02 19:56:31 +0100199 hwif->cable_detect = tc86c001_cable_detect;
200
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100201 if (!hwif->dma_base)
202 return;
203
204 /*
205 * Sector Count Control Register bits 0 and 1 set:
206 * software sets Sector Count Register for master and slave device
207 */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100208 outw(0x0003, sc_base + 0x0c);
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100209
210 /* Sector Count Register limit */
211 hwif->rqsize = 0xffff;
212
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100213 hwif->dma_start = &tc86c001_dma_start;
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100214}
215
Andrew Mortonba59c4b2007-02-07 18:19:01 +0100216static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
217 const char *name)
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100218{
219 int err = pci_request_region(dev, 5, name);
220
221 if (err)
222 printk(KERN_ERR "%s: system control regs already in use", name);
223 return err;
224}
225
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200226static const struct ide_port_info tc86c001_chipset __devinitdata = {
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100227 .name = "TC86C001",
228 .init_chipset = init_chipset_tc86c001,
229 .init_hwif = init_hwif_tc86c001,
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100230 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD |
231 IDE_HFLAG_ABUSE_SET_DMA_MODE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200232 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200233 .mwdma_mask = ATA_MWDMA2,
234 .udma_mask = ATA_UDMA4,
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100235};
236
237static int __devinit tc86c001_init_one(struct pci_dev *dev,
238 const struct pci_device_id *id)
239{
240 return ide_setup_pci_device(dev, &tc86c001_chipset);
241}
242
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200243static const struct pci_device_id tc86c001_pci_tbl[] = {
244 { PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE), 0 },
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100245 { 0, }
246};
247MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
248
249static struct pci_driver driver = {
250 .name = "TC86C001",
251 .id_table = tc86c001_pci_tbl,
252 .probe = tc86c001_init_one
253};
254
Bartlomiej Zolnierkiewicza534b682007-02-07 18:19:09 +0100255static int __init tc86c001_ide_init(void)
Sergei Shtylyov33dced22007-02-07 18:18:45 +0100256{
257 return ide_pci_register_driver(&driver);
258}
259module_init(tc86c001_ide_init);
260
261MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
262MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
263MODULE_LICENSE("GPL");