Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* Low-level parallel-port routines for 8255-based PC-style hardware. |
| 2 | * |
| 3 | * Authors: Phil Blundell <philb@gnu.org> |
| 4 | * Tim Waugh <tim@cyberelk.demon.co.uk> |
| 5 | * Jose Renau <renau@acm.org> |
| 6 | * David Campbell <campbell@torque.net> |
| 7 | * Andrea Arcangeli |
| 8 | * |
| 9 | * based on work by Grant Guenther <grant@torque.net> and Phil Blundell. |
| 10 | * |
| 11 | * Cleaned up include files - Russell King <linux@arm.uk.linux.org> |
| 12 | * DMA support - Bert De Jonghe <bert@sophis.be> |
| 13 | * Many ECP bugs fixed. Fred Barnes & Jamie Lokier, 1999 |
| 14 | * More PCI support now conditional on CONFIG_PCI, 03/2001, Paul G. |
| 15 | * Various hacks, Fred Barnes, 04/2001 |
| 16 | * Updated probing logic - Adam Belay <ambx1@neo.rr.com> |
| 17 | */ |
| 18 | |
| 19 | /* This driver should work with any hardware that is broadly compatible |
| 20 | * with that in the IBM PC. This applies to the majority of integrated |
| 21 | * I/O chipsets that are commonly available. The expected register |
| 22 | * layout is: |
| 23 | * |
| 24 | * base+0 data |
| 25 | * base+1 status |
| 26 | * base+2 control |
| 27 | * |
| 28 | * In addition, there are some optional registers: |
| 29 | * |
| 30 | * base+3 EPP address |
| 31 | * base+4 EPP data |
| 32 | * base+0x400 ECP config A |
| 33 | * base+0x401 ECP config B |
| 34 | * base+0x402 ECP control |
| 35 | * |
| 36 | * All registers are 8 bits wide and read/write. If your hardware differs |
| 37 | * only in register addresses (eg because your registers are on 32-bit |
| 38 | * word boundaries) then you can alter the constants in parport_pc.h to |
| 39 | * accommodate this. |
| 40 | * |
| 41 | * Note that the ECP registers may not start at offset 0x400 for PCI cards, |
| 42 | * but rather will start at port->base_hi. |
| 43 | */ |
| 44 | |
| 45 | #include <linux/config.h> |
| 46 | #include <linux/module.h> |
| 47 | #include <linux/init.h> |
| 48 | #include <linux/sched.h> |
| 49 | #include <linux/delay.h> |
| 50 | #include <linux/errno.h> |
| 51 | #include <linux/interrupt.h> |
| 52 | #include <linux/ioport.h> |
| 53 | #include <linux/kernel.h> |
| 54 | #include <linux/slab.h> |
| 55 | #include <linux/pci.h> |
| 56 | #include <linux/pnp.h> |
| 57 | #include <linux/sysctl.h> |
| 58 | |
| 59 | #include <asm/io.h> |
| 60 | #include <asm/dma.h> |
| 61 | #include <asm/uaccess.h> |
| 62 | |
| 63 | #include <linux/parport.h> |
| 64 | #include <linux/parport_pc.h> |
| 65 | #include <linux/via.h> |
| 66 | #include <asm/parport.h> |
| 67 | |
| 68 | #define PARPORT_PC_MAX_PORTS PARPORT_MAX |
| 69 | |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 70 | #ifdef CONFIG_ISA_DMA_API |
| 71 | #define HAS_DMA |
| 72 | #endif |
| 73 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | /* ECR modes */ |
| 75 | #define ECR_SPP 00 |
| 76 | #define ECR_PS2 01 |
| 77 | #define ECR_PPF 02 |
| 78 | #define ECR_ECP 03 |
| 79 | #define ECR_EPP 04 |
| 80 | #define ECR_VND 05 |
| 81 | #define ECR_TST 06 |
| 82 | #define ECR_CNF 07 |
| 83 | #define ECR_MODE_MASK 0xe0 |
| 84 | #define ECR_WRITE(p,v) frob_econtrol((p),0xff,(v)) |
| 85 | |
| 86 | #undef DEBUG |
| 87 | |
| 88 | #ifdef DEBUG |
| 89 | #define DPRINTK printk |
| 90 | #else |
| 91 | #define DPRINTK(stuff...) |
| 92 | #endif |
| 93 | |
| 94 | |
| 95 | #define NR_SUPERIOS 3 |
| 96 | static struct superio_struct { /* For Super-IO chips autodetection */ |
| 97 | int io; |
| 98 | int irq; |
| 99 | int dma; |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 100 | } superios[NR_SUPERIOS] = { {0,},}; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | |
| 102 | static int user_specified; |
| 103 | #if defined(CONFIG_PARPORT_PC_SUPERIO) || \ |
| 104 | (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO)) |
| 105 | static int verbose_probing; |
| 106 | #endif |
| 107 | static int pci_registered_parport; |
| 108 | static int pnp_registered_parport; |
| 109 | |
| 110 | /* frob_control, but for ECR */ |
| 111 | static void frob_econtrol (struct parport *pb, unsigned char m, |
| 112 | unsigned char v) |
| 113 | { |
| 114 | unsigned char ectr = 0; |
| 115 | |
| 116 | if (m != 0xff) |
| 117 | ectr = inb (ECONTROL (pb)); |
| 118 | |
| 119 | DPRINTK (KERN_DEBUG "frob_econtrol(%02x,%02x): %02x -> %02x\n", |
| 120 | m, v, ectr, (ectr & ~m) ^ v); |
| 121 | |
| 122 | outb ((ectr & ~m) ^ v, ECONTROL (pb)); |
| 123 | } |
| 124 | |
| 125 | static __inline__ void frob_set_mode (struct parport *p, int mode) |
| 126 | { |
| 127 | frob_econtrol (p, ECR_MODE_MASK, mode << 5); |
| 128 | } |
| 129 | |
| 130 | #ifdef CONFIG_PARPORT_PC_FIFO |
| 131 | /* Safely change the mode bits in the ECR |
| 132 | Returns: |
| 133 | 0 : Success |
| 134 | -EBUSY: Could not drain FIFO in some finite amount of time, |
| 135 | mode not changed! |
| 136 | */ |
| 137 | static int change_mode(struct parport *p, int m) |
| 138 | { |
| 139 | const struct parport_pc_private *priv = p->physport->private_data; |
| 140 | unsigned char oecr; |
| 141 | int mode; |
| 142 | |
| 143 | DPRINTK(KERN_INFO "parport change_mode ECP-ISA to mode 0x%02x\n",m); |
| 144 | |
| 145 | if (!priv->ecr) { |
| 146 | printk (KERN_DEBUG "change_mode: but there's no ECR!\n"); |
| 147 | return 0; |
| 148 | } |
| 149 | |
| 150 | /* Bits <7:5> contain the mode. */ |
| 151 | oecr = inb (ECONTROL (p)); |
| 152 | mode = (oecr >> 5) & 0x7; |
| 153 | if (mode == m) return 0; |
| 154 | |
| 155 | if (mode >= 2 && !(priv->ctr & 0x20)) { |
| 156 | /* This mode resets the FIFO, so we may |
| 157 | * have to wait for it to drain first. */ |
| 158 | unsigned long expire = jiffies + p->physport->cad->timeout; |
| 159 | int counter; |
| 160 | switch (mode) { |
| 161 | case ECR_PPF: /* Parallel Port FIFO mode */ |
| 162 | case ECR_ECP: /* ECP Parallel Port mode */ |
| 163 | /* Busy wait for 200us */ |
| 164 | for (counter = 0; counter < 40; counter++) { |
| 165 | if (inb (ECONTROL (p)) & 0x01) |
| 166 | break; |
| 167 | if (signal_pending (current)) break; |
| 168 | udelay (5); |
| 169 | } |
| 170 | |
| 171 | /* Poll slowly. */ |
| 172 | while (!(inb (ECONTROL (p)) & 0x01)) { |
| 173 | if (time_after_eq (jiffies, expire)) |
| 174 | /* The FIFO is stuck. */ |
| 175 | return -EBUSY; |
Nishanth Aravamudan | 7b4ccf8 | 2005-09-10 00:27:31 -0700 | [diff] [blame] | 176 | schedule_timeout_interruptible(msecs_to_jiffies(10)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | if (signal_pending (current)) |
| 178 | break; |
| 179 | } |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | if (mode >= 2 && m >= 2) { |
| 184 | /* We have to go through mode 001 */ |
| 185 | oecr &= ~(7 << 5); |
| 186 | oecr |= ECR_PS2 << 5; |
| 187 | ECR_WRITE (p, oecr); |
| 188 | } |
| 189 | |
| 190 | /* Set the mode. */ |
| 191 | oecr &= ~(7 << 5); |
| 192 | oecr |= m << 5; |
| 193 | ECR_WRITE (p, oecr); |
| 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | #ifdef CONFIG_PARPORT_1284 |
| 198 | /* Find FIFO lossage; FIFO is reset */ |
| 199 | #if 0 |
| 200 | static int get_fifo_residue (struct parport *p) |
| 201 | { |
| 202 | int residue; |
| 203 | int cnfga; |
| 204 | const struct parport_pc_private *priv = p->physport->private_data; |
| 205 | |
| 206 | /* Adjust for the contents of the FIFO. */ |
| 207 | for (residue = priv->fifo_depth; ; residue--) { |
| 208 | if (inb (ECONTROL (p)) & 0x2) |
| 209 | /* Full up. */ |
| 210 | break; |
| 211 | |
| 212 | outb (0, FIFO (p)); |
| 213 | } |
| 214 | |
| 215 | printk (KERN_DEBUG "%s: %d PWords were left in FIFO\n", p->name, |
| 216 | residue); |
| 217 | |
| 218 | /* Reset the FIFO. */ |
| 219 | frob_set_mode (p, ECR_PS2); |
| 220 | |
| 221 | /* Now change to config mode and clean up. FIXME */ |
| 222 | frob_set_mode (p, ECR_CNF); |
| 223 | cnfga = inb (CONFIGA (p)); |
| 224 | printk (KERN_DEBUG "%s: cnfgA contains 0x%02x\n", p->name, cnfga); |
| 225 | |
| 226 | if (!(cnfga & (1<<2))) { |
| 227 | printk (KERN_DEBUG "%s: Accounting for extra byte\n", p->name); |
| 228 | residue++; |
| 229 | } |
| 230 | |
| 231 | /* Don't care about partial PWords until support is added for |
| 232 | * PWord != 1 byte. */ |
| 233 | |
| 234 | /* Back to PS2 mode. */ |
| 235 | frob_set_mode (p, ECR_PS2); |
| 236 | |
| 237 | DPRINTK (KERN_DEBUG "*** get_fifo_residue: done residue collecting (ecr = 0x%2.2x)\n", inb (ECONTROL (p))); |
| 238 | return residue; |
| 239 | } |
| 240 | #endif /* 0 */ |
| 241 | #endif /* IEEE 1284 support */ |
| 242 | #endif /* FIFO support */ |
| 243 | |
| 244 | /* |
| 245 | * Clear TIMEOUT BIT in EPP MODE |
| 246 | * |
| 247 | * This is also used in SPP detection. |
| 248 | */ |
| 249 | static int clear_epp_timeout(struct parport *pb) |
| 250 | { |
| 251 | unsigned char r; |
| 252 | |
| 253 | if (!(parport_pc_read_status(pb) & 0x01)) |
| 254 | return 1; |
| 255 | |
| 256 | /* To clear timeout some chips require double read */ |
| 257 | parport_pc_read_status(pb); |
| 258 | r = parport_pc_read_status(pb); |
| 259 | outb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */ |
| 260 | outb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */ |
| 261 | r = parport_pc_read_status(pb); |
| 262 | |
| 263 | return !(r & 0x01); |
| 264 | } |
| 265 | |
| 266 | /* |
| 267 | * Access functions. |
| 268 | * |
| 269 | * Most of these aren't static because they may be used by the |
| 270 | * parport_xxx_yyy macros. extern __inline__ versions of several |
| 271 | * of these are in parport_pc.h. |
| 272 | */ |
| 273 | |
| 274 | static irqreturn_t parport_pc_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 275 | { |
| 276 | parport_generic_irq(irq, (struct parport *) dev_id, regs); |
| 277 | /* FIXME! Was it really ours? */ |
| 278 | return IRQ_HANDLED; |
| 279 | } |
| 280 | |
| 281 | static void parport_pc_init_state(struct pardevice *dev, struct parport_state *s) |
| 282 | { |
| 283 | s->u.pc.ctr = 0xc; |
| 284 | if (dev->irq_func && |
| 285 | dev->port->irq != PARPORT_IRQ_NONE) |
| 286 | /* Set ackIntEn */ |
| 287 | s->u.pc.ctr |= 0x10; |
| 288 | |
| 289 | s->u.pc.ecr = 0x34; /* NetMos chip can cause problems 0x24; |
| 290 | * D.Gruszka VScom */ |
| 291 | } |
| 292 | |
| 293 | static void parport_pc_save_state(struct parport *p, struct parport_state *s) |
| 294 | { |
| 295 | const struct parport_pc_private *priv = p->physport->private_data; |
| 296 | s->u.pc.ctr = priv->ctr; |
| 297 | if (priv->ecr) |
| 298 | s->u.pc.ecr = inb (ECONTROL (p)); |
| 299 | } |
| 300 | |
| 301 | static void parport_pc_restore_state(struct parport *p, struct parport_state *s) |
| 302 | { |
| 303 | struct parport_pc_private *priv = p->physport->private_data; |
| 304 | register unsigned char c = s->u.pc.ctr & priv->ctr_writable; |
| 305 | outb (c, CONTROL (p)); |
| 306 | priv->ctr = c; |
| 307 | if (priv->ecr) |
| 308 | ECR_WRITE (p, s->u.pc.ecr); |
| 309 | } |
| 310 | |
| 311 | #ifdef CONFIG_PARPORT_1284 |
| 312 | static size_t parport_pc_epp_read_data (struct parport *port, void *buf, |
| 313 | size_t length, int flags) |
| 314 | { |
| 315 | size_t got = 0; |
| 316 | |
| 317 | if (flags & PARPORT_W91284PIC) { |
| 318 | unsigned char status; |
| 319 | size_t left = length; |
| 320 | |
| 321 | /* use knowledge about data lines..: |
| 322 | * nFault is 0 if there is at least 1 byte in the Warp's FIFO |
| 323 | * pError is 1 if there are 16 bytes in the Warp's FIFO |
| 324 | */ |
| 325 | status = inb (STATUS (port)); |
| 326 | |
| 327 | while (!(status & 0x08) && (got < length)) { |
| 328 | if ((left >= 16) && (status & 0x20) && !(status & 0x08)) { |
| 329 | /* can grab 16 bytes from warp fifo */ |
| 330 | if (!((long)buf & 0x03)) { |
| 331 | insl (EPPDATA (port), buf, 4); |
| 332 | } else { |
| 333 | insb (EPPDATA (port), buf, 16); |
| 334 | } |
| 335 | buf += 16; |
| 336 | got += 16; |
| 337 | left -= 16; |
| 338 | } else { |
| 339 | /* grab single byte from the warp fifo */ |
| 340 | *((char *)buf) = inb (EPPDATA (port)); |
| 341 | buf++; |
| 342 | got++; |
| 343 | left--; |
| 344 | } |
| 345 | status = inb (STATUS (port)); |
| 346 | if (status & 0x01) { |
| 347 | /* EPP timeout should never occur... */ |
| 348 | printk (KERN_DEBUG "%s: EPP timeout occurred while talking to " |
| 349 | "w91284pic (should not have done)\n", port->name); |
| 350 | clear_epp_timeout (port); |
| 351 | } |
| 352 | } |
| 353 | return got; |
| 354 | } |
| 355 | if ((flags & PARPORT_EPP_FAST) && (length > 1)) { |
| 356 | if (!(((long)buf | length) & 0x03)) { |
| 357 | insl (EPPDATA (port), buf, (length >> 2)); |
| 358 | } else { |
| 359 | insb (EPPDATA (port), buf, length); |
| 360 | } |
| 361 | if (inb (STATUS (port)) & 0x01) { |
| 362 | clear_epp_timeout (port); |
| 363 | return -EIO; |
| 364 | } |
| 365 | return length; |
| 366 | } |
| 367 | for (; got < length; got++) { |
| 368 | *((char*)buf) = inb (EPPDATA(port)); |
| 369 | buf++; |
| 370 | if (inb (STATUS (port)) & 0x01) { |
| 371 | /* EPP timeout */ |
| 372 | clear_epp_timeout (port); |
| 373 | break; |
| 374 | } |
| 375 | } |
| 376 | |
| 377 | return got; |
| 378 | } |
| 379 | |
| 380 | static size_t parport_pc_epp_write_data (struct parport *port, const void *buf, |
| 381 | size_t length, int flags) |
| 382 | { |
| 383 | size_t written = 0; |
| 384 | |
| 385 | if ((flags & PARPORT_EPP_FAST) && (length > 1)) { |
| 386 | if (!(((long)buf | length) & 0x03)) { |
| 387 | outsl (EPPDATA (port), buf, (length >> 2)); |
| 388 | } else { |
| 389 | outsb (EPPDATA (port), buf, length); |
| 390 | } |
| 391 | if (inb (STATUS (port)) & 0x01) { |
| 392 | clear_epp_timeout (port); |
| 393 | return -EIO; |
| 394 | } |
| 395 | return length; |
| 396 | } |
| 397 | for (; written < length; written++) { |
| 398 | outb (*((char*)buf), EPPDATA(port)); |
| 399 | buf++; |
| 400 | if (inb (STATUS(port)) & 0x01) { |
| 401 | clear_epp_timeout (port); |
| 402 | break; |
| 403 | } |
| 404 | } |
| 405 | |
| 406 | return written; |
| 407 | } |
| 408 | |
| 409 | static size_t parport_pc_epp_read_addr (struct parport *port, void *buf, |
| 410 | size_t length, int flags) |
| 411 | { |
| 412 | size_t got = 0; |
| 413 | |
| 414 | if ((flags & PARPORT_EPP_FAST) && (length > 1)) { |
| 415 | insb (EPPADDR (port), buf, length); |
| 416 | if (inb (STATUS (port)) & 0x01) { |
| 417 | clear_epp_timeout (port); |
| 418 | return -EIO; |
| 419 | } |
| 420 | return length; |
| 421 | } |
| 422 | for (; got < length; got++) { |
| 423 | *((char*)buf) = inb (EPPADDR (port)); |
| 424 | buf++; |
| 425 | if (inb (STATUS (port)) & 0x01) { |
| 426 | clear_epp_timeout (port); |
| 427 | break; |
| 428 | } |
| 429 | } |
| 430 | |
| 431 | return got; |
| 432 | } |
| 433 | |
| 434 | static size_t parport_pc_epp_write_addr (struct parport *port, |
| 435 | const void *buf, size_t length, |
| 436 | int flags) |
| 437 | { |
| 438 | size_t written = 0; |
| 439 | |
| 440 | if ((flags & PARPORT_EPP_FAST) && (length > 1)) { |
| 441 | outsb (EPPADDR (port), buf, length); |
| 442 | if (inb (STATUS (port)) & 0x01) { |
| 443 | clear_epp_timeout (port); |
| 444 | return -EIO; |
| 445 | } |
| 446 | return length; |
| 447 | } |
| 448 | for (; written < length; written++) { |
| 449 | outb (*((char*)buf), EPPADDR (port)); |
| 450 | buf++; |
| 451 | if (inb (STATUS (port)) & 0x01) { |
| 452 | clear_epp_timeout (port); |
| 453 | break; |
| 454 | } |
| 455 | } |
| 456 | |
| 457 | return written; |
| 458 | } |
| 459 | |
| 460 | static size_t parport_pc_ecpepp_read_data (struct parport *port, void *buf, |
| 461 | size_t length, int flags) |
| 462 | { |
| 463 | size_t got; |
| 464 | |
| 465 | frob_set_mode (port, ECR_EPP); |
| 466 | parport_pc_data_reverse (port); |
| 467 | parport_pc_write_control (port, 0x4); |
| 468 | got = parport_pc_epp_read_data (port, buf, length, flags); |
| 469 | frob_set_mode (port, ECR_PS2); |
| 470 | |
| 471 | return got; |
| 472 | } |
| 473 | |
| 474 | static size_t parport_pc_ecpepp_write_data (struct parport *port, |
| 475 | const void *buf, size_t length, |
| 476 | int flags) |
| 477 | { |
| 478 | size_t written; |
| 479 | |
| 480 | frob_set_mode (port, ECR_EPP); |
| 481 | parport_pc_write_control (port, 0x4); |
| 482 | parport_pc_data_forward (port); |
| 483 | written = parport_pc_epp_write_data (port, buf, length, flags); |
| 484 | frob_set_mode (port, ECR_PS2); |
| 485 | |
| 486 | return written; |
| 487 | } |
| 488 | |
| 489 | static size_t parport_pc_ecpepp_read_addr (struct parport *port, void *buf, |
| 490 | size_t length, int flags) |
| 491 | { |
| 492 | size_t got; |
| 493 | |
| 494 | frob_set_mode (port, ECR_EPP); |
| 495 | parport_pc_data_reverse (port); |
| 496 | parport_pc_write_control (port, 0x4); |
| 497 | got = parport_pc_epp_read_addr (port, buf, length, flags); |
| 498 | frob_set_mode (port, ECR_PS2); |
| 499 | |
| 500 | return got; |
| 501 | } |
| 502 | |
| 503 | static size_t parport_pc_ecpepp_write_addr (struct parport *port, |
| 504 | const void *buf, size_t length, |
| 505 | int flags) |
| 506 | { |
| 507 | size_t written; |
| 508 | |
| 509 | frob_set_mode (port, ECR_EPP); |
| 510 | parport_pc_write_control (port, 0x4); |
| 511 | parport_pc_data_forward (port); |
| 512 | written = parport_pc_epp_write_addr (port, buf, length, flags); |
| 513 | frob_set_mode (port, ECR_PS2); |
| 514 | |
| 515 | return written; |
| 516 | } |
| 517 | #endif /* IEEE 1284 support */ |
| 518 | |
| 519 | #ifdef CONFIG_PARPORT_PC_FIFO |
| 520 | static size_t parport_pc_fifo_write_block_pio (struct parport *port, |
| 521 | const void *buf, size_t length) |
| 522 | { |
| 523 | int ret = 0; |
| 524 | const unsigned char *bufp = buf; |
| 525 | size_t left = length; |
| 526 | unsigned long expire = jiffies + port->physport->cad->timeout; |
| 527 | const int fifo = FIFO (port); |
| 528 | int poll_for = 8; /* 80 usecs */ |
| 529 | const struct parport_pc_private *priv = port->physport->private_data; |
| 530 | const int fifo_depth = priv->fifo_depth; |
| 531 | |
| 532 | port = port->physport; |
| 533 | |
| 534 | /* We don't want to be interrupted every character. */ |
| 535 | parport_pc_disable_irq (port); |
| 536 | /* set nErrIntrEn and serviceIntr */ |
| 537 | frob_econtrol (port, (1<<4) | (1<<2), (1<<4) | (1<<2)); |
| 538 | |
| 539 | /* Forward mode. */ |
| 540 | parport_pc_data_forward (port); /* Must be in PS2 mode */ |
| 541 | |
| 542 | while (left) { |
| 543 | unsigned char byte; |
| 544 | unsigned char ecrval = inb (ECONTROL (port)); |
| 545 | int i = 0; |
| 546 | |
| 547 | if (need_resched() && time_before (jiffies, expire)) |
| 548 | /* Can't yield the port. */ |
| 549 | schedule (); |
| 550 | |
| 551 | /* Anyone else waiting for the port? */ |
| 552 | if (port->waithead) { |
| 553 | printk (KERN_DEBUG "Somebody wants the port\n"); |
| 554 | break; |
| 555 | } |
| 556 | |
| 557 | if (ecrval & 0x02) { |
| 558 | /* FIFO is full. Wait for interrupt. */ |
| 559 | |
| 560 | /* Clear serviceIntr */ |
| 561 | ECR_WRITE (port, ecrval & ~(1<<2)); |
| 562 | false_alarm: |
| 563 | ret = parport_wait_event (port, HZ); |
| 564 | if (ret < 0) break; |
| 565 | ret = 0; |
| 566 | if (!time_before (jiffies, expire)) { |
| 567 | /* Timed out. */ |
| 568 | printk (KERN_DEBUG "FIFO write timed out\n"); |
| 569 | break; |
| 570 | } |
| 571 | ecrval = inb (ECONTROL (port)); |
| 572 | if (!(ecrval & (1<<2))) { |
| 573 | if (need_resched() && |
| 574 | time_before (jiffies, expire)) |
| 575 | schedule (); |
| 576 | |
| 577 | goto false_alarm; |
| 578 | } |
| 579 | |
| 580 | continue; |
| 581 | } |
| 582 | |
| 583 | /* Can't fail now. */ |
| 584 | expire = jiffies + port->cad->timeout; |
| 585 | |
| 586 | poll: |
| 587 | if (signal_pending (current)) |
| 588 | break; |
| 589 | |
| 590 | if (ecrval & 0x01) { |
| 591 | /* FIFO is empty. Blast it full. */ |
| 592 | const int n = left < fifo_depth ? left : fifo_depth; |
| 593 | outsb (fifo, bufp, n); |
| 594 | bufp += n; |
| 595 | left -= n; |
| 596 | |
| 597 | /* Adjust the poll time. */ |
| 598 | if (i < (poll_for - 2)) poll_for--; |
| 599 | continue; |
| 600 | } else if (i++ < poll_for) { |
| 601 | udelay (10); |
| 602 | ecrval = inb (ECONTROL (port)); |
| 603 | goto poll; |
| 604 | } |
| 605 | |
| 606 | /* Half-full (call me an optimist) */ |
| 607 | byte = *bufp++; |
| 608 | outb (byte, fifo); |
| 609 | left--; |
| 610 | } |
| 611 | |
| 612 | dump_parport_state ("leave fifo_write_block_pio", port); |
| 613 | return length - left; |
| 614 | } |
| 615 | |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 616 | #ifdef HAS_DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | static size_t parport_pc_fifo_write_block_dma (struct parport *port, |
| 618 | const void *buf, size_t length) |
| 619 | { |
| 620 | int ret = 0; |
| 621 | unsigned long dmaflag; |
| 622 | size_t left = length; |
| 623 | const struct parport_pc_private *priv = port->physport->private_data; |
| 624 | dma_addr_t dma_addr, dma_handle; |
| 625 | size_t maxlen = 0x10000; /* max 64k per DMA transfer */ |
| 626 | unsigned long start = (unsigned long) buf; |
| 627 | unsigned long end = (unsigned long) buf + length - 1; |
| 628 | |
| 629 | dump_parport_state ("enter fifo_write_block_dma", port); |
| 630 | if (end < MAX_DMA_ADDRESS) { |
| 631 | /* If it would cross a 64k boundary, cap it at the end. */ |
| 632 | if ((start ^ end) & ~0xffffUL) |
| 633 | maxlen = 0x10000 - (start & 0xffff); |
| 634 | |
| 635 | dma_addr = dma_handle = pci_map_single(priv->dev, (void *)buf, length, |
| 636 | PCI_DMA_TODEVICE); |
| 637 | } else { |
| 638 | /* above 16 MB we use a bounce buffer as ISA-DMA is not possible */ |
| 639 | maxlen = PAGE_SIZE; /* sizeof(priv->dma_buf) */ |
| 640 | dma_addr = priv->dma_handle; |
| 641 | dma_handle = 0; |
| 642 | } |
| 643 | |
| 644 | port = port->physport; |
| 645 | |
| 646 | /* We don't want to be interrupted every character. */ |
| 647 | parport_pc_disable_irq (port); |
| 648 | /* set nErrIntrEn and serviceIntr */ |
| 649 | frob_econtrol (port, (1<<4) | (1<<2), (1<<4) | (1<<2)); |
| 650 | |
| 651 | /* Forward mode. */ |
| 652 | parport_pc_data_forward (port); /* Must be in PS2 mode */ |
| 653 | |
| 654 | while (left) { |
| 655 | unsigned long expire = jiffies + port->physport->cad->timeout; |
| 656 | |
| 657 | size_t count = left; |
| 658 | |
| 659 | if (count > maxlen) |
| 660 | count = maxlen; |
| 661 | |
| 662 | if (!dma_handle) /* bounce buffer ! */ |
| 663 | memcpy(priv->dma_buf, buf, count); |
| 664 | |
| 665 | dmaflag = claim_dma_lock(); |
| 666 | disable_dma(port->dma); |
| 667 | clear_dma_ff(port->dma); |
| 668 | set_dma_mode(port->dma, DMA_MODE_WRITE); |
| 669 | set_dma_addr(port->dma, dma_addr); |
| 670 | set_dma_count(port->dma, count); |
| 671 | |
| 672 | /* Set DMA mode */ |
| 673 | frob_econtrol (port, 1<<3, 1<<3); |
| 674 | |
| 675 | /* Clear serviceIntr */ |
| 676 | frob_econtrol (port, 1<<2, 0); |
| 677 | |
| 678 | enable_dma(port->dma); |
| 679 | release_dma_lock(dmaflag); |
| 680 | |
| 681 | /* assume DMA will be successful */ |
| 682 | left -= count; |
| 683 | buf += count; |
| 684 | if (dma_handle) dma_addr += count; |
| 685 | |
| 686 | /* Wait for interrupt. */ |
| 687 | false_alarm: |
| 688 | ret = parport_wait_event (port, HZ); |
| 689 | if (ret < 0) break; |
| 690 | ret = 0; |
| 691 | if (!time_before (jiffies, expire)) { |
| 692 | /* Timed out. */ |
| 693 | printk (KERN_DEBUG "DMA write timed out\n"); |
| 694 | break; |
| 695 | } |
| 696 | /* Is serviceIntr set? */ |
| 697 | if (!(inb (ECONTROL (port)) & (1<<2))) { |
| 698 | cond_resched(); |
| 699 | |
| 700 | goto false_alarm; |
| 701 | } |
| 702 | |
| 703 | dmaflag = claim_dma_lock(); |
| 704 | disable_dma(port->dma); |
| 705 | clear_dma_ff(port->dma); |
| 706 | count = get_dma_residue(port->dma); |
| 707 | release_dma_lock(dmaflag); |
| 708 | |
| 709 | cond_resched(); /* Can't yield the port. */ |
| 710 | |
| 711 | /* Anyone else waiting for the port? */ |
| 712 | if (port->waithead) { |
| 713 | printk (KERN_DEBUG "Somebody wants the port\n"); |
| 714 | break; |
| 715 | } |
| 716 | |
| 717 | /* update for possible DMA residue ! */ |
| 718 | buf -= count; |
| 719 | left += count; |
| 720 | if (dma_handle) dma_addr -= count; |
| 721 | } |
| 722 | |
| 723 | /* Maybe got here through break, so adjust for DMA residue! */ |
| 724 | dmaflag = claim_dma_lock(); |
| 725 | disable_dma(port->dma); |
| 726 | clear_dma_ff(port->dma); |
| 727 | left += get_dma_residue(port->dma); |
| 728 | release_dma_lock(dmaflag); |
| 729 | |
| 730 | /* Turn off DMA mode */ |
| 731 | frob_econtrol (port, 1<<3, 0); |
| 732 | |
| 733 | if (dma_handle) |
| 734 | pci_unmap_single(priv->dev, dma_handle, length, PCI_DMA_TODEVICE); |
| 735 | |
| 736 | dump_parport_state ("leave fifo_write_block_dma", port); |
| 737 | return length - left; |
| 738 | } |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 739 | #endif |
| 740 | |
| 741 | static inline size_t parport_pc_fifo_write_block(struct parport *port, |
| 742 | const void *buf, size_t length) |
| 743 | { |
| 744 | #ifdef HAS_DMA |
| 745 | if (port->dma != PARPORT_DMA_NONE) |
| 746 | return parport_pc_fifo_write_block_dma (port, buf, length); |
| 747 | #endif |
| 748 | return parport_pc_fifo_write_block_pio (port, buf, length); |
| 749 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | |
| 751 | /* Parallel Port FIFO mode (ECP chipsets) */ |
| 752 | static size_t parport_pc_compat_write_block_pio (struct parport *port, |
| 753 | const void *buf, size_t length, |
| 754 | int flags) |
| 755 | { |
| 756 | size_t written; |
| 757 | int r; |
| 758 | unsigned long expire; |
| 759 | const struct parport_pc_private *priv = port->physport->private_data; |
| 760 | |
| 761 | /* Special case: a timeout of zero means we cannot call schedule(). |
| 762 | * Also if O_NONBLOCK is set then use the default implementation. */ |
| 763 | if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) |
| 764 | return parport_ieee1284_write_compat (port, buf, |
| 765 | length, flags); |
| 766 | |
| 767 | /* Set up parallel port FIFO mode.*/ |
| 768 | parport_pc_data_forward (port); /* Must be in PS2 mode */ |
| 769 | parport_pc_frob_control (port, PARPORT_CONTROL_STROBE, 0); |
| 770 | r = change_mode (port, ECR_PPF); /* Parallel port FIFO */ |
| 771 | if (r) printk (KERN_DEBUG "%s: Warning change_mode ECR_PPF failed\n", port->name); |
| 772 | |
| 773 | port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; |
| 774 | |
| 775 | /* Write the data to the FIFO. */ |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 776 | written = parport_pc_fifo_write_block(port, buf, length); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | |
| 778 | /* Finish up. */ |
| 779 | /* For some hardware we don't want to touch the mode until |
| 780 | * the FIFO is empty, so allow 4 seconds for each position |
| 781 | * in the fifo. |
| 782 | */ |
| 783 | expire = jiffies + (priv->fifo_depth * HZ * 4); |
| 784 | do { |
| 785 | /* Wait for the FIFO to empty */ |
| 786 | r = change_mode (port, ECR_PS2); |
| 787 | if (r != -EBUSY) { |
| 788 | break; |
| 789 | } |
| 790 | } while (time_before (jiffies, expire)); |
| 791 | if (r == -EBUSY) { |
| 792 | |
| 793 | printk (KERN_DEBUG "%s: FIFO is stuck\n", port->name); |
| 794 | |
| 795 | /* Prevent further data transfer. */ |
| 796 | frob_set_mode (port, ECR_TST); |
| 797 | |
| 798 | /* Adjust for the contents of the FIFO. */ |
| 799 | for (written -= priv->fifo_depth; ; written++) { |
| 800 | if (inb (ECONTROL (port)) & 0x2) { |
| 801 | /* Full up. */ |
| 802 | break; |
| 803 | } |
| 804 | outb (0, FIFO (port)); |
| 805 | } |
| 806 | |
| 807 | /* Reset the FIFO and return to PS2 mode. */ |
| 808 | frob_set_mode (port, ECR_PS2); |
| 809 | } |
| 810 | |
| 811 | r = parport_wait_peripheral (port, |
| 812 | PARPORT_STATUS_BUSY, |
| 813 | PARPORT_STATUS_BUSY); |
| 814 | if (r) |
| 815 | printk (KERN_DEBUG |
| 816 | "%s: BUSY timeout (%d) in compat_write_block_pio\n", |
| 817 | port->name, r); |
| 818 | |
| 819 | port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; |
| 820 | |
| 821 | return written; |
| 822 | } |
| 823 | |
| 824 | /* ECP */ |
| 825 | #ifdef CONFIG_PARPORT_1284 |
| 826 | static size_t parport_pc_ecp_write_block_pio (struct parport *port, |
| 827 | const void *buf, size_t length, |
| 828 | int flags) |
| 829 | { |
| 830 | size_t written; |
| 831 | int r; |
| 832 | unsigned long expire; |
| 833 | const struct parport_pc_private *priv = port->physport->private_data; |
| 834 | |
| 835 | /* Special case: a timeout of zero means we cannot call schedule(). |
| 836 | * Also if O_NONBLOCK is set then use the default implementation. */ |
| 837 | if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) |
| 838 | return parport_ieee1284_ecp_write_data (port, buf, |
| 839 | length, flags); |
| 840 | |
| 841 | /* Switch to forward mode if necessary. */ |
| 842 | if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) { |
| 843 | /* Event 47: Set nInit high. */ |
| 844 | parport_frob_control (port, |
| 845 | PARPORT_CONTROL_INIT |
| 846 | | PARPORT_CONTROL_AUTOFD, |
| 847 | PARPORT_CONTROL_INIT |
| 848 | | PARPORT_CONTROL_AUTOFD); |
| 849 | |
| 850 | /* Event 49: PError goes high. */ |
| 851 | r = parport_wait_peripheral (port, |
| 852 | PARPORT_STATUS_PAPEROUT, |
| 853 | PARPORT_STATUS_PAPEROUT); |
| 854 | if (r) { |
| 855 | printk (KERN_DEBUG "%s: PError timeout (%d) " |
| 856 | "in ecp_write_block_pio\n", port->name, r); |
| 857 | } |
| 858 | } |
| 859 | |
| 860 | /* Set up ECP parallel port mode.*/ |
| 861 | parport_pc_data_forward (port); /* Must be in PS2 mode */ |
| 862 | parport_pc_frob_control (port, |
| 863 | PARPORT_CONTROL_STROBE | |
| 864 | PARPORT_CONTROL_AUTOFD, |
| 865 | 0); |
| 866 | r = change_mode (port, ECR_ECP); /* ECP FIFO */ |
| 867 | if (r) printk (KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n", port->name); |
| 868 | port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; |
| 869 | |
| 870 | /* Write the data to the FIFO. */ |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 871 | written = parport_pc_fifo_write_block(port, buf, length); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | |
| 873 | /* Finish up. */ |
| 874 | /* For some hardware we don't want to touch the mode until |
| 875 | * the FIFO is empty, so allow 4 seconds for each position |
| 876 | * in the fifo. |
| 877 | */ |
| 878 | expire = jiffies + (priv->fifo_depth * (HZ * 4)); |
| 879 | do { |
| 880 | /* Wait for the FIFO to empty */ |
| 881 | r = change_mode (port, ECR_PS2); |
| 882 | if (r != -EBUSY) { |
| 883 | break; |
| 884 | } |
| 885 | } while (time_before (jiffies, expire)); |
| 886 | if (r == -EBUSY) { |
| 887 | |
| 888 | printk (KERN_DEBUG "%s: FIFO is stuck\n", port->name); |
| 889 | |
| 890 | /* Prevent further data transfer. */ |
| 891 | frob_set_mode (port, ECR_TST); |
| 892 | |
| 893 | /* Adjust for the contents of the FIFO. */ |
| 894 | for (written -= priv->fifo_depth; ; written++) { |
| 895 | if (inb (ECONTROL (port)) & 0x2) { |
| 896 | /* Full up. */ |
| 897 | break; |
| 898 | } |
| 899 | outb (0, FIFO (port)); |
| 900 | } |
| 901 | |
| 902 | /* Reset the FIFO and return to PS2 mode. */ |
| 903 | frob_set_mode (port, ECR_PS2); |
| 904 | |
| 905 | /* Host transfer recovery. */ |
| 906 | parport_pc_data_reverse (port); /* Must be in PS2 mode */ |
| 907 | udelay (5); |
| 908 | parport_frob_control (port, PARPORT_CONTROL_INIT, 0); |
| 909 | r = parport_wait_peripheral (port, PARPORT_STATUS_PAPEROUT, 0); |
| 910 | if (r) |
| 911 | printk (KERN_DEBUG "%s: PE,1 timeout (%d) " |
| 912 | "in ecp_write_block_pio\n", port->name, r); |
| 913 | |
| 914 | parport_frob_control (port, |
| 915 | PARPORT_CONTROL_INIT, |
| 916 | PARPORT_CONTROL_INIT); |
| 917 | r = parport_wait_peripheral (port, |
| 918 | PARPORT_STATUS_PAPEROUT, |
| 919 | PARPORT_STATUS_PAPEROUT); |
| 920 | if (r) |
| 921 | printk (KERN_DEBUG "%s: PE,2 timeout (%d) " |
| 922 | "in ecp_write_block_pio\n", port->name, r); |
| 923 | } |
| 924 | |
| 925 | r = parport_wait_peripheral (port, |
| 926 | PARPORT_STATUS_BUSY, |
| 927 | PARPORT_STATUS_BUSY); |
| 928 | if(r) |
| 929 | printk (KERN_DEBUG |
| 930 | "%s: BUSY timeout (%d) in ecp_write_block_pio\n", |
| 931 | port->name, r); |
| 932 | |
| 933 | port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; |
| 934 | |
| 935 | return written; |
| 936 | } |
| 937 | |
| 938 | #if 0 |
| 939 | static size_t parport_pc_ecp_read_block_pio (struct parport *port, |
| 940 | void *buf, size_t length, |
| 941 | int flags) |
| 942 | { |
| 943 | size_t left = length; |
| 944 | size_t fifofull; |
| 945 | int r; |
| 946 | const int fifo = FIFO(port); |
| 947 | const struct parport_pc_private *priv = port->physport->private_data; |
| 948 | const int fifo_depth = priv->fifo_depth; |
| 949 | char *bufp = buf; |
| 950 | |
| 951 | port = port->physport; |
| 952 | DPRINTK (KERN_DEBUG "parport_pc: parport_pc_ecp_read_block_pio\n"); |
| 953 | dump_parport_state ("enter fcn", port); |
| 954 | |
| 955 | /* Special case: a timeout of zero means we cannot call schedule(). |
| 956 | * Also if O_NONBLOCK is set then use the default implementation. */ |
| 957 | if (port->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) |
| 958 | return parport_ieee1284_ecp_read_data (port, buf, |
| 959 | length, flags); |
| 960 | |
| 961 | if (port->ieee1284.mode == IEEE1284_MODE_ECPRLE) { |
| 962 | /* If the peripheral is allowed to send RLE compressed |
| 963 | * data, it is possible for a byte to expand to 128 |
| 964 | * bytes in the FIFO. */ |
| 965 | fifofull = 128; |
| 966 | } else { |
| 967 | fifofull = fifo_depth; |
| 968 | } |
| 969 | |
| 970 | /* If the caller wants less than a full FIFO's worth of data, |
| 971 | * go through software emulation. Otherwise we may have to throw |
| 972 | * away data. */ |
| 973 | if (length < fifofull) |
| 974 | return parport_ieee1284_ecp_read_data (port, buf, |
| 975 | length, flags); |
| 976 | |
| 977 | if (port->ieee1284.phase != IEEE1284_PH_REV_IDLE) { |
| 978 | /* change to reverse-idle phase (must be in forward-idle) */ |
| 979 | |
| 980 | /* Event 38: Set nAutoFd low (also make sure nStrobe is high) */ |
| 981 | parport_frob_control (port, |
| 982 | PARPORT_CONTROL_AUTOFD |
| 983 | | PARPORT_CONTROL_STROBE, |
| 984 | PARPORT_CONTROL_AUTOFD); |
| 985 | parport_pc_data_reverse (port); /* Must be in PS2 mode */ |
| 986 | udelay (5); |
| 987 | /* Event 39: Set nInit low to initiate bus reversal */ |
| 988 | parport_frob_control (port, |
| 989 | PARPORT_CONTROL_INIT, |
| 990 | 0); |
| 991 | /* Event 40: Wait for nAckReverse (PError) to go low */ |
| 992 | r = parport_wait_peripheral (port, PARPORT_STATUS_PAPEROUT, 0); |
| 993 | if (r) { |
| 994 | printk (KERN_DEBUG "%s: PE timeout Event 40 (%d) " |
| 995 | "in ecp_read_block_pio\n", port->name, r); |
| 996 | return 0; |
| 997 | } |
| 998 | } |
| 999 | |
| 1000 | /* Set up ECP FIFO mode.*/ |
| 1001 | /* parport_pc_frob_control (port, |
| 1002 | PARPORT_CONTROL_STROBE | |
| 1003 | PARPORT_CONTROL_AUTOFD, |
| 1004 | PARPORT_CONTROL_AUTOFD); */ |
| 1005 | r = change_mode (port, ECR_ECP); /* ECP FIFO */ |
| 1006 | if (r) printk (KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n", port->name); |
| 1007 | |
| 1008 | port->ieee1284.phase = IEEE1284_PH_REV_DATA; |
| 1009 | |
| 1010 | /* the first byte must be collected manually */ |
| 1011 | dump_parport_state ("pre 43", port); |
| 1012 | /* Event 43: Wait for nAck to go low */ |
| 1013 | r = parport_wait_peripheral (port, PARPORT_STATUS_ACK, 0); |
| 1014 | if (r) { |
| 1015 | /* timed out while reading -- no data */ |
| 1016 | printk (KERN_DEBUG "PIO read timed out (initial byte)\n"); |
| 1017 | goto out_no_data; |
| 1018 | } |
| 1019 | /* read byte */ |
| 1020 | *bufp++ = inb (DATA (port)); |
| 1021 | left--; |
| 1022 | dump_parport_state ("43-44", port); |
| 1023 | /* Event 44: nAutoFd (HostAck) goes high to acknowledge */ |
| 1024 | parport_pc_frob_control (port, |
| 1025 | PARPORT_CONTROL_AUTOFD, |
| 1026 | 0); |
| 1027 | dump_parport_state ("pre 45", port); |
| 1028 | /* Event 45: Wait for nAck to go high */ |
| 1029 | /* r = parport_wait_peripheral (port, PARPORT_STATUS_ACK, PARPORT_STATUS_ACK); */ |
| 1030 | dump_parport_state ("post 45", port); |
| 1031 | r = 0; |
| 1032 | if (r) { |
| 1033 | /* timed out while waiting for peripheral to respond to ack */ |
| 1034 | printk (KERN_DEBUG "ECP PIO read timed out (waiting for nAck)\n"); |
| 1035 | |
| 1036 | /* keep hold of the byte we've got already */ |
| 1037 | goto out_no_data; |
| 1038 | } |
| 1039 | /* Event 46: nAutoFd (HostAck) goes low to accept more data */ |
| 1040 | parport_pc_frob_control (port, |
| 1041 | PARPORT_CONTROL_AUTOFD, |
| 1042 | PARPORT_CONTROL_AUTOFD); |
| 1043 | |
| 1044 | |
| 1045 | dump_parport_state ("rev idle", port); |
| 1046 | /* Do the transfer. */ |
| 1047 | while (left > fifofull) { |
| 1048 | int ret; |
| 1049 | unsigned long expire = jiffies + port->cad->timeout; |
| 1050 | unsigned char ecrval = inb (ECONTROL (port)); |
| 1051 | |
| 1052 | if (need_resched() && time_before (jiffies, expire)) |
| 1053 | /* Can't yield the port. */ |
| 1054 | schedule (); |
| 1055 | |
| 1056 | /* At this point, the FIFO may already be full. In |
| 1057 | * that case ECP is already holding back the |
| 1058 | * peripheral (assuming proper design) with a delayed |
| 1059 | * handshake. Work fast to avoid a peripheral |
| 1060 | * timeout. */ |
| 1061 | |
| 1062 | if (ecrval & 0x01) { |
| 1063 | /* FIFO is empty. Wait for interrupt. */ |
| 1064 | dump_parport_state ("FIFO empty", port); |
| 1065 | |
| 1066 | /* Anyone else waiting for the port? */ |
| 1067 | if (port->waithead) { |
| 1068 | printk (KERN_DEBUG "Somebody wants the port\n"); |
| 1069 | break; |
| 1070 | } |
| 1071 | |
| 1072 | /* Clear serviceIntr */ |
| 1073 | ECR_WRITE (port, ecrval & ~(1<<2)); |
| 1074 | false_alarm: |
| 1075 | dump_parport_state ("waiting", port); |
| 1076 | ret = parport_wait_event (port, HZ); |
| 1077 | DPRINTK (KERN_DEBUG "parport_wait_event returned %d\n", ret); |
| 1078 | if (ret < 0) |
| 1079 | break; |
| 1080 | ret = 0; |
| 1081 | if (!time_before (jiffies, expire)) { |
| 1082 | /* Timed out. */ |
| 1083 | dump_parport_state ("timeout", port); |
| 1084 | printk (KERN_DEBUG "PIO read timed out\n"); |
| 1085 | break; |
| 1086 | } |
| 1087 | ecrval = inb (ECONTROL (port)); |
| 1088 | if (!(ecrval & (1<<2))) { |
| 1089 | if (need_resched() && |
| 1090 | time_before (jiffies, expire)) { |
| 1091 | schedule (); |
| 1092 | } |
| 1093 | goto false_alarm; |
| 1094 | } |
| 1095 | |
| 1096 | /* Depending on how the FIFO threshold was |
| 1097 | * set, how long interrupt service took, and |
| 1098 | * how fast the peripheral is, we might be |
| 1099 | * lucky and have a just filled FIFO. */ |
| 1100 | continue; |
| 1101 | } |
| 1102 | |
| 1103 | if (ecrval & 0x02) { |
| 1104 | /* FIFO is full. */ |
| 1105 | dump_parport_state ("FIFO full", port); |
| 1106 | insb (fifo, bufp, fifo_depth); |
| 1107 | bufp += fifo_depth; |
| 1108 | left -= fifo_depth; |
| 1109 | continue; |
| 1110 | } |
| 1111 | |
| 1112 | DPRINTK (KERN_DEBUG "*** ecp_read_block_pio: reading one byte from the FIFO\n"); |
| 1113 | |
| 1114 | /* FIFO not filled. We will cycle this loop for a while |
| 1115 | * and either the peripheral will fill it faster, |
| 1116 | * tripping a fast empty with insb, or we empty it. */ |
| 1117 | *bufp++ = inb (fifo); |
| 1118 | left--; |
| 1119 | } |
| 1120 | |
| 1121 | /* scoop up anything left in the FIFO */ |
| 1122 | while (left && !(inb (ECONTROL (port) & 0x01))) { |
| 1123 | *bufp++ = inb (fifo); |
| 1124 | left--; |
| 1125 | } |
| 1126 | |
| 1127 | port->ieee1284.phase = IEEE1284_PH_REV_IDLE; |
| 1128 | dump_parport_state ("rev idle2", port); |
| 1129 | |
| 1130 | out_no_data: |
| 1131 | |
| 1132 | /* Go to forward idle mode to shut the peripheral up (event 47). */ |
| 1133 | parport_frob_control (port, PARPORT_CONTROL_INIT, PARPORT_CONTROL_INIT); |
| 1134 | |
| 1135 | /* event 49: PError goes high */ |
| 1136 | r = parport_wait_peripheral (port, |
| 1137 | PARPORT_STATUS_PAPEROUT, |
| 1138 | PARPORT_STATUS_PAPEROUT); |
| 1139 | if (r) { |
| 1140 | printk (KERN_DEBUG |
| 1141 | "%s: PE timeout FWDIDLE (%d) in ecp_read_block_pio\n", |
| 1142 | port->name, r); |
| 1143 | } |
| 1144 | |
| 1145 | port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; |
| 1146 | |
| 1147 | /* Finish up. */ |
| 1148 | { |
| 1149 | int lost = get_fifo_residue (port); |
| 1150 | if (lost) |
| 1151 | /* Shouldn't happen with compliant peripherals. */ |
| 1152 | printk (KERN_DEBUG "%s: DATA LOSS (%d bytes)!\n", |
| 1153 | port->name, lost); |
| 1154 | } |
| 1155 | |
| 1156 | dump_parport_state ("fwd idle", port); |
| 1157 | return length - left; |
| 1158 | } |
| 1159 | #endif /* 0 */ |
| 1160 | #endif /* IEEE 1284 support */ |
| 1161 | #endif /* Allowed to use FIFO/DMA */ |
| 1162 | |
| 1163 | |
| 1164 | /* |
| 1165 | * ****************************************** |
| 1166 | * INITIALISATION AND MODULE STUFF BELOW HERE |
| 1167 | * ****************************************** |
| 1168 | */ |
| 1169 | |
| 1170 | /* GCC is not inlining extern inline function later overwriten to non-inline, |
| 1171 | so we use outlined_ variants here. */ |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 1172 | static const struct parport_operations parport_pc_ops = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1173 | { |
| 1174 | .write_data = parport_pc_write_data, |
| 1175 | .read_data = parport_pc_read_data, |
| 1176 | |
| 1177 | .write_control = parport_pc_write_control, |
| 1178 | .read_control = parport_pc_read_control, |
| 1179 | .frob_control = parport_pc_frob_control, |
| 1180 | |
| 1181 | .read_status = parport_pc_read_status, |
| 1182 | |
| 1183 | .enable_irq = parport_pc_enable_irq, |
| 1184 | .disable_irq = parport_pc_disable_irq, |
| 1185 | |
| 1186 | .data_forward = parport_pc_data_forward, |
| 1187 | .data_reverse = parport_pc_data_reverse, |
| 1188 | |
| 1189 | .init_state = parport_pc_init_state, |
| 1190 | .save_state = parport_pc_save_state, |
| 1191 | .restore_state = parport_pc_restore_state, |
| 1192 | |
| 1193 | .epp_write_data = parport_ieee1284_epp_write_data, |
| 1194 | .epp_read_data = parport_ieee1284_epp_read_data, |
| 1195 | .epp_write_addr = parport_ieee1284_epp_write_addr, |
| 1196 | .epp_read_addr = parport_ieee1284_epp_read_addr, |
| 1197 | |
| 1198 | .ecp_write_data = parport_ieee1284_ecp_write_data, |
| 1199 | .ecp_read_data = parport_ieee1284_ecp_read_data, |
| 1200 | .ecp_write_addr = parport_ieee1284_ecp_write_addr, |
| 1201 | |
| 1202 | .compat_write_data = parport_ieee1284_write_compat, |
| 1203 | .nibble_read_data = parport_ieee1284_read_nibble, |
| 1204 | .byte_read_data = parport_ieee1284_read_byte, |
| 1205 | |
| 1206 | .owner = THIS_MODULE, |
| 1207 | }; |
| 1208 | |
| 1209 | #ifdef CONFIG_PARPORT_PC_SUPERIO |
| 1210 | /* Super-IO chipset detection, Winbond, SMSC */ |
| 1211 | static void __devinit show_parconfig_smsc37c669(int io, int key) |
| 1212 | { |
| 1213 | int cr1,cr4,cra,cr23,cr26,cr27,i=0; |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 1214 | static const char *const modes[]={ |
| 1215 | "SPP and Bidirectional (PS/2)", |
| 1216 | "EPP and SPP", |
| 1217 | "ECP", |
| 1218 | "ECP and EPP" }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1219 | |
| 1220 | outb(key,io); |
| 1221 | outb(key,io); |
| 1222 | outb(1,io); |
| 1223 | cr1=inb(io+1); |
| 1224 | outb(4,io); |
| 1225 | cr4=inb(io+1); |
| 1226 | outb(0x0a,io); |
| 1227 | cra=inb(io+1); |
| 1228 | outb(0x23,io); |
| 1229 | cr23=inb(io+1); |
| 1230 | outb(0x26,io); |
| 1231 | cr26=inb(io+1); |
| 1232 | outb(0x27,io); |
| 1233 | cr27=inb(io+1); |
| 1234 | outb(0xaa,io); |
| 1235 | |
| 1236 | if (verbose_probing) { |
| 1237 | printk (KERN_INFO "SMSC 37c669 LPT Config: cr_1=0x%02x, 4=0x%02x, " |
| 1238 | "A=0x%2x, 23=0x%02x, 26=0x%02x, 27=0x%02x\n", |
| 1239 | cr1,cr4,cra,cr23,cr26,cr27); |
| 1240 | |
| 1241 | /* The documentation calls DMA and IRQ-Lines by letters, so |
| 1242 | the board maker can/will wire them |
| 1243 | appropriately/randomly... G=reserved H=IDE-irq, */ |
| 1244 | printk (KERN_INFO "SMSC LPT Config: io=0x%04x, irq=%c, dma=%c, " |
| 1245 | "fifo threshold=%d\n", cr23*4, |
| 1246 | (cr27 &0x0f) ? 'A'-1+(cr27 &0x0f): '-', |
| 1247 | (cr26 &0x0f) ? 'A'-1+(cr26 &0x0f): '-', cra & 0x0f); |
| 1248 | printk(KERN_INFO "SMSC LPT Config: enabled=%s power=%s\n", |
| 1249 | (cr23*4 >=0x100) ?"yes":"no", (cr1 & 4) ? "yes" : "no"); |
| 1250 | printk(KERN_INFO "SMSC LPT Config: Port mode=%s, EPP version =%s\n", |
| 1251 | (cr1 & 0x08 ) ? "Standard mode only (SPP)" : modes[cr4 & 0x03], |
| 1252 | (cr4 & 0x40) ? "1.7" : "1.9"); |
| 1253 | } |
| 1254 | |
| 1255 | /* Heuristics ! BIOS setup for this mainboard device limits |
| 1256 | the choices to standard settings, i.e. io-address and IRQ |
| 1257 | are related, however DMA can be 1 or 3, assume DMA_A=DMA1, |
| 1258 | DMA_C=DMA3 (this is true e.g. for TYAN 1564D Tomcat IV) */ |
| 1259 | if(cr23*4 >=0x100) { /* if active */ |
| 1260 | while((superios[i].io!= 0) && (i<NR_SUPERIOS)) |
| 1261 | i++; |
| 1262 | if(i==NR_SUPERIOS) |
| 1263 | printk(KERN_INFO "Super-IO: too many chips!\n"); |
| 1264 | else { |
| 1265 | int d; |
| 1266 | switch (cr23*4) { |
| 1267 | case 0x3bc: |
| 1268 | superios[i].io = 0x3bc; |
| 1269 | superios[i].irq = 7; |
| 1270 | break; |
| 1271 | case 0x378: |
| 1272 | superios[i].io = 0x378; |
| 1273 | superios[i].irq = 7; |
| 1274 | break; |
| 1275 | case 0x278: |
| 1276 | superios[i].io = 0x278; |
| 1277 | superios[i].irq = 5; |
| 1278 | } |
| 1279 | d=(cr26 &0x0f); |
| 1280 | if((d==1) || (d==3)) |
| 1281 | superios[i].dma= d; |
| 1282 | else |
| 1283 | superios[i].dma= PARPORT_DMA_NONE; |
| 1284 | } |
| 1285 | } |
| 1286 | } |
| 1287 | |
| 1288 | |
| 1289 | static void __devinit show_parconfig_winbond(int io, int key) |
| 1290 | { |
| 1291 | int cr30,cr60,cr61,cr70,cr74,crf0,i=0; |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 1292 | static const char *const modes[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1293 | "Standard (SPP) and Bidirectional(PS/2)", /* 0 */ |
| 1294 | "EPP-1.9 and SPP", |
| 1295 | "ECP", |
| 1296 | "ECP and EPP-1.9", |
| 1297 | "Standard (SPP)", |
| 1298 | "EPP-1.7 and SPP", /* 5 */ |
| 1299 | "undefined!", |
| 1300 | "ECP and EPP-1.7" }; |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 1301 | static char *const irqtypes[] = { |
| 1302 | "pulsed low, high-Z", |
| 1303 | "follows nACK" }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1304 | |
| 1305 | /* The registers are called compatible-PnP because the |
| 1306 | register layout is modelled after ISA-PnP, the access |
| 1307 | method is just another ... */ |
| 1308 | outb(key,io); |
| 1309 | outb(key,io); |
| 1310 | outb(0x07,io); /* Register 7: Select Logical Device */ |
| 1311 | outb(0x01,io+1); /* LD1 is Parallel Port */ |
| 1312 | outb(0x30,io); |
| 1313 | cr30=inb(io+1); |
| 1314 | outb(0x60,io); |
| 1315 | cr60=inb(io+1); |
| 1316 | outb(0x61,io); |
| 1317 | cr61=inb(io+1); |
| 1318 | outb(0x70,io); |
| 1319 | cr70=inb(io+1); |
| 1320 | outb(0x74,io); |
| 1321 | cr74=inb(io+1); |
| 1322 | outb(0xf0,io); |
| 1323 | crf0=inb(io+1); |
| 1324 | outb(0xaa,io); |
| 1325 | |
| 1326 | if (verbose_probing) { |
| 1327 | printk(KERN_INFO "Winbond LPT Config: cr_30=%02x 60,61=%02x%02x " |
| 1328 | "70=%02x 74=%02x, f0=%02x\n", cr30,cr60,cr61,cr70,cr74,crf0); |
| 1329 | printk(KERN_INFO "Winbond LPT Config: active=%s, io=0x%02x%02x irq=%d, ", |
| 1330 | (cr30 & 0x01) ? "yes":"no", cr60,cr61,cr70&0x0f ); |
| 1331 | if ((cr74 & 0x07) > 3) |
| 1332 | printk("dma=none\n"); |
| 1333 | else |
| 1334 | printk("dma=%d\n",cr74 & 0x07); |
| 1335 | printk(KERN_INFO "Winbond LPT Config: irqtype=%s, ECP fifo threshold=%d\n", |
| 1336 | irqtypes[crf0>>7], (crf0>>3)&0x0f); |
| 1337 | printk(KERN_INFO "Winbond LPT Config: Port mode=%s\n", modes[crf0 & 0x07]); |
| 1338 | } |
| 1339 | |
| 1340 | if(cr30 & 0x01) { /* the settings can be interrogated later ... */ |
| 1341 | while((superios[i].io!= 0) && (i<NR_SUPERIOS)) |
| 1342 | i++; |
| 1343 | if(i==NR_SUPERIOS) |
| 1344 | printk(KERN_INFO "Super-IO: too many chips!\n"); |
| 1345 | else { |
| 1346 | superios[i].io = (cr60<<8)|cr61; |
| 1347 | superios[i].irq = cr70&0x0f; |
| 1348 | superios[i].dma = (((cr74 & 0x07) > 3) ? |
| 1349 | PARPORT_DMA_NONE : (cr74 & 0x07)); |
| 1350 | } |
| 1351 | } |
| 1352 | } |
| 1353 | |
| 1354 | static void __devinit decode_winbond(int efer, int key, int devid, int devrev, int oldid) |
| 1355 | { |
| 1356 | const char *type = "unknown"; |
| 1357 | int id,progif=2; |
| 1358 | |
| 1359 | if (devid == devrev) |
| 1360 | /* simple heuristics, we happened to read some |
| 1361 | non-winbond register */ |
| 1362 | return; |
| 1363 | |
| 1364 | id=(devid<<8) | devrev; |
| 1365 | |
| 1366 | /* Values are from public data sheets pdf files, I can just |
| 1367 | confirm 83977TF is correct :-) */ |
| 1368 | if (id == 0x9771) type="83977F/AF"; |
| 1369 | else if (id == 0x9773) type="83977TF / SMSC 97w33x/97w34x"; |
| 1370 | else if (id == 0x9774) type="83977ATF"; |
| 1371 | else if ((id & ~0x0f) == 0x5270) type="83977CTF / SMSC 97w36x"; |
| 1372 | else if ((id & ~0x0f) == 0x52f0) type="83977EF / SMSC 97w35x"; |
| 1373 | else if ((id & ~0x0f) == 0x5210) type="83627"; |
| 1374 | else if ((id & ~0x0f) == 0x6010) type="83697HF"; |
| 1375 | else if ((oldid &0x0f ) == 0x0a) { type="83877F"; progif=1;} |
| 1376 | else if ((oldid &0x0f ) == 0x0b) { type="83877AF"; progif=1;} |
| 1377 | else if ((oldid &0x0f ) == 0x0c) { type="83877TF"; progif=1;} |
| 1378 | else if ((oldid &0x0f ) == 0x0d) { type="83877ATF"; progif=1;} |
| 1379 | else progif=0; |
| 1380 | |
| 1381 | if (verbose_probing) |
| 1382 | printk(KERN_INFO "Winbond chip at EFER=0x%x key=0x%02x " |
| 1383 | "devid=%02x devrev=%02x oldid=%02x type=%s\n", |
| 1384 | efer, key, devid, devrev, oldid, type); |
| 1385 | |
| 1386 | if (progif == 2) |
| 1387 | show_parconfig_winbond(efer,key); |
| 1388 | } |
| 1389 | |
| 1390 | static void __devinit decode_smsc(int efer, int key, int devid, int devrev) |
| 1391 | { |
| 1392 | const char *type = "unknown"; |
| 1393 | void (*func)(int io, int key); |
| 1394 | int id; |
| 1395 | |
| 1396 | if (devid == devrev) |
| 1397 | /* simple heuristics, we happened to read some |
| 1398 | non-smsc register */ |
| 1399 | return; |
| 1400 | |
| 1401 | func=NULL; |
| 1402 | id=(devid<<8) | devrev; |
| 1403 | |
| 1404 | if (id==0x0302) {type="37c669"; func=show_parconfig_smsc37c669;} |
| 1405 | else if (id==0x6582) type="37c665IR"; |
| 1406 | else if (devid==0x65) type="37c665GT"; |
| 1407 | else if (devid==0x66) type="37c666GT"; |
| 1408 | |
| 1409 | if (verbose_probing) |
| 1410 | printk(KERN_INFO "SMSC chip at EFER=0x%x " |
| 1411 | "key=0x%02x devid=%02x devrev=%02x type=%s\n", |
| 1412 | efer, key, devid, devrev, type); |
| 1413 | |
| 1414 | if (func) |
| 1415 | func(efer,key); |
| 1416 | } |
| 1417 | |
| 1418 | |
| 1419 | static void __devinit winbond_check(int io, int key) |
| 1420 | { |
| 1421 | int devid,devrev,oldid,x_devid,x_devrev,x_oldid; |
| 1422 | |
| 1423 | if (!request_region(io, 3, __FUNCTION__)) |
| 1424 | return; |
| 1425 | |
| 1426 | /* First probe without key */ |
| 1427 | outb(0x20,io); |
| 1428 | x_devid=inb(io+1); |
| 1429 | outb(0x21,io); |
| 1430 | x_devrev=inb(io+1); |
| 1431 | outb(0x09,io); |
| 1432 | x_oldid=inb(io+1); |
| 1433 | |
| 1434 | outb(key,io); |
| 1435 | outb(key,io); /* Write Magic Sequence to EFER, extended |
| 1436 | funtion enable register */ |
| 1437 | outb(0x20,io); /* Write EFIR, extended function index register */ |
| 1438 | devid=inb(io+1); /* Read EFDR, extended function data register */ |
| 1439 | outb(0x21,io); |
| 1440 | devrev=inb(io+1); |
| 1441 | outb(0x09,io); |
| 1442 | oldid=inb(io+1); |
| 1443 | outb(0xaa,io); /* Magic Seal */ |
| 1444 | |
| 1445 | if ((x_devid == devid) && (x_devrev == devrev) && (x_oldid == oldid)) |
| 1446 | goto out; /* protection against false positives */ |
| 1447 | |
| 1448 | decode_winbond(io,key,devid,devrev,oldid); |
| 1449 | out: |
| 1450 | release_region(io, 3); |
| 1451 | } |
| 1452 | |
| 1453 | static void __devinit winbond_check2(int io,int key) |
| 1454 | { |
| 1455 | int devid,devrev,oldid,x_devid,x_devrev,x_oldid; |
| 1456 | |
| 1457 | if (!request_region(io, 3, __FUNCTION__)) |
| 1458 | return; |
| 1459 | |
| 1460 | /* First probe without the key */ |
| 1461 | outb(0x20,io+2); |
| 1462 | x_devid=inb(io+2); |
| 1463 | outb(0x21,io+1); |
| 1464 | x_devrev=inb(io+2); |
| 1465 | outb(0x09,io+1); |
| 1466 | x_oldid=inb(io+2); |
| 1467 | |
| 1468 | outb(key,io); /* Write Magic Byte to EFER, extended |
| 1469 | funtion enable register */ |
| 1470 | outb(0x20,io+2); /* Write EFIR, extended function index register */ |
| 1471 | devid=inb(io+2); /* Read EFDR, extended function data register */ |
| 1472 | outb(0x21,io+1); |
| 1473 | devrev=inb(io+2); |
| 1474 | outb(0x09,io+1); |
| 1475 | oldid=inb(io+2); |
| 1476 | outb(0xaa,io); /* Magic Seal */ |
| 1477 | |
| 1478 | if ((x_devid == devid) && (x_devrev == devrev) && (x_oldid == oldid)) |
| 1479 | goto out; /* protection against false positives */ |
| 1480 | |
| 1481 | decode_winbond(io,key,devid,devrev,oldid); |
| 1482 | out: |
| 1483 | release_region(io, 3); |
| 1484 | } |
| 1485 | |
| 1486 | static void __devinit smsc_check(int io, int key) |
| 1487 | { |
| 1488 | int id,rev,oldid,oldrev,x_id,x_rev,x_oldid,x_oldrev; |
| 1489 | |
| 1490 | if (!request_region(io, 3, __FUNCTION__)) |
| 1491 | return; |
| 1492 | |
| 1493 | /* First probe without the key */ |
| 1494 | outb(0x0d,io); |
| 1495 | x_oldid=inb(io+1); |
| 1496 | outb(0x0e,io); |
| 1497 | x_oldrev=inb(io+1); |
| 1498 | outb(0x20,io); |
| 1499 | x_id=inb(io+1); |
| 1500 | outb(0x21,io); |
| 1501 | x_rev=inb(io+1); |
| 1502 | |
| 1503 | outb(key,io); |
| 1504 | outb(key,io); /* Write Magic Sequence to EFER, extended |
| 1505 | funtion enable register */ |
| 1506 | outb(0x0d,io); /* Write EFIR, extended function index register */ |
| 1507 | oldid=inb(io+1); /* Read EFDR, extended function data register */ |
| 1508 | outb(0x0e,io); |
| 1509 | oldrev=inb(io+1); |
| 1510 | outb(0x20,io); |
| 1511 | id=inb(io+1); |
| 1512 | outb(0x21,io); |
| 1513 | rev=inb(io+1); |
| 1514 | outb(0xaa,io); /* Magic Seal */ |
| 1515 | |
| 1516 | if ((x_id == id) && (x_oldrev == oldrev) && |
| 1517 | (x_oldid == oldid) && (x_rev == rev)) |
| 1518 | goto out; /* protection against false positives */ |
| 1519 | |
| 1520 | decode_smsc(io,key,oldid,oldrev); |
| 1521 | out: |
| 1522 | release_region(io, 3); |
| 1523 | } |
| 1524 | |
| 1525 | |
| 1526 | static void __devinit detect_and_report_winbond (void) |
| 1527 | { |
| 1528 | if (verbose_probing) |
| 1529 | printk(KERN_DEBUG "Winbond Super-IO detection, now testing ports 3F0,370,250,4E,2E ...\n"); |
| 1530 | winbond_check(0x3f0,0x87); |
| 1531 | winbond_check(0x370,0x87); |
| 1532 | winbond_check(0x2e ,0x87); |
| 1533 | winbond_check(0x4e ,0x87); |
| 1534 | winbond_check(0x3f0,0x86); |
| 1535 | winbond_check2(0x250,0x88); |
| 1536 | winbond_check2(0x250,0x89); |
| 1537 | } |
| 1538 | |
| 1539 | static void __devinit detect_and_report_smsc (void) |
| 1540 | { |
| 1541 | if (verbose_probing) |
| 1542 | printk(KERN_DEBUG "SMSC Super-IO detection, now testing Ports 2F0, 370 ...\n"); |
| 1543 | smsc_check(0x3f0,0x55); |
| 1544 | smsc_check(0x370,0x55); |
| 1545 | smsc_check(0x3f0,0x44); |
| 1546 | smsc_check(0x370,0x44); |
| 1547 | } |
| 1548 | #endif /* CONFIG_PARPORT_PC_SUPERIO */ |
| 1549 | |
| 1550 | static int __devinit get_superio_dma (struct parport *p) |
| 1551 | { |
| 1552 | int i=0; |
| 1553 | while( (superios[i].io != p->base) && (i<NR_SUPERIOS)) |
| 1554 | i++; |
| 1555 | if (i!=NR_SUPERIOS) |
| 1556 | return superios[i].dma; |
| 1557 | return PARPORT_DMA_NONE; |
| 1558 | } |
| 1559 | |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 1560 | static int get_superio_irq (struct parport *p) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1561 | { |
| 1562 | int i=0; |
| 1563 | while( (superios[i].io != p->base) && (i<NR_SUPERIOS)) |
| 1564 | i++; |
| 1565 | if (i!=NR_SUPERIOS) |
| 1566 | return superios[i].irq; |
| 1567 | return PARPORT_IRQ_NONE; |
| 1568 | } |
| 1569 | |
| 1570 | |
| 1571 | /* --- Mode detection ------------------------------------- */ |
| 1572 | |
| 1573 | /* |
| 1574 | * Checks for port existence, all ports support SPP MODE |
| 1575 | * Returns: |
| 1576 | * 0 : No parallel port at this address |
| 1577 | * PARPORT_MODE_PCSPP : SPP port detected |
| 1578 | * (if the user specified an ioport himself, |
| 1579 | * this shall always be the case!) |
| 1580 | * |
| 1581 | */ |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 1582 | static int parport_SPP_supported(struct parport *pb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1583 | { |
| 1584 | unsigned char r, w; |
| 1585 | |
| 1586 | /* |
| 1587 | * first clear an eventually pending EPP timeout |
| 1588 | * I (sailer@ife.ee.ethz.ch) have an SMSC chipset |
| 1589 | * that does not even respond to SPP cycles if an EPP |
| 1590 | * timeout is pending |
| 1591 | */ |
| 1592 | clear_epp_timeout(pb); |
| 1593 | |
| 1594 | /* Do a simple read-write test to make sure the port exists. */ |
| 1595 | w = 0xc; |
| 1596 | outb (w, CONTROL (pb)); |
| 1597 | |
| 1598 | /* Is there a control register that we can read from? Some |
| 1599 | * ports don't allow reads, so read_control just returns a |
| 1600 | * software copy. Some ports _do_ allow reads, so bypass the |
| 1601 | * software copy here. In addition, some bits aren't |
| 1602 | * writable. */ |
| 1603 | r = inb (CONTROL (pb)); |
| 1604 | if ((r & 0xf) == w) { |
| 1605 | w = 0xe; |
| 1606 | outb (w, CONTROL (pb)); |
| 1607 | r = inb (CONTROL (pb)); |
| 1608 | outb (0xc, CONTROL (pb)); |
| 1609 | if ((r & 0xf) == w) |
| 1610 | return PARPORT_MODE_PCSPP; |
| 1611 | } |
| 1612 | |
| 1613 | if (user_specified) |
| 1614 | /* That didn't work, but the user thinks there's a |
| 1615 | * port here. */ |
| 1616 | printk (KERN_INFO "parport 0x%lx (WARNING): CTR: " |
| 1617 | "wrote 0x%02x, read 0x%02x\n", pb->base, w, r); |
| 1618 | |
| 1619 | /* Try the data register. The data lines aren't tri-stated at |
| 1620 | * this stage, so we expect back what we wrote. */ |
| 1621 | w = 0xaa; |
| 1622 | parport_pc_write_data (pb, w); |
| 1623 | r = parport_pc_read_data (pb); |
| 1624 | if (r == w) { |
| 1625 | w = 0x55; |
| 1626 | parport_pc_write_data (pb, w); |
| 1627 | r = parport_pc_read_data (pb); |
| 1628 | if (r == w) |
| 1629 | return PARPORT_MODE_PCSPP; |
| 1630 | } |
| 1631 | |
| 1632 | if (user_specified) { |
| 1633 | /* Didn't work, but the user is convinced this is the |
| 1634 | * place. */ |
| 1635 | printk (KERN_INFO "parport 0x%lx (WARNING): DATA: " |
| 1636 | "wrote 0x%02x, read 0x%02x\n", pb->base, w, r); |
| 1637 | printk (KERN_INFO "parport 0x%lx: You gave this address, " |
| 1638 | "but there is probably no parallel port there!\n", |
| 1639 | pb->base); |
| 1640 | } |
| 1641 | |
| 1642 | /* It's possible that we can't read the control register or |
| 1643 | * the data register. In that case just believe the user. */ |
| 1644 | if (user_specified) |
| 1645 | return PARPORT_MODE_PCSPP; |
| 1646 | |
| 1647 | return 0; |
| 1648 | } |
| 1649 | |
| 1650 | /* Check for ECR |
| 1651 | * |
| 1652 | * Old style XT ports alias io ports every 0x400, hence accessing ECR |
| 1653 | * on these cards actually accesses the CTR. |
| 1654 | * |
| 1655 | * Modern cards don't do this but reading from ECR will return 0xff |
| 1656 | * regardless of what is written here if the card does NOT support |
| 1657 | * ECP. |
| 1658 | * |
| 1659 | * We first check to see if ECR is the same as CTR. If not, the low |
| 1660 | * two bits of ECR aren't writable, so we check by writing ECR and |
| 1661 | * reading it back to see if it's what we expect. |
| 1662 | */ |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 1663 | static int parport_ECR_present(struct parport *pb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1664 | { |
| 1665 | struct parport_pc_private *priv = pb->private_data; |
| 1666 | unsigned char r = 0xc; |
| 1667 | |
| 1668 | outb (r, CONTROL (pb)); |
| 1669 | if ((inb (ECONTROL (pb)) & 0x3) == (r & 0x3)) { |
| 1670 | outb (r ^ 0x2, CONTROL (pb)); /* Toggle bit 1 */ |
| 1671 | |
| 1672 | r = inb (CONTROL (pb)); |
| 1673 | if ((inb (ECONTROL (pb)) & 0x2) == (r & 0x2)) |
| 1674 | goto no_reg; /* Sure that no ECR register exists */ |
| 1675 | } |
| 1676 | |
| 1677 | if ((inb (ECONTROL (pb)) & 0x3 ) != 0x1) |
| 1678 | goto no_reg; |
| 1679 | |
| 1680 | ECR_WRITE (pb, 0x34); |
| 1681 | if (inb (ECONTROL (pb)) != 0x35) |
| 1682 | goto no_reg; |
| 1683 | |
| 1684 | priv->ecr = 1; |
| 1685 | outb (0xc, CONTROL (pb)); |
| 1686 | |
| 1687 | /* Go to mode 000 */ |
| 1688 | frob_set_mode (pb, ECR_SPP); |
| 1689 | |
| 1690 | return 1; |
| 1691 | |
| 1692 | no_reg: |
| 1693 | outb (0xc, CONTROL (pb)); |
| 1694 | return 0; |
| 1695 | } |
| 1696 | |
| 1697 | #ifdef CONFIG_PARPORT_1284 |
| 1698 | /* Detect PS/2 support. |
| 1699 | * |
| 1700 | * Bit 5 (0x20) sets the PS/2 data direction; setting this high |
| 1701 | * allows us to read data from the data lines. In theory we would get back |
| 1702 | * 0xff but any peripheral attached to the port may drag some or all of the |
| 1703 | * lines down to zero. So if we get back anything that isn't the contents |
| 1704 | * of the data register we deem PS/2 support to be present. |
| 1705 | * |
| 1706 | * Some SPP ports have "half PS/2" ability - you can't turn off the line |
| 1707 | * drivers, but an external peripheral with sufficiently beefy drivers of |
| 1708 | * its own can overpower them and assert its own levels onto the bus, from |
| 1709 | * where they can then be read back as normal. Ports with this property |
| 1710 | * and the right type of device attached are likely to fail the SPP test, |
| 1711 | * (as they will appear to have stuck bits) and so the fact that they might |
| 1712 | * be misdetected here is rather academic. |
| 1713 | */ |
| 1714 | |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 1715 | static int parport_PS2_supported(struct parport *pb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1716 | { |
| 1717 | int ok = 0; |
| 1718 | |
| 1719 | clear_epp_timeout(pb); |
| 1720 | |
| 1721 | /* try to tri-state the buffer */ |
| 1722 | parport_pc_data_reverse (pb); |
| 1723 | |
| 1724 | parport_pc_write_data(pb, 0x55); |
| 1725 | if (parport_pc_read_data(pb) != 0x55) ok++; |
| 1726 | |
| 1727 | parport_pc_write_data(pb, 0xaa); |
| 1728 | if (parport_pc_read_data(pb) != 0xaa) ok++; |
| 1729 | |
| 1730 | /* cancel input mode */ |
| 1731 | parport_pc_data_forward (pb); |
| 1732 | |
| 1733 | if (ok) { |
| 1734 | pb->modes |= PARPORT_MODE_TRISTATE; |
| 1735 | } else { |
| 1736 | struct parport_pc_private *priv = pb->private_data; |
| 1737 | priv->ctr_writable &= ~0x20; |
| 1738 | } |
| 1739 | |
| 1740 | return ok; |
| 1741 | } |
| 1742 | |
| 1743 | #ifdef CONFIG_PARPORT_PC_FIFO |
| 1744 | static int __devinit parport_ECP_supported(struct parport *pb) |
| 1745 | { |
| 1746 | int i; |
| 1747 | int config, configb; |
| 1748 | int pword; |
| 1749 | struct parport_pc_private *priv = pb->private_data; |
| 1750 | /* Translate ECP intrLine to ISA irq value */ |
| 1751 | static const int intrline[]= { 0, 7, 9, 10, 11, 14, 15, 5 }; |
| 1752 | |
| 1753 | /* If there is no ECR, we have no hope of supporting ECP. */ |
| 1754 | if (!priv->ecr) |
| 1755 | return 0; |
| 1756 | |
| 1757 | /* Find out FIFO depth */ |
| 1758 | ECR_WRITE (pb, ECR_SPP << 5); /* Reset FIFO */ |
| 1759 | ECR_WRITE (pb, ECR_TST << 5); /* TEST FIFO */ |
| 1760 | for (i=0; i < 1024 && !(inb (ECONTROL (pb)) & 0x02); i++) |
| 1761 | outb (0xaa, FIFO (pb)); |
| 1762 | |
| 1763 | /* |
| 1764 | * Using LGS chipset it uses ECR register, but |
| 1765 | * it doesn't support ECP or FIFO MODE |
| 1766 | */ |
| 1767 | if (i == 1024) { |
| 1768 | ECR_WRITE (pb, ECR_SPP << 5); |
| 1769 | return 0; |
| 1770 | } |
| 1771 | |
| 1772 | priv->fifo_depth = i; |
| 1773 | if (verbose_probing) |
| 1774 | printk (KERN_DEBUG "0x%lx: FIFO is %d bytes\n", pb->base, i); |
| 1775 | |
| 1776 | /* Find out writeIntrThreshold */ |
| 1777 | frob_econtrol (pb, 1<<2, 1<<2); |
| 1778 | frob_econtrol (pb, 1<<2, 0); |
| 1779 | for (i = 1; i <= priv->fifo_depth; i++) { |
| 1780 | inb (FIFO (pb)); |
| 1781 | udelay (50); |
| 1782 | if (inb (ECONTROL (pb)) & (1<<2)) |
| 1783 | break; |
| 1784 | } |
| 1785 | |
| 1786 | if (i <= priv->fifo_depth) { |
| 1787 | if (verbose_probing) |
| 1788 | printk (KERN_DEBUG "0x%lx: writeIntrThreshold is %d\n", |
| 1789 | pb->base, i); |
| 1790 | } else |
| 1791 | /* Number of bytes we know we can write if we get an |
| 1792 | interrupt. */ |
| 1793 | i = 0; |
| 1794 | |
| 1795 | priv->writeIntrThreshold = i; |
| 1796 | |
| 1797 | /* Find out readIntrThreshold */ |
| 1798 | frob_set_mode (pb, ECR_PS2); /* Reset FIFO and enable PS2 */ |
| 1799 | parport_pc_data_reverse (pb); /* Must be in PS2 mode */ |
| 1800 | frob_set_mode (pb, ECR_TST); /* Test FIFO */ |
| 1801 | frob_econtrol (pb, 1<<2, 1<<2); |
| 1802 | frob_econtrol (pb, 1<<2, 0); |
| 1803 | for (i = 1; i <= priv->fifo_depth; i++) { |
| 1804 | outb (0xaa, FIFO (pb)); |
| 1805 | if (inb (ECONTROL (pb)) & (1<<2)) |
| 1806 | break; |
| 1807 | } |
| 1808 | |
| 1809 | if (i <= priv->fifo_depth) { |
| 1810 | if (verbose_probing) |
| 1811 | printk (KERN_INFO "0x%lx: readIntrThreshold is %d\n", |
| 1812 | pb->base, i); |
| 1813 | } else |
| 1814 | /* Number of bytes we can read if we get an interrupt. */ |
| 1815 | i = 0; |
| 1816 | |
| 1817 | priv->readIntrThreshold = i; |
| 1818 | |
| 1819 | ECR_WRITE (pb, ECR_SPP << 5); /* Reset FIFO */ |
| 1820 | ECR_WRITE (pb, 0xf4); /* Configuration mode */ |
| 1821 | config = inb (CONFIGA (pb)); |
| 1822 | pword = (config >> 4) & 0x7; |
| 1823 | switch (pword) { |
| 1824 | case 0: |
| 1825 | pword = 2; |
| 1826 | printk (KERN_WARNING "0x%lx: Unsupported pword size!\n", |
| 1827 | pb->base); |
| 1828 | break; |
| 1829 | case 2: |
| 1830 | pword = 4; |
| 1831 | printk (KERN_WARNING "0x%lx: Unsupported pword size!\n", |
| 1832 | pb->base); |
| 1833 | break; |
| 1834 | default: |
| 1835 | printk (KERN_WARNING "0x%lx: Unknown implementation ID\n", |
| 1836 | pb->base); |
| 1837 | /* Assume 1 */ |
| 1838 | case 1: |
| 1839 | pword = 1; |
| 1840 | } |
| 1841 | priv->pword = pword; |
| 1842 | |
| 1843 | if (verbose_probing) { |
| 1844 | printk (KERN_DEBUG "0x%lx: PWord is %d bits\n", pb->base, 8 * pword); |
| 1845 | |
| 1846 | printk (KERN_DEBUG "0x%lx: Interrupts are ISA-%s\n", pb->base, |
| 1847 | config & 0x80 ? "Level" : "Pulses"); |
| 1848 | |
| 1849 | configb = inb (CONFIGB (pb)); |
| 1850 | printk (KERN_DEBUG "0x%lx: ECP port cfgA=0x%02x cfgB=0x%02x\n", |
| 1851 | pb->base, config, configb); |
| 1852 | printk (KERN_DEBUG "0x%lx: ECP settings irq=", pb->base); |
| 1853 | if ((configb >>3) & 0x07) |
| 1854 | printk("%d",intrline[(configb >>3) & 0x07]); |
| 1855 | else |
| 1856 | printk("<none or set by other means>"); |
| 1857 | printk (" dma="); |
| 1858 | if( (configb & 0x03 ) == 0x00) |
| 1859 | printk("<none or set by other means>\n"); |
| 1860 | else |
| 1861 | printk("%d\n",configb & 0x07); |
| 1862 | } |
| 1863 | |
| 1864 | /* Go back to mode 000 */ |
| 1865 | frob_set_mode (pb, ECR_SPP); |
| 1866 | |
| 1867 | return 1; |
| 1868 | } |
| 1869 | #endif |
| 1870 | |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 1871 | static int parport_ECPPS2_supported(struct parport *pb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1872 | { |
| 1873 | const struct parport_pc_private *priv = pb->private_data; |
| 1874 | int result; |
| 1875 | unsigned char oecr; |
| 1876 | |
| 1877 | if (!priv->ecr) |
| 1878 | return 0; |
| 1879 | |
| 1880 | oecr = inb (ECONTROL (pb)); |
| 1881 | ECR_WRITE (pb, ECR_PS2 << 5); |
| 1882 | result = parport_PS2_supported(pb); |
| 1883 | ECR_WRITE (pb, oecr); |
| 1884 | return result; |
| 1885 | } |
| 1886 | |
| 1887 | /* EPP mode detection */ |
| 1888 | |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 1889 | static int parport_EPP_supported(struct parport *pb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1890 | { |
| 1891 | const struct parport_pc_private *priv = pb->private_data; |
| 1892 | |
| 1893 | /* |
| 1894 | * Theory: |
| 1895 | * Bit 0 of STR is the EPP timeout bit, this bit is 0 |
| 1896 | * when EPP is possible and is set high when an EPP timeout |
| 1897 | * occurs (EPP uses the HALT line to stop the CPU while it does |
| 1898 | * the byte transfer, an EPP timeout occurs if the attached |
| 1899 | * device fails to respond after 10 micro seconds). |
| 1900 | * |
| 1901 | * This bit is cleared by either reading it (National Semi) |
| 1902 | * or writing a 1 to the bit (SMC, UMC, WinBond), others ??? |
| 1903 | * This bit is always high in non EPP modes. |
| 1904 | */ |
| 1905 | |
| 1906 | /* If EPP timeout bit clear then EPP available */ |
| 1907 | if (!clear_epp_timeout(pb)) { |
| 1908 | return 0; /* No way to clear timeout */ |
| 1909 | } |
| 1910 | |
| 1911 | /* Check for Intel bug. */ |
| 1912 | if (priv->ecr) { |
| 1913 | unsigned char i; |
| 1914 | for (i = 0x00; i < 0x80; i += 0x20) { |
| 1915 | ECR_WRITE (pb, i); |
| 1916 | if (clear_epp_timeout (pb)) { |
| 1917 | /* Phony EPP in ECP. */ |
| 1918 | return 0; |
| 1919 | } |
| 1920 | } |
| 1921 | } |
| 1922 | |
| 1923 | pb->modes |= PARPORT_MODE_EPP; |
| 1924 | |
| 1925 | /* Set up access functions to use EPP hardware. */ |
| 1926 | pb->ops->epp_read_data = parport_pc_epp_read_data; |
| 1927 | pb->ops->epp_write_data = parport_pc_epp_write_data; |
| 1928 | pb->ops->epp_read_addr = parport_pc_epp_read_addr; |
| 1929 | pb->ops->epp_write_addr = parport_pc_epp_write_addr; |
| 1930 | |
| 1931 | return 1; |
| 1932 | } |
| 1933 | |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 1934 | static int parport_ECPEPP_supported(struct parport *pb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1935 | { |
| 1936 | struct parport_pc_private *priv = pb->private_data; |
| 1937 | int result; |
| 1938 | unsigned char oecr; |
| 1939 | |
| 1940 | if (!priv->ecr) { |
| 1941 | return 0; |
| 1942 | } |
| 1943 | |
| 1944 | oecr = inb (ECONTROL (pb)); |
| 1945 | /* Search for SMC style EPP+ECP mode */ |
| 1946 | ECR_WRITE (pb, 0x80); |
| 1947 | outb (0x04, CONTROL (pb)); |
| 1948 | result = parport_EPP_supported(pb); |
| 1949 | |
| 1950 | ECR_WRITE (pb, oecr); |
| 1951 | |
| 1952 | if (result) { |
| 1953 | /* Set up access functions to use ECP+EPP hardware. */ |
| 1954 | pb->ops->epp_read_data = parport_pc_ecpepp_read_data; |
| 1955 | pb->ops->epp_write_data = parport_pc_ecpepp_write_data; |
| 1956 | pb->ops->epp_read_addr = parport_pc_ecpepp_read_addr; |
| 1957 | pb->ops->epp_write_addr = parport_pc_ecpepp_write_addr; |
| 1958 | } |
| 1959 | |
| 1960 | return result; |
| 1961 | } |
| 1962 | |
| 1963 | #else /* No IEEE 1284 support */ |
| 1964 | |
| 1965 | /* Don't bother probing for modes we know we won't use. */ |
| 1966 | static int __devinit parport_PS2_supported(struct parport *pb) { return 0; } |
| 1967 | #ifdef CONFIG_PARPORT_PC_FIFO |
| 1968 | static int __devinit parport_ECP_supported(struct parport *pb) { return 0; } |
| 1969 | #endif |
| 1970 | static int __devinit parport_EPP_supported(struct parport *pb) { return 0; } |
| 1971 | static int __devinit parport_ECPEPP_supported(struct parport *pb){return 0;} |
| 1972 | static int __devinit parport_ECPPS2_supported(struct parport *pb){return 0;} |
| 1973 | |
| 1974 | #endif /* No IEEE 1284 support */ |
| 1975 | |
| 1976 | /* --- IRQ detection -------------------------------------- */ |
| 1977 | |
| 1978 | /* Only if supports ECP mode */ |
| 1979 | static int __devinit programmable_irq_support(struct parport *pb) |
| 1980 | { |
| 1981 | int irq, intrLine; |
| 1982 | unsigned char oecr = inb (ECONTROL (pb)); |
| 1983 | static const int lookup[8] = { |
| 1984 | PARPORT_IRQ_NONE, 7, 9, 10, 11, 14, 15, 5 |
| 1985 | }; |
| 1986 | |
| 1987 | ECR_WRITE (pb, ECR_CNF << 5); /* Configuration MODE */ |
| 1988 | |
| 1989 | intrLine = (inb (CONFIGB (pb)) >> 3) & 0x07; |
| 1990 | irq = lookup[intrLine]; |
| 1991 | |
| 1992 | ECR_WRITE (pb, oecr); |
| 1993 | return irq; |
| 1994 | } |
| 1995 | |
| 1996 | static int __devinit irq_probe_ECP(struct parport *pb) |
| 1997 | { |
| 1998 | int i; |
| 1999 | unsigned long irqs; |
| 2000 | |
| 2001 | irqs = probe_irq_on(); |
| 2002 | |
| 2003 | ECR_WRITE (pb, ECR_SPP << 5); /* Reset FIFO */ |
| 2004 | ECR_WRITE (pb, (ECR_TST << 5) | 0x04); |
| 2005 | ECR_WRITE (pb, ECR_TST << 5); |
| 2006 | |
| 2007 | /* If Full FIFO sure that writeIntrThreshold is generated */ |
| 2008 | for (i=0; i < 1024 && !(inb (ECONTROL (pb)) & 0x02) ; i++) |
| 2009 | outb (0xaa, FIFO (pb)); |
| 2010 | |
| 2011 | pb->irq = probe_irq_off(irqs); |
| 2012 | ECR_WRITE (pb, ECR_SPP << 5); |
| 2013 | |
| 2014 | if (pb->irq <= 0) |
| 2015 | pb->irq = PARPORT_IRQ_NONE; |
| 2016 | |
| 2017 | return pb->irq; |
| 2018 | } |
| 2019 | |
| 2020 | /* |
| 2021 | * This detection seems that only works in National Semiconductors |
| 2022 | * This doesn't work in SMC, LGS, and Winbond |
| 2023 | */ |
| 2024 | static int __devinit irq_probe_EPP(struct parport *pb) |
| 2025 | { |
| 2026 | #ifndef ADVANCED_DETECT |
| 2027 | return PARPORT_IRQ_NONE; |
| 2028 | #else |
| 2029 | int irqs; |
| 2030 | unsigned char oecr; |
| 2031 | |
| 2032 | if (pb->modes & PARPORT_MODE_PCECR) |
| 2033 | oecr = inb (ECONTROL (pb)); |
| 2034 | |
| 2035 | irqs = probe_irq_on(); |
| 2036 | |
| 2037 | if (pb->modes & PARPORT_MODE_PCECR) |
| 2038 | frob_econtrol (pb, 0x10, 0x10); |
| 2039 | |
| 2040 | clear_epp_timeout(pb); |
| 2041 | parport_pc_frob_control (pb, 0x20, 0x20); |
| 2042 | parport_pc_frob_control (pb, 0x10, 0x10); |
| 2043 | clear_epp_timeout(pb); |
| 2044 | |
| 2045 | /* Device isn't expecting an EPP read |
| 2046 | * and generates an IRQ. |
| 2047 | */ |
| 2048 | parport_pc_read_epp(pb); |
| 2049 | udelay(20); |
| 2050 | |
| 2051 | pb->irq = probe_irq_off (irqs); |
| 2052 | if (pb->modes & PARPORT_MODE_PCECR) |
| 2053 | ECR_WRITE (pb, oecr); |
| 2054 | parport_pc_write_control(pb, 0xc); |
| 2055 | |
| 2056 | if (pb->irq <= 0) |
| 2057 | pb->irq = PARPORT_IRQ_NONE; |
| 2058 | |
| 2059 | return pb->irq; |
| 2060 | #endif /* Advanced detection */ |
| 2061 | } |
| 2062 | |
| 2063 | static int __devinit irq_probe_SPP(struct parport *pb) |
| 2064 | { |
| 2065 | /* Don't even try to do this. */ |
| 2066 | return PARPORT_IRQ_NONE; |
| 2067 | } |
| 2068 | |
| 2069 | /* We will attempt to share interrupt requests since other devices |
| 2070 | * such as sound cards and network cards seem to like using the |
| 2071 | * printer IRQs. |
| 2072 | * |
| 2073 | * When ECP is available we can autoprobe for IRQs. |
| 2074 | * NOTE: If we can autoprobe it, we can register the IRQ. |
| 2075 | */ |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 2076 | static int parport_irq_probe(struct parport *pb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2077 | { |
| 2078 | struct parport_pc_private *priv = pb->private_data; |
| 2079 | |
| 2080 | if (priv->ecr) { |
| 2081 | pb->irq = programmable_irq_support(pb); |
| 2082 | |
| 2083 | if (pb->irq == PARPORT_IRQ_NONE) |
| 2084 | pb->irq = irq_probe_ECP(pb); |
| 2085 | } |
| 2086 | |
| 2087 | if ((pb->irq == PARPORT_IRQ_NONE) && priv->ecr && |
| 2088 | (pb->modes & PARPORT_MODE_EPP)) |
| 2089 | pb->irq = irq_probe_EPP(pb); |
| 2090 | |
| 2091 | clear_epp_timeout(pb); |
| 2092 | |
| 2093 | if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_EPP)) |
| 2094 | pb->irq = irq_probe_EPP(pb); |
| 2095 | |
| 2096 | clear_epp_timeout(pb); |
| 2097 | |
| 2098 | if (pb->irq == PARPORT_IRQ_NONE) |
| 2099 | pb->irq = irq_probe_SPP(pb); |
| 2100 | |
| 2101 | if (pb->irq == PARPORT_IRQ_NONE) |
| 2102 | pb->irq = get_superio_irq(pb); |
| 2103 | |
| 2104 | return pb->irq; |
| 2105 | } |
| 2106 | |
| 2107 | /* --- DMA detection -------------------------------------- */ |
| 2108 | |
| 2109 | /* Only if chipset conforms to ECP ISA Interface Standard */ |
| 2110 | static int __devinit programmable_dma_support (struct parport *p) |
| 2111 | { |
| 2112 | unsigned char oecr = inb (ECONTROL (p)); |
| 2113 | int dma; |
| 2114 | |
| 2115 | frob_set_mode (p, ECR_CNF); |
| 2116 | |
| 2117 | dma = inb (CONFIGB(p)) & 0x07; |
| 2118 | /* 000: Indicates jumpered 8-bit DMA if read-only. |
| 2119 | 100: Indicates jumpered 16-bit DMA if read-only. */ |
| 2120 | if ((dma & 0x03) == 0) |
| 2121 | dma = PARPORT_DMA_NONE; |
| 2122 | |
| 2123 | ECR_WRITE (p, oecr); |
| 2124 | return dma; |
| 2125 | } |
| 2126 | |
| 2127 | static int __devinit parport_dma_probe (struct parport *p) |
| 2128 | { |
| 2129 | const struct parport_pc_private *priv = p->private_data; |
| 2130 | if (priv->ecr) |
| 2131 | p->dma = programmable_dma_support(p); /* ask ECP chipset first */ |
| 2132 | if (p->dma == PARPORT_DMA_NONE) { |
| 2133 | /* ask known Super-IO chips proper, although these |
| 2134 | claim ECP compatible, some don't report their DMA |
| 2135 | conforming to ECP standards */ |
| 2136 | p->dma = get_superio_dma(p); |
| 2137 | } |
| 2138 | |
| 2139 | return p->dma; |
| 2140 | } |
| 2141 | |
| 2142 | /* --- Initialisation code -------------------------------- */ |
| 2143 | |
| 2144 | static LIST_HEAD(ports_list); |
| 2145 | static DEFINE_SPINLOCK(ports_lock); |
| 2146 | |
| 2147 | struct parport *parport_pc_probe_port (unsigned long int base, |
| 2148 | unsigned long int base_hi, |
| 2149 | int irq, int dma, |
| 2150 | struct pci_dev *dev) |
| 2151 | { |
| 2152 | struct parport_pc_private *priv; |
| 2153 | struct parport_operations *ops; |
| 2154 | struct parport *p; |
| 2155 | int probedirq = PARPORT_IRQ_NONE; |
| 2156 | struct resource *base_res; |
| 2157 | struct resource *ECR_res = NULL; |
| 2158 | struct resource *EPP_res = NULL; |
| 2159 | |
| 2160 | ops = kmalloc(sizeof (struct parport_operations), GFP_KERNEL); |
| 2161 | if (!ops) |
| 2162 | goto out1; |
| 2163 | |
| 2164 | priv = kmalloc (sizeof (struct parport_pc_private), GFP_KERNEL); |
| 2165 | if (!priv) |
| 2166 | goto out2; |
| 2167 | |
| 2168 | /* a misnomer, actually - it's allocate and reserve parport number */ |
| 2169 | p = parport_register_port(base, irq, dma, ops); |
| 2170 | if (!p) |
| 2171 | goto out3; |
| 2172 | |
| 2173 | base_res = request_region(base, 3, p->name); |
| 2174 | if (!base_res) |
| 2175 | goto out4; |
| 2176 | |
| 2177 | memcpy(ops, &parport_pc_ops, sizeof (struct parport_operations)); |
| 2178 | priv->ctr = 0xc; |
| 2179 | priv->ctr_writable = ~0x10; |
| 2180 | priv->ecr = 0; |
| 2181 | priv->fifo_depth = 0; |
| 2182 | priv->dma_buf = NULL; |
| 2183 | priv->dma_handle = 0; |
| 2184 | priv->dev = dev; |
| 2185 | INIT_LIST_HEAD(&priv->list); |
| 2186 | priv->port = p; |
| 2187 | p->base_hi = base_hi; |
| 2188 | p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT; |
| 2189 | p->private_data = priv; |
| 2190 | |
| 2191 | if (base_hi) { |
| 2192 | ECR_res = request_region(base_hi, 3, p->name); |
| 2193 | if (ECR_res) |
| 2194 | parport_ECR_present(p); |
| 2195 | } |
| 2196 | |
| 2197 | if (base != 0x3bc) { |
| 2198 | EPP_res = request_region(base+0x3, 5, p->name); |
| 2199 | if (EPP_res) |
| 2200 | if (!parport_EPP_supported(p)) |
| 2201 | parport_ECPEPP_supported(p); |
| 2202 | } |
| 2203 | if (!parport_SPP_supported (p)) |
| 2204 | /* No port. */ |
| 2205 | goto out5; |
| 2206 | if (priv->ecr) |
| 2207 | parport_ECPPS2_supported(p); |
| 2208 | else |
| 2209 | parport_PS2_supported(p); |
| 2210 | |
| 2211 | p->size = (p->modes & PARPORT_MODE_EPP)?8:3; |
| 2212 | |
| 2213 | printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base); |
| 2214 | if (p->base_hi && priv->ecr) |
| 2215 | printk(" (0x%lx)", p->base_hi); |
| 2216 | if (p->irq == PARPORT_IRQ_AUTO) { |
| 2217 | p->irq = PARPORT_IRQ_NONE; |
| 2218 | parport_irq_probe(p); |
| 2219 | } else if (p->irq == PARPORT_IRQ_PROBEONLY) { |
| 2220 | p->irq = PARPORT_IRQ_NONE; |
| 2221 | parport_irq_probe(p); |
| 2222 | probedirq = p->irq; |
| 2223 | p->irq = PARPORT_IRQ_NONE; |
| 2224 | } |
| 2225 | if (p->irq != PARPORT_IRQ_NONE) { |
| 2226 | printk(", irq %d", p->irq); |
| 2227 | priv->ctr_writable |= 0x10; |
| 2228 | |
| 2229 | if (p->dma == PARPORT_DMA_AUTO) { |
| 2230 | p->dma = PARPORT_DMA_NONE; |
| 2231 | parport_dma_probe(p); |
| 2232 | } |
| 2233 | } |
| 2234 | if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq |
| 2235 | is mandatory (see above) */ |
| 2236 | p->dma = PARPORT_DMA_NONE; |
| 2237 | |
| 2238 | #ifdef CONFIG_PARPORT_PC_FIFO |
| 2239 | if (parport_ECP_supported(p) && |
| 2240 | p->dma != PARPORT_DMA_NOFIFO && |
| 2241 | priv->fifo_depth > 0 && p->irq != PARPORT_IRQ_NONE) { |
| 2242 | p->modes |= PARPORT_MODE_ECP | PARPORT_MODE_COMPAT; |
| 2243 | p->ops->compat_write_data = parport_pc_compat_write_block_pio; |
| 2244 | #ifdef CONFIG_PARPORT_1284 |
| 2245 | p->ops->ecp_write_data = parport_pc_ecp_write_block_pio; |
| 2246 | /* currently broken, but working on it.. (FB) */ |
| 2247 | /* p->ops->ecp_read_data = parport_pc_ecp_read_block_pio; */ |
| 2248 | #endif /* IEEE 1284 support */ |
| 2249 | if (p->dma != PARPORT_DMA_NONE) { |
| 2250 | printk(", dma %d", p->dma); |
| 2251 | p->modes |= PARPORT_MODE_DMA; |
| 2252 | } |
| 2253 | else printk(", using FIFO"); |
| 2254 | } |
| 2255 | else |
| 2256 | /* We can't use the DMA channel after all. */ |
| 2257 | p->dma = PARPORT_DMA_NONE; |
| 2258 | #endif /* Allowed to use FIFO/DMA */ |
| 2259 | |
| 2260 | printk(" ["); |
| 2261 | #define printmode(x) {if(p->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}} |
| 2262 | { |
| 2263 | int f = 0; |
| 2264 | printmode(PCSPP); |
| 2265 | printmode(TRISTATE); |
| 2266 | printmode(COMPAT) |
| 2267 | printmode(EPP); |
| 2268 | printmode(ECP); |
| 2269 | printmode(DMA); |
| 2270 | } |
| 2271 | #undef printmode |
| 2272 | #ifndef CONFIG_PARPORT_1284 |
| 2273 | printk ("(,...)"); |
| 2274 | #endif /* CONFIG_PARPORT_1284 */ |
| 2275 | printk("]\n"); |
| 2276 | if (probedirq != PARPORT_IRQ_NONE) |
| 2277 | printk(KERN_INFO "%s: irq %d detected\n", p->name, probedirq); |
| 2278 | |
| 2279 | /* If No ECP release the ports grabbed above. */ |
| 2280 | if (ECR_res && (p->modes & PARPORT_MODE_ECP) == 0) { |
| 2281 | release_region(base_hi, 3); |
| 2282 | ECR_res = NULL; |
| 2283 | } |
| 2284 | /* Likewise for EEP ports */ |
| 2285 | if (EPP_res && (p->modes & PARPORT_MODE_EPP) == 0) { |
| 2286 | release_region(base+3, 5); |
| 2287 | EPP_res = NULL; |
| 2288 | } |
| 2289 | if (p->irq != PARPORT_IRQ_NONE) { |
| 2290 | if (request_irq (p->irq, parport_pc_interrupt, |
| 2291 | 0, p->name, p)) { |
| 2292 | printk (KERN_WARNING "%s: irq %d in use, " |
| 2293 | "resorting to polled operation\n", |
| 2294 | p->name, p->irq); |
| 2295 | p->irq = PARPORT_IRQ_NONE; |
| 2296 | p->dma = PARPORT_DMA_NONE; |
| 2297 | } |
| 2298 | |
| 2299 | #ifdef CONFIG_PARPORT_PC_FIFO |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 2300 | #ifdef HAS_DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2301 | if (p->dma != PARPORT_DMA_NONE) { |
| 2302 | if (request_dma (p->dma, p->name)) { |
| 2303 | printk (KERN_WARNING "%s: dma %d in use, " |
| 2304 | "resorting to PIO operation\n", |
| 2305 | p->name, p->dma); |
| 2306 | p->dma = PARPORT_DMA_NONE; |
| 2307 | } else { |
| 2308 | priv->dma_buf = |
| 2309 | pci_alloc_consistent(priv->dev, |
| 2310 | PAGE_SIZE, |
| 2311 | &priv->dma_handle); |
| 2312 | if (! priv->dma_buf) { |
| 2313 | printk (KERN_WARNING "%s: " |
| 2314 | "cannot get buffer for DMA, " |
| 2315 | "resorting to PIO operation\n", |
| 2316 | p->name); |
| 2317 | free_dma(p->dma); |
| 2318 | p->dma = PARPORT_DMA_NONE; |
| 2319 | } |
| 2320 | } |
| 2321 | } |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 2322 | #endif |
| 2323 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2324 | } |
| 2325 | |
| 2326 | /* Done probing. Now put the port into a sensible start-up state. */ |
| 2327 | if (priv->ecr) |
| 2328 | /* |
| 2329 | * Put the ECP detected port in PS2 mode. |
| 2330 | * Do this also for ports that have ECR but don't do ECP. |
| 2331 | */ |
| 2332 | ECR_WRITE (p, 0x34); |
| 2333 | |
| 2334 | parport_pc_write_data(p, 0); |
| 2335 | parport_pc_data_forward (p); |
| 2336 | |
| 2337 | /* Now that we've told the sharing engine about the port, and |
| 2338 | found out its characteristics, let the high-level drivers |
| 2339 | know about it. */ |
| 2340 | spin_lock(&ports_lock); |
| 2341 | list_add(&priv->list, &ports_list); |
| 2342 | spin_unlock(&ports_lock); |
| 2343 | parport_announce_port (p); |
| 2344 | |
| 2345 | return p; |
| 2346 | |
| 2347 | out5: |
| 2348 | if (ECR_res) |
| 2349 | release_region(base_hi, 3); |
| 2350 | if (EPP_res) |
| 2351 | release_region(base+0x3, 5); |
| 2352 | release_region(base, 3); |
| 2353 | out4: |
| 2354 | parport_put_port(p); |
| 2355 | out3: |
| 2356 | kfree (priv); |
| 2357 | out2: |
| 2358 | kfree (ops); |
| 2359 | out1: |
| 2360 | return NULL; |
| 2361 | } |
| 2362 | |
| 2363 | EXPORT_SYMBOL (parport_pc_probe_port); |
| 2364 | |
| 2365 | void parport_pc_unregister_port (struct parport *p) |
| 2366 | { |
| 2367 | struct parport_pc_private *priv = p->private_data; |
| 2368 | struct parport_operations *ops = p->ops; |
| 2369 | |
| 2370 | parport_remove_port(p); |
| 2371 | spin_lock(&ports_lock); |
| 2372 | list_del_init(&priv->list); |
| 2373 | spin_unlock(&ports_lock); |
Andrew Morton | d1c4ac4 | 2006-01-08 01:05:05 -0800 | [diff] [blame] | 2374 | #if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2375 | if (p->dma != PARPORT_DMA_NONE) |
| 2376 | free_dma(p->dma); |
Andrew Morton | d1c4ac4 | 2006-01-08 01:05:05 -0800 | [diff] [blame] | 2377 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2378 | if (p->irq != PARPORT_IRQ_NONE) |
| 2379 | free_irq(p->irq, p); |
| 2380 | release_region(p->base, 3); |
| 2381 | if (p->size > 3) |
| 2382 | release_region(p->base + 3, p->size - 3); |
| 2383 | if (p->modes & PARPORT_MODE_ECP) |
| 2384 | release_region(p->base_hi, 3); |
Andrew Morton | d1c4ac4 | 2006-01-08 01:05:05 -0800 | [diff] [blame] | 2385 | #if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2386 | if (priv->dma_buf) |
| 2387 | pci_free_consistent(priv->dev, PAGE_SIZE, |
| 2388 | priv->dma_buf, |
| 2389 | priv->dma_handle); |
Al Viro | 7fbacd5 | 2005-05-04 05:39:32 +0100 | [diff] [blame] | 2390 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2391 | kfree (p->private_data); |
| 2392 | parport_put_port(p); |
| 2393 | kfree (ops); /* hope no-one cached it */ |
| 2394 | } |
| 2395 | |
| 2396 | EXPORT_SYMBOL (parport_pc_unregister_port); |
| 2397 | |
| 2398 | #ifdef CONFIG_PCI |
| 2399 | |
| 2400 | /* ITE support maintained by Rich Liu <richliu@poorman.org> */ |
| 2401 | static int __devinit sio_ite_8872_probe (struct pci_dev *pdev, int autoirq, |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 2402 | int autodma, |
| 2403 | const struct parport_pc_via_data *via) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2404 | { |
| 2405 | short inta_addr[6] = { 0x2A0, 0x2C0, 0x220, 0x240, 0x1E0 }; |
| 2406 | struct resource *base_res; |
| 2407 | u32 ite8872set; |
| 2408 | u32 ite8872_lpt, ite8872_lpthi; |
| 2409 | u8 ite8872_irq, type; |
| 2410 | char *fake_name = "parport probe"; |
| 2411 | int irq; |
| 2412 | int i; |
| 2413 | |
| 2414 | DPRINTK (KERN_DEBUG "sio_ite_8872_probe()\n"); |
| 2415 | |
| 2416 | // make sure which one chip |
| 2417 | for(i = 0; i < 5; i++) { |
| 2418 | base_res = request_region(inta_addr[i], 0x8, fake_name); |
| 2419 | if (base_res) { |
| 2420 | int test; |
| 2421 | pci_write_config_dword (pdev, 0x60, |
| 2422 | 0xe7000000 | inta_addr[i]); |
| 2423 | pci_write_config_dword (pdev, 0x78, |
| 2424 | 0x00000000 | inta_addr[i]); |
| 2425 | test = inb (inta_addr[i]); |
| 2426 | if (test != 0xff) break; |
| 2427 | release_region(inta_addr[i], 0x8); |
| 2428 | } |
| 2429 | } |
| 2430 | if(i >= 5) { |
| 2431 | printk (KERN_INFO "parport_pc: cannot find ITE8872 INTA\n"); |
| 2432 | return 0; |
| 2433 | } |
| 2434 | |
| 2435 | type = inb (inta_addr[i] + 0x18); |
| 2436 | type &= 0x0f; |
| 2437 | |
| 2438 | switch (type) { |
| 2439 | case 0x2: |
| 2440 | printk (KERN_INFO "parport_pc: ITE8871 found (1P)\n"); |
| 2441 | ite8872set = 0x64200000; |
| 2442 | break; |
| 2443 | case 0xa: |
| 2444 | printk (KERN_INFO "parport_pc: ITE8875 found (1P)\n"); |
| 2445 | ite8872set = 0x64200000; |
| 2446 | break; |
| 2447 | case 0xe: |
| 2448 | printk (KERN_INFO "parport_pc: ITE8872 found (2S1P)\n"); |
| 2449 | ite8872set = 0x64e00000; |
| 2450 | break; |
| 2451 | case 0x6: |
| 2452 | printk (KERN_INFO "parport_pc: ITE8873 found (1S)\n"); |
| 2453 | return 0; |
| 2454 | case 0x8: |
| 2455 | DPRINTK (KERN_DEBUG "parport_pc: ITE8874 found (2S)\n"); |
| 2456 | return 0; |
| 2457 | default: |
| 2458 | printk (KERN_INFO "parport_pc: unknown ITE887x\n"); |
| 2459 | printk (KERN_INFO "parport_pc: please mail 'lspci -nvv' " |
| 2460 | "output to Rich.Liu@ite.com.tw\n"); |
| 2461 | return 0; |
| 2462 | } |
| 2463 | |
| 2464 | pci_read_config_byte (pdev, 0x3c, &ite8872_irq); |
| 2465 | pci_read_config_dword (pdev, 0x1c, &ite8872_lpt); |
| 2466 | ite8872_lpt &= 0x0000ff00; |
| 2467 | pci_read_config_dword (pdev, 0x20, &ite8872_lpthi); |
| 2468 | ite8872_lpthi &= 0x0000ff00; |
| 2469 | pci_write_config_dword (pdev, 0x6c, 0xe3000000 | ite8872_lpt); |
| 2470 | pci_write_config_dword (pdev, 0x70, 0xe3000000 | ite8872_lpthi); |
| 2471 | pci_write_config_dword (pdev, 0x80, (ite8872_lpthi<<16) | ite8872_lpt); |
| 2472 | // SET SPP&EPP , Parallel Port NO DMA , Enable All Function |
| 2473 | // SET Parallel IRQ |
| 2474 | pci_write_config_dword (pdev, 0x9c, |
| 2475 | ite8872set | (ite8872_irq * 0x11111)); |
| 2476 | |
| 2477 | DPRINTK (KERN_DEBUG "ITE887x: The IRQ is %d.\n", ite8872_irq); |
| 2478 | DPRINTK (KERN_DEBUG "ITE887x: The PARALLEL I/O port is 0x%x.\n", |
| 2479 | ite8872_lpt); |
| 2480 | DPRINTK (KERN_DEBUG "ITE887x: The PARALLEL I/O porthi is 0x%x.\n", |
| 2481 | ite8872_lpthi); |
| 2482 | |
| 2483 | /* Let the user (or defaults) steer us away from interrupts */ |
| 2484 | irq = ite8872_irq; |
| 2485 | if (autoirq != PARPORT_IRQ_AUTO) |
| 2486 | irq = PARPORT_IRQ_NONE; |
| 2487 | |
| 2488 | /* |
| 2489 | * Release the resource so that parport_pc_probe_port can get it. |
| 2490 | */ |
| 2491 | release_resource(base_res); |
| 2492 | if (parport_pc_probe_port (ite8872_lpt, ite8872_lpthi, |
| 2493 | irq, PARPORT_DMA_NONE, NULL)) { |
| 2494 | printk (KERN_INFO |
| 2495 | "parport_pc: ITE 8872 parallel port: io=0x%X", |
| 2496 | ite8872_lpt); |
| 2497 | if (irq != PARPORT_IRQ_NONE) |
| 2498 | printk (", irq=%d", irq); |
| 2499 | printk ("\n"); |
| 2500 | return 1; |
| 2501 | } |
| 2502 | |
| 2503 | return 0; |
| 2504 | } |
| 2505 | |
| 2506 | /* VIA 8231 support by Pavel Fedin <sonic_amiga@rambler.ru> |
| 2507 | based on VIA 686a support code by Jeff Garzik <jgarzik@pobox.com> */ |
| 2508 | static int __devinitdata parport_init_mode = 0; |
| 2509 | |
| 2510 | /* Data for two known VIA chips */ |
| 2511 | static struct parport_pc_via_data via_686a_data __devinitdata = { |
| 2512 | 0x51, |
| 2513 | 0x50, |
| 2514 | 0x85, |
| 2515 | 0x02, |
| 2516 | 0xE2, |
| 2517 | 0xF0, |
| 2518 | 0xE6 |
| 2519 | }; |
| 2520 | static struct parport_pc_via_data via_8231_data __devinitdata = { |
| 2521 | 0x45, |
| 2522 | 0x44, |
| 2523 | 0x50, |
| 2524 | 0x04, |
| 2525 | 0xF2, |
| 2526 | 0xFA, |
| 2527 | 0xF6 |
| 2528 | }; |
| 2529 | |
| 2530 | static int __devinit sio_via_probe (struct pci_dev *pdev, int autoirq, |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 2531 | int autodma, |
| 2532 | const struct parport_pc_via_data *via) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2533 | { |
| 2534 | u8 tmp, tmp2, siofunc; |
| 2535 | u8 ppcontrol = 0; |
| 2536 | int dma, irq; |
| 2537 | unsigned port1, port2; |
| 2538 | unsigned have_epp = 0; |
| 2539 | |
| 2540 | printk(KERN_DEBUG "parport_pc: VIA 686A/8231 detected\n"); |
| 2541 | |
| 2542 | switch(parport_init_mode) |
| 2543 | { |
| 2544 | case 1: |
| 2545 | printk(KERN_DEBUG "parport_pc: setting SPP mode\n"); |
| 2546 | siofunc = VIA_FUNCTION_PARPORT_SPP; |
| 2547 | break; |
| 2548 | case 2: |
| 2549 | printk(KERN_DEBUG "parport_pc: setting PS/2 mode\n"); |
| 2550 | siofunc = VIA_FUNCTION_PARPORT_SPP; |
| 2551 | ppcontrol = VIA_PARPORT_BIDIR; |
| 2552 | break; |
| 2553 | case 3: |
| 2554 | printk(KERN_DEBUG "parport_pc: setting EPP mode\n"); |
| 2555 | siofunc = VIA_FUNCTION_PARPORT_EPP; |
| 2556 | ppcontrol = VIA_PARPORT_BIDIR; |
| 2557 | have_epp = 1; |
| 2558 | break; |
| 2559 | case 4: |
| 2560 | printk(KERN_DEBUG "parport_pc: setting ECP mode\n"); |
| 2561 | siofunc = VIA_FUNCTION_PARPORT_ECP; |
| 2562 | ppcontrol = VIA_PARPORT_BIDIR; |
| 2563 | break; |
| 2564 | case 5: |
| 2565 | printk(KERN_DEBUG "parport_pc: setting EPP+ECP mode\n"); |
| 2566 | siofunc = VIA_FUNCTION_PARPORT_ECP; |
| 2567 | ppcontrol = VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP; |
| 2568 | have_epp = 1; |
| 2569 | break; |
| 2570 | default: |
| 2571 | printk(KERN_DEBUG "parport_pc: probing current configuration\n"); |
| 2572 | siofunc = VIA_FUNCTION_PROBE; |
| 2573 | break; |
| 2574 | } |
| 2575 | /* |
| 2576 | * unlock super i/o configuration |
| 2577 | */ |
| 2578 | pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp); |
| 2579 | tmp |= via->via_pci_superio_config_data; |
| 2580 | pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp); |
| 2581 | |
| 2582 | /* Bits 1-0: Parallel Port Mode / Enable */ |
| 2583 | outb(via->viacfg_function, VIA_CONFIG_INDEX); |
| 2584 | tmp = inb (VIA_CONFIG_DATA); |
| 2585 | /* Bit 5: EPP+ECP enable; bit 7: PS/2 bidirectional port enable */ |
| 2586 | outb(via->viacfg_parport_control, VIA_CONFIG_INDEX); |
| 2587 | tmp2 = inb (VIA_CONFIG_DATA); |
| 2588 | if (siofunc == VIA_FUNCTION_PROBE) |
| 2589 | { |
| 2590 | siofunc = tmp & VIA_FUNCTION_PARPORT_DISABLE; |
| 2591 | ppcontrol = tmp2; |
| 2592 | } |
| 2593 | else |
| 2594 | { |
| 2595 | tmp &= ~VIA_FUNCTION_PARPORT_DISABLE; |
| 2596 | tmp |= siofunc; |
| 2597 | outb(via->viacfg_function, VIA_CONFIG_INDEX); |
| 2598 | outb(tmp, VIA_CONFIG_DATA); |
| 2599 | tmp2 &= ~(VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP); |
| 2600 | tmp2 |= ppcontrol; |
| 2601 | outb(via->viacfg_parport_control, VIA_CONFIG_INDEX); |
| 2602 | outb(tmp2, VIA_CONFIG_DATA); |
| 2603 | } |
| 2604 | |
| 2605 | /* Parallel Port I/O Base Address, bits 9-2 */ |
| 2606 | outb(via->viacfg_parport_base, VIA_CONFIG_INDEX); |
| 2607 | port1 = inb(VIA_CONFIG_DATA) << 2; |
| 2608 | |
| 2609 | printk (KERN_DEBUG "parport_pc: Current parallel port base: 0x%X\n",port1); |
| 2610 | if ((port1 == 0x3BC) && have_epp) |
| 2611 | { |
| 2612 | outb(via->viacfg_parport_base, VIA_CONFIG_INDEX); |
| 2613 | outb((0x378 >> 2), VIA_CONFIG_DATA); |
| 2614 | printk(KERN_DEBUG "parport_pc: Parallel port base changed to 0x378\n"); |
| 2615 | port1 = 0x378; |
| 2616 | } |
| 2617 | |
| 2618 | /* |
| 2619 | * lock super i/o configuration |
| 2620 | */ |
| 2621 | pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp); |
| 2622 | tmp &= ~via->via_pci_superio_config_data; |
| 2623 | pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp); |
| 2624 | |
| 2625 | if (siofunc == VIA_FUNCTION_PARPORT_DISABLE) { |
| 2626 | printk(KERN_INFO "parport_pc: VIA parallel port disabled in BIOS\n"); |
| 2627 | return 0; |
| 2628 | } |
| 2629 | |
| 2630 | /* Bits 7-4: PnP Routing for Parallel Port IRQ */ |
| 2631 | pci_read_config_byte(pdev, via->via_pci_parport_irq_reg, &tmp); |
| 2632 | irq = ((tmp & VIA_IRQCONTROL_PARALLEL) >> 4); |
| 2633 | |
| 2634 | if (siofunc == VIA_FUNCTION_PARPORT_ECP) |
| 2635 | { |
| 2636 | /* Bits 3-2: PnP Routing for Parallel Port DMA */ |
| 2637 | pci_read_config_byte(pdev, via->via_pci_parport_dma_reg, &tmp); |
| 2638 | dma = ((tmp & VIA_DMACONTROL_PARALLEL) >> 2); |
| 2639 | } |
| 2640 | else |
| 2641 | /* if ECP not enabled, DMA is not enabled, assumed bogus 'dma' value */ |
| 2642 | dma = PARPORT_DMA_NONE; |
| 2643 | |
| 2644 | /* Let the user (or defaults) steer us away from interrupts and DMA */ |
| 2645 | if (autoirq == PARPORT_IRQ_NONE) { |
| 2646 | irq = PARPORT_IRQ_NONE; |
| 2647 | dma = PARPORT_DMA_NONE; |
| 2648 | } |
| 2649 | if (autodma == PARPORT_DMA_NONE) |
| 2650 | dma = PARPORT_DMA_NONE; |
| 2651 | |
| 2652 | switch (port1) { |
| 2653 | case 0x3bc: port2 = 0x7bc; break; |
| 2654 | case 0x378: port2 = 0x778; break; |
| 2655 | case 0x278: port2 = 0x678; break; |
| 2656 | default: |
| 2657 | printk(KERN_INFO "parport_pc: Weird VIA parport base 0x%X, ignoring\n", |
| 2658 | port1); |
| 2659 | return 0; |
| 2660 | } |
| 2661 | |
| 2662 | /* filter bogus IRQs */ |
| 2663 | switch (irq) { |
| 2664 | case 0: |
| 2665 | case 2: |
| 2666 | case 8: |
| 2667 | case 13: |
| 2668 | irq = PARPORT_IRQ_NONE; |
| 2669 | break; |
| 2670 | |
| 2671 | default: /* do nothing */ |
| 2672 | break; |
| 2673 | } |
| 2674 | |
| 2675 | /* finally, do the probe with values obtained */ |
| 2676 | if (parport_pc_probe_port (port1, port2, irq, dma, NULL)) { |
| 2677 | printk (KERN_INFO |
| 2678 | "parport_pc: VIA parallel port: io=0x%X", port1); |
| 2679 | if (irq != PARPORT_IRQ_NONE) |
| 2680 | printk (", irq=%d", irq); |
| 2681 | if (dma != PARPORT_DMA_NONE) |
| 2682 | printk (", dma=%d", dma); |
| 2683 | printk ("\n"); |
| 2684 | return 1; |
| 2685 | } |
| 2686 | |
| 2687 | printk(KERN_WARNING "parport_pc: Strange, can't probe VIA parallel port: io=0x%X, irq=%d, dma=%d\n", |
| 2688 | port1, irq, dma); |
| 2689 | return 0; |
| 2690 | } |
| 2691 | |
| 2692 | |
| 2693 | enum parport_pc_sio_types { |
| 2694 | sio_via_686a = 0, /* Via VT82C686A motherboard Super I/O */ |
| 2695 | sio_via_8231, /* Via VT8231 south bridge integrated Super IO */ |
| 2696 | sio_ite_8872, |
| 2697 | last_sio |
| 2698 | }; |
| 2699 | |
| 2700 | /* each element directly indexed from enum list, above */ |
| 2701 | static struct parport_pc_superio { |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 2702 | int (*probe) (struct pci_dev *pdev, int autoirq, int autodma, |
| 2703 | const struct parport_pc_via_data *via); |
| 2704 | const struct parport_pc_via_data *via; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2705 | } parport_pc_superio_info[] __devinitdata = { |
| 2706 | { sio_via_probe, &via_686a_data, }, |
| 2707 | { sio_via_probe, &via_8231_data, }, |
| 2708 | { sio_ite_8872_probe, NULL, }, |
| 2709 | }; |
| 2710 | |
| 2711 | enum parport_pc_pci_cards { |
| 2712 | siig_1p_10x = last_sio, |
| 2713 | siig_2p_10x, |
| 2714 | siig_1p_20x, |
| 2715 | siig_2p_20x, |
| 2716 | lava_parallel, |
| 2717 | lava_parallel_dual_a, |
| 2718 | lava_parallel_dual_b, |
| 2719 | boca_ioppar, |
| 2720 | plx_9050, |
| 2721 | timedia_4078a, |
| 2722 | timedia_4079h, |
| 2723 | timedia_4085h, |
| 2724 | timedia_4088a, |
| 2725 | timedia_4089a, |
| 2726 | timedia_4095a, |
| 2727 | timedia_4096a, |
| 2728 | timedia_4078u, |
| 2729 | timedia_4079a, |
| 2730 | timedia_4085u, |
| 2731 | timedia_4079r, |
| 2732 | timedia_4079s, |
| 2733 | timedia_4079d, |
| 2734 | timedia_4079e, |
| 2735 | timedia_4079f, |
| 2736 | timedia_9079a, |
| 2737 | timedia_9079b, |
| 2738 | timedia_9079c, |
| 2739 | timedia_4006a, |
| 2740 | timedia_4014, |
| 2741 | timedia_4008a, |
| 2742 | timedia_4018, |
| 2743 | timedia_9018a, |
| 2744 | syba_2p_epp, |
| 2745 | syba_1p_ecp, |
| 2746 | titan_010l, |
Maximilian Attems | 85747f0 | 2005-09-06 15:17:21 -0700 | [diff] [blame] | 2747 | titan_1284p1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2748 | titan_1284p2, |
| 2749 | avlab_1p, |
| 2750 | avlab_2p, |
| 2751 | oxsemi_954, |
| 2752 | oxsemi_840, |
| 2753 | aks_0100, |
| 2754 | mobility_pp, |
| 2755 | netmos_9705, |
| 2756 | netmos_9715, |
| 2757 | netmos_9755, |
| 2758 | netmos_9805, |
| 2759 | netmos_9815, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2760 | }; |
| 2761 | |
| 2762 | |
| 2763 | /* each element directly indexed from enum list, above |
| 2764 | * (but offset by last_sio) */ |
| 2765 | static struct parport_pc_pci { |
| 2766 | int numports; |
| 2767 | struct { /* BAR (base address registers) numbers in the config |
| 2768 | space header */ |
| 2769 | int lo; |
| 2770 | int hi; /* -1 if not there, >6 for offset-method (max |
| 2771 | BAR is 6) */ |
| 2772 | } addr[4]; |
| 2773 | |
| 2774 | /* If set, this is called immediately after pci_enable_device. |
| 2775 | * If it returns non-zero, no probing will take place and the |
| 2776 | * ports will not be used. */ |
| 2777 | int (*preinit_hook) (struct pci_dev *pdev, int autoirq, int autodma); |
| 2778 | |
| 2779 | /* If set, this is called after probing for ports. If 'failed' |
| 2780 | * is non-zero we couldn't use any of the ports. */ |
| 2781 | void (*postinit_hook) (struct pci_dev *pdev, int failed); |
Randy.Dunlap | 96766a3 | 2006-04-18 22:21:57 -0700 | [diff] [blame] | 2782 | } cards[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2783 | /* siig_1p_10x */ { 1, { { 2, 3 }, } }, |
| 2784 | /* siig_2p_10x */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
| 2785 | /* siig_1p_20x */ { 1, { { 0, 1 }, } }, |
| 2786 | /* siig_2p_20x */ { 2, { { 0, 1 }, { 2, 3 }, } }, |
| 2787 | /* lava_parallel */ { 1, { { 0, -1 }, } }, |
| 2788 | /* lava_parallel_dual_a */ { 1, { { 0, -1 }, } }, |
| 2789 | /* lava_parallel_dual_b */ { 1, { { 0, -1 }, } }, |
| 2790 | /* boca_ioppar */ { 1, { { 0, -1 }, } }, |
| 2791 | /* plx_9050 */ { 2, { { 4, -1 }, { 5, -1 }, } }, |
| 2792 | /* timedia_4078a */ { 1, { { 2, -1 }, } }, |
| 2793 | /* timedia_4079h */ { 1, { { 2, 3 }, } }, |
| 2794 | /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } }, |
| 2795 | /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
| 2796 | /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
| 2797 | /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
| 2798 | /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
| 2799 | /* timedia_4078u */ { 1, { { 2, -1 }, } }, |
| 2800 | /* timedia_4079a */ { 1, { { 2, 3 }, } }, |
| 2801 | /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } }, |
| 2802 | /* timedia_4079r */ { 1, { { 2, 3 }, } }, |
| 2803 | /* timedia_4079s */ { 1, { { 2, 3 }, } }, |
| 2804 | /* timedia_4079d */ { 1, { { 2, 3 }, } }, |
| 2805 | /* timedia_4079e */ { 1, { { 2, 3 }, } }, |
| 2806 | /* timedia_4079f */ { 1, { { 2, 3 }, } }, |
| 2807 | /* timedia_9079a */ { 1, { { 2, 3 }, } }, |
| 2808 | /* timedia_9079b */ { 1, { { 2, 3 }, } }, |
| 2809 | /* timedia_9079c */ { 1, { { 2, 3 }, } }, |
| 2810 | /* timedia_4006a */ { 1, { { 0, -1 }, } }, |
| 2811 | /* timedia_4014 */ { 2, { { 0, -1 }, { 2, -1 }, } }, |
| 2812 | /* timedia_4008a */ { 1, { { 0, 1 }, } }, |
| 2813 | /* timedia_4018 */ { 2, { { 0, 1 }, { 2, 3 }, } }, |
| 2814 | /* timedia_9018a */ { 2, { { 0, 1 }, { 2, 3 }, } }, |
| 2815 | /* SYBA uses fixed offsets in |
| 2816 | a 1K io window */ |
| 2817 | /* syba_2p_epp AP138B */ { 2, { { 0, 0x078 }, { 0, 0x178 }, } }, |
| 2818 | /* syba_1p_ecp W83787 */ { 1, { { 0, 0x078 }, } }, |
| 2819 | /* titan_010l */ { 1, { { 3, -1 }, } }, |
Maximilian Attems | 85747f0 | 2005-09-06 15:17:21 -0700 | [diff] [blame] | 2820 | /* titan_1284p1 */ { 1, { { 0, 1 }, } }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2821 | /* titan_1284p2 */ { 2, { { 0, 1 }, { 2, 3 }, } }, |
| 2822 | /* avlab_1p */ { 1, { { 0, 1}, } }, |
| 2823 | /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, |
| 2824 | /* The Oxford Semi cards are unusual: 954 doesn't support ECP, |
| 2825 | * and 840 locks up if you write 1 to bit 2! */ |
| 2826 | /* oxsemi_954 */ { 1, { { 0, -1 }, } }, |
| 2827 | /* oxsemi_840 */ { 1, { { 0, -1 }, } }, |
| 2828 | /* aks_0100 */ { 1, { { 0, -1 }, } }, |
| 2829 | /* mobility_pp */ { 1, { { 0, 1 }, } }, |
| 2830 | /* netmos_9705 */ { 1, { { 0, -1 }, } }, /* untested */ |
| 2831 | /* netmos_9715 */ { 2, { { 0, 1 }, { 2, 3 },} }, /* untested */ |
| 2832 | /* netmos_9755 */ { 2, { { 0, 1 }, { 2, 3 },} }, /* untested */ |
| 2833 | /* netmos_9805 */ { 1, { { 0, -1 }, } }, /* untested */ |
| 2834 | /* netmos_9815 */ { 2, { { 0, -1 }, { 2, -1 }, } }, /* untested */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2835 | }; |
| 2836 | |
Marko Kohtala | a6767b7 | 2006-01-06 00:19:48 -0800 | [diff] [blame] | 2837 | static const struct pci_device_id parport_pc_pci_tbl[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2838 | /* Super-IO onboard chips */ |
| 2839 | { 0x1106, 0x0686, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_686a }, |
| 2840 | { 0x1106, 0x8231, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_8231 }, |
| 2841 | { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8872, |
| 2842 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_ite_8872 }, |
| 2843 | |
| 2844 | /* PCI cards */ |
| 2845 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_10x, |
| 2846 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_10x }, |
| 2847 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_10x, |
| 2848 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_10x }, |
| 2849 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_20x, |
| 2850 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_20x }, |
| 2851 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_20x, |
| 2852 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_20x }, |
| 2853 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PARALLEL, |
| 2854 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel }, |
| 2855 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_A, |
| 2856 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_a }, |
| 2857 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_B, |
| 2858 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_b }, |
| 2859 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_BOCA_IOPPAR, |
| 2860 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, boca_ioppar }, |
| 2861 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2862 | PCI_SUBVENDOR_ID_EXSYS, PCI_SUBDEVICE_ID_EXSYS_4014, 0,0, plx_9050 }, |
| 2863 | /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/ |
| 2864 | { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a }, |
| 2865 | { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h }, |
| 2866 | { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h }, |
| 2867 | { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a }, |
| 2868 | { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a }, |
| 2869 | { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a }, |
| 2870 | { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a }, |
| 2871 | { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u }, |
| 2872 | { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a }, |
| 2873 | { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u }, |
| 2874 | { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r }, |
| 2875 | { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s }, |
| 2876 | { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d }, |
| 2877 | { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e }, |
| 2878 | { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f }, |
| 2879 | { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a }, |
| 2880 | { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b }, |
| 2881 | { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c }, |
| 2882 | { 0x1409, 0x7268, 0x1409, 0x0101, 0, 0, timedia_4006a }, |
| 2883 | { 0x1409, 0x7268, 0x1409, 0x0102, 0, 0, timedia_4014 }, |
| 2884 | { 0x1409, 0x7268, 0x1409, 0x0103, 0, 0, timedia_4008a }, |
| 2885 | { 0x1409, 0x7268, 0x1409, 0x0104, 0, 0, timedia_4018 }, |
| 2886 | { 0x1409, 0x7268, 0x1409, 0x9018, 0, 0, timedia_9018a }, |
| 2887 | { 0x14f2, 0x0121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, mobility_pp }, |
| 2888 | { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_2P_EPP, |
| 2889 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_2p_epp }, |
| 2890 | { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_1P_ECP, |
| 2891 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_1p_ecp }, |
| 2892 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_010L, |
| 2893 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_010l }, |
Maximilian Attems | 85747f0 | 2005-09-06 15:17:21 -0700 | [diff] [blame] | 2894 | { 0x9710, 0x9805, 0x1000, 0x0010, 0, 0, titan_1284p1 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2895 | { 0x9710, 0x9815, 0x1000, 0x0020, 0, 0, titan_1284p2 }, |
| 2896 | /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/ |
| 2897 | { 0x14db, 0x2120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1p}, /* AFAVLAB_TK9902 */ |
| 2898 | { 0x14db, 0x2121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2p}, |
| 2899 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954PP, |
| 2900 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_954 }, |
| 2901 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_12PCI840, |
| 2902 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_840 }, |
| 2903 | { PCI_VENDOR_ID_AKS, PCI_DEVICE_ID_AKS_ALADDINCARD, |
| 2904 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, aks_0100 }, |
| 2905 | /* NetMos communication controllers */ |
| 2906 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9705, |
| 2907 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9705 }, |
| 2908 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9715, |
| 2909 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9715 }, |
| 2910 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9755, |
| 2911 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9755 }, |
| 2912 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9805, |
| 2913 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9805 }, |
| 2914 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9815, |
| 2915 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9815 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2916 | { 0, } /* terminate list */ |
| 2917 | }; |
| 2918 | MODULE_DEVICE_TABLE(pci,parport_pc_pci_tbl); |
| 2919 | |
| 2920 | struct pci_parport_data { |
| 2921 | int num; |
| 2922 | struct parport *ports[2]; |
| 2923 | }; |
| 2924 | |
| 2925 | static int parport_pc_pci_probe (struct pci_dev *dev, |
| 2926 | const struct pci_device_id *id) |
| 2927 | { |
| 2928 | int err, count, n, i = id->driver_data; |
| 2929 | struct pci_parport_data *data; |
| 2930 | |
| 2931 | if (i < last_sio) |
| 2932 | /* This is an onboard Super-IO and has already been probed */ |
| 2933 | return 0; |
| 2934 | |
| 2935 | /* This is a PCI card */ |
| 2936 | i -= last_sio; |
| 2937 | count = 0; |
| 2938 | if ((err = pci_enable_device (dev)) != 0) |
| 2939 | return err; |
| 2940 | |
| 2941 | data = kmalloc(sizeof(struct pci_parport_data), GFP_KERNEL); |
| 2942 | if (!data) |
| 2943 | return -ENOMEM; |
| 2944 | |
| 2945 | if (cards[i].preinit_hook && |
| 2946 | cards[i].preinit_hook (dev, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) { |
| 2947 | kfree(data); |
| 2948 | return -ENODEV; |
| 2949 | } |
| 2950 | |
| 2951 | for (n = 0; n < cards[i].numports; n++) { |
| 2952 | int lo = cards[i].addr[n].lo; |
| 2953 | int hi = cards[i].addr[n].hi; |
| 2954 | unsigned long io_lo, io_hi; |
| 2955 | io_lo = pci_resource_start (dev, lo); |
| 2956 | io_hi = 0; |
| 2957 | if ((hi >= 0) && (hi <= 6)) |
| 2958 | io_hi = pci_resource_start (dev, hi); |
| 2959 | else if (hi > 6) |
| 2960 | io_lo += hi; /* Reinterpret the meaning of |
| 2961 | "hi" as an offset (see SYBA |
| 2962 | def.) */ |
| 2963 | /* TODO: test if sharing interrupts works */ |
| 2964 | printk (KERN_DEBUG "PCI parallel port detected: %04x:%04x, " |
| 2965 | "I/O at %#lx(%#lx)\n", |
| 2966 | parport_pc_pci_tbl[i + last_sio].vendor, |
| 2967 | parport_pc_pci_tbl[i + last_sio].device, io_lo, io_hi); |
| 2968 | data->ports[count] = |
| 2969 | parport_pc_probe_port (io_lo, io_hi, PARPORT_IRQ_NONE, |
| 2970 | PARPORT_DMA_NONE, dev); |
| 2971 | if (data->ports[count]) |
| 2972 | count++; |
| 2973 | } |
| 2974 | |
| 2975 | data->num = count; |
| 2976 | |
| 2977 | if (cards[i].postinit_hook) |
| 2978 | cards[i].postinit_hook (dev, count == 0); |
| 2979 | |
| 2980 | if (count) { |
| 2981 | pci_set_drvdata(dev, data); |
| 2982 | return 0; |
| 2983 | } |
| 2984 | |
| 2985 | kfree(data); |
| 2986 | |
| 2987 | return -ENODEV; |
| 2988 | } |
| 2989 | |
| 2990 | static void __devexit parport_pc_pci_remove(struct pci_dev *dev) |
| 2991 | { |
| 2992 | struct pci_parport_data *data = pci_get_drvdata(dev); |
| 2993 | int i; |
| 2994 | |
| 2995 | pci_set_drvdata(dev, NULL); |
| 2996 | |
| 2997 | if (data) { |
| 2998 | for (i = data->num - 1; i >= 0; i--) |
| 2999 | parport_pc_unregister_port(data->ports[i]); |
| 3000 | |
| 3001 | kfree(data); |
| 3002 | } |
| 3003 | } |
| 3004 | |
| 3005 | static struct pci_driver parport_pc_pci_driver = { |
| 3006 | .name = "parport_pc", |
| 3007 | .id_table = parport_pc_pci_tbl, |
| 3008 | .probe = parport_pc_pci_probe, |
| 3009 | .remove = __devexit_p(parport_pc_pci_remove), |
| 3010 | }; |
| 3011 | |
| 3012 | static int __init parport_pc_init_superio (int autoirq, int autodma) |
| 3013 | { |
| 3014 | const struct pci_device_id *id; |
| 3015 | struct pci_dev *pdev = NULL; |
| 3016 | int ret = 0; |
| 3017 | |
Jiri Slaby | c9d8073 | 2005-08-10 02:09:39 +0200 | [diff] [blame] | 3018 | for_each_pci_dev(pdev) { |
Greg Kroah-Hartman | 7586585 | 2005-06-30 02:18:12 -0700 | [diff] [blame] | 3019 | id = pci_match_id(parport_pc_pci_tbl, pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3020 | if (id == NULL || id->driver_data >= last_sio) |
| 3021 | continue; |
| 3022 | |
| 3023 | if (parport_pc_superio_info[id->driver_data].probe |
| 3024 | (pdev, autoirq, autodma,parport_pc_superio_info[id->driver_data].via)) { |
| 3025 | ret++; |
| 3026 | } |
| 3027 | } |
| 3028 | |
| 3029 | return ret; /* number of devices found */ |
| 3030 | } |
| 3031 | #else |
| 3032 | static struct pci_driver parport_pc_pci_driver; |
| 3033 | static int __init parport_pc_init_superio(int autoirq, int autodma) {return 0;} |
| 3034 | #endif /* CONFIG_PCI */ |
| 3035 | |
| 3036 | |
| 3037 | static const struct pnp_device_id parport_pc_pnp_tbl[] = { |
| 3038 | /* Standard LPT Printer Port */ |
| 3039 | {.id = "PNP0400", .driver_data = 0}, |
| 3040 | /* ECP Printer Port */ |
| 3041 | {.id = "PNP0401", .driver_data = 0}, |
| 3042 | { } |
| 3043 | }; |
| 3044 | |
| 3045 | MODULE_DEVICE_TABLE(pnp,parport_pc_pnp_tbl); |
| 3046 | |
| 3047 | static int parport_pc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id) |
| 3048 | { |
| 3049 | struct parport *pdata; |
| 3050 | unsigned long io_lo, io_hi; |
| 3051 | int dma, irq; |
| 3052 | |
| 3053 | if (pnp_port_valid(dev,0) && |
| 3054 | !(pnp_port_flags(dev,0) & IORESOURCE_DISABLED)) { |
| 3055 | io_lo = pnp_port_start(dev,0); |
| 3056 | } else |
| 3057 | return -EINVAL; |
| 3058 | |
| 3059 | if (pnp_port_valid(dev,1) && |
| 3060 | !(pnp_port_flags(dev,1) & IORESOURCE_DISABLED)) { |
| 3061 | io_hi = pnp_port_start(dev,1); |
| 3062 | } else |
| 3063 | io_hi = 0; |
| 3064 | |
| 3065 | if (pnp_irq_valid(dev,0) && |
| 3066 | !(pnp_irq_flags(dev,0) & IORESOURCE_DISABLED)) { |
| 3067 | irq = pnp_irq(dev,0); |
| 3068 | } else |
| 3069 | irq = PARPORT_IRQ_NONE; |
| 3070 | |
| 3071 | if (pnp_dma_valid(dev,0) && |
| 3072 | !(pnp_dma_flags(dev,0) & IORESOURCE_DISABLED)) { |
| 3073 | dma = pnp_dma(dev,0); |
| 3074 | } else |
| 3075 | dma = PARPORT_DMA_NONE; |
| 3076 | |
| 3077 | printk(KERN_INFO "parport: PnPBIOS parport detected.\n"); |
| 3078 | if (!(pdata = parport_pc_probe_port (io_lo, io_hi, irq, dma, NULL))) |
| 3079 | return -ENODEV; |
| 3080 | |
| 3081 | pnp_set_drvdata(dev,pdata); |
| 3082 | return 0; |
| 3083 | } |
| 3084 | |
| 3085 | static void parport_pc_pnp_remove(struct pnp_dev *dev) |
| 3086 | { |
| 3087 | struct parport *pdata = (struct parport *)pnp_get_drvdata(dev); |
| 3088 | if (!pdata) |
| 3089 | return; |
| 3090 | |
| 3091 | parport_pc_unregister_port(pdata); |
| 3092 | } |
| 3093 | |
| 3094 | /* we only need the pnp layer to activate the device, at least for now */ |
| 3095 | static struct pnp_driver parport_pc_pnp_driver = { |
| 3096 | .name = "parport_pc", |
| 3097 | .id_table = parport_pc_pnp_tbl, |
| 3098 | .probe = parport_pc_pnp_probe, |
| 3099 | .remove = parport_pc_pnp_remove, |
| 3100 | }; |
| 3101 | |
| 3102 | |
| 3103 | /* This is called by parport_pc_find_nonpci_ports (in asm/parport.h) */ |
| 3104 | static int __devinit __attribute__((unused)) |
| 3105 | parport_pc_find_isa_ports (int autoirq, int autodma) |
| 3106 | { |
| 3107 | int count = 0; |
| 3108 | |
| 3109 | if (parport_pc_probe_port(0x3bc, 0x7bc, autoirq, autodma, NULL)) |
| 3110 | count++; |
| 3111 | if (parport_pc_probe_port(0x378, 0x778, autoirq, autodma, NULL)) |
| 3112 | count++; |
| 3113 | if (parport_pc_probe_port(0x278, 0x678, autoirq, autodma, NULL)) |
| 3114 | count++; |
| 3115 | |
| 3116 | return count; |
| 3117 | } |
| 3118 | |
| 3119 | /* This function is called by parport_pc_init if the user didn't |
| 3120 | * specify any ports to probe. Its job is to find some ports. Order |
| 3121 | * is important here -- we want ISA ports to be registered first, |
| 3122 | * followed by PCI cards (for least surprise), but before that we want |
| 3123 | * to do chipset-specific tests for some onboard ports that we know |
| 3124 | * about. |
| 3125 | * |
| 3126 | * autoirq is PARPORT_IRQ_NONE, PARPORT_IRQ_AUTO, or PARPORT_IRQ_PROBEONLY |
| 3127 | * autodma is PARPORT_DMA_NONE or PARPORT_DMA_AUTO |
| 3128 | */ |
Bjorn Helgaas | 7597fee | 2006-03-27 01:17:02 -0800 | [diff] [blame] | 3129 | static void __init parport_pc_find_ports (int autoirq, int autodma) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3130 | { |
Bjorn Helgaas | 7597fee | 2006-03-27 01:17:02 -0800 | [diff] [blame] | 3131 | int count = 0, err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3132 | |
| 3133 | #ifdef CONFIG_PARPORT_PC_SUPERIO |
| 3134 | detect_and_report_winbond (); |
| 3135 | detect_and_report_smsc (); |
| 3136 | #endif |
| 3137 | |
| 3138 | /* Onboard SuperIO chipsets that show themselves on the PCI bus. */ |
| 3139 | count += parport_pc_init_superio (autoirq, autodma); |
| 3140 | |
| 3141 | /* PnP ports, skip detection if SuperIO already found them */ |
| 3142 | if (!count) { |
Bjorn Helgaas | 7597fee | 2006-03-27 01:17:02 -0800 | [diff] [blame] | 3143 | err = pnp_register_driver (&parport_pc_pnp_driver); |
| 3144 | if (!err) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3145 | pnp_registered_parport = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3146 | } |
| 3147 | |
| 3148 | /* ISA ports and whatever (see asm/parport.h). */ |
Bjorn Helgaas | 7597fee | 2006-03-27 01:17:02 -0800 | [diff] [blame] | 3149 | parport_pc_find_nonpci_ports (autoirq, autodma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3150 | |
Bjorn Helgaas | 7597fee | 2006-03-27 01:17:02 -0800 | [diff] [blame] | 3151 | err = pci_register_driver (&parport_pc_pci_driver); |
| 3152 | if (!err) |
| 3153 | pci_registered_parport = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3154 | } |
| 3155 | |
| 3156 | /* |
| 3157 | * Piles of crap below pretend to be a parser for module and kernel |
| 3158 | * parameters. Say "thank you" to whoever had come up with that |
| 3159 | * syntax and keep in mind that code below is a cleaned up version. |
| 3160 | */ |
| 3161 | |
| 3162 | static int __initdata io[PARPORT_PC_MAX_PORTS+1] = { [0 ... PARPORT_PC_MAX_PORTS] = 0 }; |
| 3163 | static int __initdata io_hi[PARPORT_PC_MAX_PORTS+1] = |
| 3164 | { [0 ... PARPORT_PC_MAX_PORTS] = PARPORT_IOHI_AUTO }; |
| 3165 | static int __initdata dmaval[PARPORT_PC_MAX_PORTS] = { [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_DMA_NONE }; |
| 3166 | static int __initdata irqval[PARPORT_PC_MAX_PORTS] = { [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_IRQ_PROBEONLY }; |
| 3167 | |
| 3168 | static int __init parport_parse_param(const char *s, int *val, |
| 3169 | int automatic, int none, int nofifo) |
| 3170 | { |
| 3171 | if (!s) |
| 3172 | return 0; |
| 3173 | if (!strncmp(s, "auto", 4)) |
| 3174 | *val = automatic; |
| 3175 | else if (!strncmp(s, "none", 4)) |
| 3176 | *val = none; |
| 3177 | else if (nofifo && !strncmp(s, "nofifo", 4)) |
| 3178 | *val = nofifo; |
| 3179 | else { |
| 3180 | char *ep; |
| 3181 | unsigned long r = simple_strtoul(s, &ep, 0); |
| 3182 | if (ep != s) |
| 3183 | *val = r; |
| 3184 | else { |
| 3185 | printk(KERN_ERR "parport: bad specifier `%s'\n", s); |
| 3186 | return -1; |
| 3187 | } |
| 3188 | } |
| 3189 | return 0; |
| 3190 | } |
| 3191 | |
| 3192 | static int __init parport_parse_irq(const char *irqstr, int *val) |
| 3193 | { |
| 3194 | return parport_parse_param(irqstr, val, PARPORT_IRQ_AUTO, |
| 3195 | PARPORT_IRQ_NONE, 0); |
| 3196 | } |
| 3197 | |
| 3198 | static int __init parport_parse_dma(const char *dmastr, int *val) |
| 3199 | { |
| 3200 | return parport_parse_param(dmastr, val, PARPORT_DMA_AUTO, |
| 3201 | PARPORT_DMA_NONE, PARPORT_DMA_NOFIFO); |
| 3202 | } |
| 3203 | |
| 3204 | #ifdef CONFIG_PCI |
| 3205 | static int __init parport_init_mode_setup(char *str) |
| 3206 | { |
| 3207 | printk(KERN_DEBUG "parport_pc.c: Specified parameter parport_init_mode=%s\n", str); |
| 3208 | |
| 3209 | if (!strcmp (str, "spp")) |
| 3210 | parport_init_mode=1; |
| 3211 | if (!strcmp (str, "ps2")) |
| 3212 | parport_init_mode=2; |
| 3213 | if (!strcmp (str, "epp")) |
| 3214 | parport_init_mode=3; |
| 3215 | if (!strcmp (str, "ecp")) |
| 3216 | parport_init_mode=4; |
| 3217 | if (!strcmp (str, "ecpepp")) |
| 3218 | parport_init_mode=5; |
| 3219 | return 1; |
| 3220 | } |
| 3221 | #endif |
| 3222 | |
| 3223 | #ifdef MODULE |
| 3224 | static const char *irq[PARPORT_PC_MAX_PORTS]; |
| 3225 | static const char *dma[PARPORT_PC_MAX_PORTS]; |
| 3226 | |
| 3227 | MODULE_PARM_DESC(io, "Base I/O address (SPP regs)"); |
| 3228 | module_param_array(io, int, NULL, 0); |
| 3229 | MODULE_PARM_DESC(io_hi, "Base I/O address (ECR)"); |
| 3230 | module_param_array(io_hi, int, NULL, 0); |
| 3231 | MODULE_PARM_DESC(irq, "IRQ line"); |
| 3232 | module_param_array(irq, charp, NULL, 0); |
| 3233 | MODULE_PARM_DESC(dma, "DMA channel"); |
| 3234 | module_param_array(dma, charp, NULL, 0); |
| 3235 | #if defined(CONFIG_PARPORT_PC_SUPERIO) || \ |
| 3236 | (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO)) |
| 3237 | MODULE_PARM_DESC(verbose_probing, "Log chit-chat during initialisation"); |
| 3238 | module_param(verbose_probing, int, 0644); |
| 3239 | #endif |
| 3240 | #ifdef CONFIG_PCI |
| 3241 | static char *init_mode; |
| 3242 | MODULE_PARM_DESC(init_mode, "Initialise mode for VIA VT8231 port (spp, ps2, epp, ecp or ecpepp)"); |
| 3243 | module_param(init_mode, charp, 0); |
| 3244 | #endif |
| 3245 | |
| 3246 | static int __init parse_parport_params(void) |
| 3247 | { |
| 3248 | unsigned int i; |
| 3249 | int val; |
| 3250 | |
| 3251 | #ifdef CONFIG_PCI |
| 3252 | if (init_mode) |
| 3253 | parport_init_mode_setup(init_mode); |
| 3254 | #endif |
| 3255 | |
| 3256 | for (i = 0; i < PARPORT_PC_MAX_PORTS && io[i]; i++) { |
| 3257 | if (parport_parse_irq(irq[i], &val)) |
| 3258 | return 1; |
| 3259 | irqval[i] = val; |
| 3260 | if (parport_parse_dma(dma[i], &val)) |
| 3261 | return 1; |
| 3262 | dmaval[i] = val; |
| 3263 | } |
| 3264 | if (!io[0]) { |
| 3265 | /* The user can make us use any IRQs or DMAs we find. */ |
| 3266 | if (irq[0] && !parport_parse_irq(irq[0], &val)) |
| 3267 | switch (val) { |
| 3268 | case PARPORT_IRQ_NONE: |
| 3269 | case PARPORT_IRQ_AUTO: |
| 3270 | irqval[0] = val; |
| 3271 | break; |
| 3272 | default: |
| 3273 | printk (KERN_WARNING |
| 3274 | "parport_pc: irq specified " |
| 3275 | "without base address. Use 'io=' " |
| 3276 | "to specify one\n"); |
| 3277 | } |
| 3278 | |
| 3279 | if (dma[0] && !parport_parse_dma(dma[0], &val)) |
| 3280 | switch (val) { |
| 3281 | case PARPORT_DMA_NONE: |
| 3282 | case PARPORT_DMA_AUTO: |
| 3283 | dmaval[0] = val; |
| 3284 | break; |
| 3285 | default: |
| 3286 | printk (KERN_WARNING |
| 3287 | "parport_pc: dma specified " |
| 3288 | "without base address. Use 'io=' " |
| 3289 | "to specify one\n"); |
| 3290 | } |
| 3291 | } |
| 3292 | return 0; |
| 3293 | } |
| 3294 | |
| 3295 | #else |
| 3296 | |
| 3297 | static int parport_setup_ptr __initdata = 0; |
| 3298 | |
| 3299 | /* |
| 3300 | * Acceptable parameters: |
| 3301 | * |
| 3302 | * parport=0 |
| 3303 | * parport=auto |
| 3304 | * parport=0xBASE[,IRQ[,DMA]] |
| 3305 | * |
| 3306 | * IRQ/DMA may be numeric or 'auto' or 'none' |
| 3307 | */ |
| 3308 | static int __init parport_setup (char *str) |
| 3309 | { |
| 3310 | char *endptr; |
| 3311 | char *sep; |
| 3312 | int val; |
| 3313 | |
| 3314 | if (!str || !*str || (*str == '0' && !*(str+1))) { |
| 3315 | /* Disable parport if "parport=0" in cmdline */ |
| 3316 | io[0] = PARPORT_DISABLE; |
| 3317 | return 1; |
| 3318 | } |
| 3319 | |
| 3320 | if (!strncmp (str, "auto", 4)) { |
| 3321 | irqval[0] = PARPORT_IRQ_AUTO; |
| 3322 | dmaval[0] = PARPORT_DMA_AUTO; |
| 3323 | return 1; |
| 3324 | } |
| 3325 | |
| 3326 | val = simple_strtoul (str, &endptr, 0); |
| 3327 | if (endptr == str) { |
| 3328 | printk (KERN_WARNING "parport=%s not understood\n", str); |
| 3329 | return 1; |
| 3330 | } |
| 3331 | |
| 3332 | if (parport_setup_ptr == PARPORT_PC_MAX_PORTS) { |
| 3333 | printk(KERN_ERR "parport=%s ignored, too many ports\n", str); |
| 3334 | return 1; |
| 3335 | } |
| 3336 | |
| 3337 | io[parport_setup_ptr] = val; |
| 3338 | irqval[parport_setup_ptr] = PARPORT_IRQ_NONE; |
| 3339 | dmaval[parport_setup_ptr] = PARPORT_DMA_NONE; |
| 3340 | |
| 3341 | sep = strchr(str, ','); |
| 3342 | if (sep++) { |
| 3343 | if (parport_parse_irq(sep, &val)) |
| 3344 | return 1; |
| 3345 | irqval[parport_setup_ptr] = val; |
| 3346 | sep = strchr(sep, ','); |
| 3347 | if (sep++) { |
| 3348 | if (parport_parse_dma(sep, &val)) |
| 3349 | return 1; |
| 3350 | dmaval[parport_setup_ptr] = val; |
| 3351 | } |
| 3352 | } |
| 3353 | parport_setup_ptr++; |
| 3354 | return 1; |
| 3355 | } |
| 3356 | |
| 3357 | static int __init parse_parport_params(void) |
| 3358 | { |
| 3359 | return io[0] == PARPORT_DISABLE; |
| 3360 | } |
| 3361 | |
| 3362 | __setup ("parport=", parport_setup); |
| 3363 | |
| 3364 | /* |
| 3365 | * Acceptable parameters: |
| 3366 | * |
| 3367 | * parport_init_mode=[spp|ps2|epp|ecp|ecpepp] |
| 3368 | */ |
| 3369 | #ifdef CONFIG_PCI |
| 3370 | __setup("parport_init_mode=",parport_init_mode_setup); |
| 3371 | #endif |
| 3372 | #endif |
| 3373 | |
| 3374 | /* "Parser" ends here */ |
| 3375 | |
| 3376 | static int __init parport_pc_init(void) |
| 3377 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3378 | if (parse_parport_params()) |
| 3379 | return -EINVAL; |
| 3380 | |
| 3381 | if (io[0]) { |
| 3382 | int i; |
| 3383 | /* Only probe the ports we were given. */ |
| 3384 | user_specified = 1; |
| 3385 | for (i = 0; i < PARPORT_PC_MAX_PORTS; i++) { |
| 3386 | if (!io[i]) |
| 3387 | break; |
| 3388 | if ((io_hi[i]) == PARPORT_IOHI_AUTO) |
| 3389 | io_hi[i] = 0x400 + io[i]; |
Bjorn Helgaas | 7597fee | 2006-03-27 01:17:02 -0800 | [diff] [blame] | 3390 | parport_pc_probe_port(io[i], io_hi[i], |
| 3391 | irqval[i], dmaval[i], NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3392 | } |
| 3393 | } else |
Bjorn Helgaas | 7597fee | 2006-03-27 01:17:02 -0800 | [diff] [blame] | 3394 | parport_pc_find_ports (irqval[0], dmaval[0]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3395 | |
| 3396 | return 0; |
| 3397 | } |
| 3398 | |
| 3399 | static void __exit parport_pc_exit(void) |
| 3400 | { |
| 3401 | if (pci_registered_parport) |
| 3402 | pci_unregister_driver (&parport_pc_pci_driver); |
| 3403 | if (pnp_registered_parport) |
| 3404 | pnp_unregister_driver (&parport_pc_pnp_driver); |
| 3405 | |
| 3406 | spin_lock(&ports_lock); |
| 3407 | while (!list_empty(&ports_list)) { |
| 3408 | struct parport_pc_private *priv; |
| 3409 | struct parport *port; |
| 3410 | priv = list_entry(ports_list.next, |
| 3411 | struct parport_pc_private, list); |
| 3412 | port = priv->port; |
| 3413 | spin_unlock(&ports_lock); |
| 3414 | parport_pc_unregister_port(port); |
| 3415 | spin_lock(&ports_lock); |
| 3416 | } |
| 3417 | spin_unlock(&ports_lock); |
| 3418 | } |
| 3419 | |
| 3420 | MODULE_AUTHOR("Phil Blundell, Tim Waugh, others"); |
| 3421 | MODULE_DESCRIPTION("PC-style parallel port driver"); |
| 3422 | MODULE_LICENSE("GPL"); |
| 3423 | module_init(parport_pc_init) |
| 3424 | module_exit(parport_pc_exit) |