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Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#define pr_fmt(fmt) "%s: " fmt, __func__
14
15#include <linux/err.h>
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/delay.h>
20#include <linux/slab.h>
21#include <linux/string.h>
22#include <linux/io.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/platform_device.h>
26#include <linux/regulator/driver.h>
27#include <linux/regulator/machine.h>
28#include <linux/regulator/of_regulator.h>
29#include <linux/regulator/krait-regulator.h>
30
31#include "spm.h"
32
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -070033/*
34 * supply
35 * from
36 * pmic
37 * gang
38 * | LDO BYP [6]
39 * | /
40 * | /
41 * |_______/ _____
42 * | |
43 * ___|___ |
44 * | | |
45 * | | /
46 * | LDO | /
47 * | | / BHS[6]
48 * |_______| |
49 * | |
50 * |________________|
51 * |
52 * ________|________
53 * | |
54 * | KRAIT |
55 * |_________________|
56 */
57
58#define V_RETENTION 600000
59#define V_LDO_HEADROOM 150000
60
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -070061#define PMIC_VOLTAGE_MIN 350000
62#define PMIC_VOLTAGE_MAX 1355000
63#define LV_RANGE_STEP 5000
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -070064
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -070065/* use LDO for core voltage below LDO_THRESH */
66#define CORE_VOLTAGE_LDO_THRESH 750000
67
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -070068#define LOAD_PER_PHASE 3200000
69
Michael Bohan5daee152012-08-14 16:39:35 -070070#define CORE_VOLTAGE_MIN 900000
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -070071
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -070072#define KRAIT_LDO_VOLTAGE_MIN 465000
Abhijeet Dharmapurikare8571ef2012-08-14 20:44:58 -070073#define KRAIT_LDO_VOLTAGE_OFFSET 465000
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -070074#define KRAIT_LDO_STEP 5000
75
76#define BHS_SETTLING_DELAY_US 1
77#define LDO_SETTLING_DELAY_US 1
78
79#define _KRAIT_MASK(BITS, POS) (((u32)(1 << (BITS)) - 1) << POS)
80#define KRAIT_MASK(LEFT_BIT_POS, RIGHT_BIT_POS) \
81 _KRAIT_MASK(LEFT_BIT_POS - RIGHT_BIT_POS + 1, RIGHT_BIT_POS)
82
83#define APC_SECURE 0x00000000
84#define CPU_PWR_CTL 0x00000004
85#define APC_PWR_STATUS 0x00000008
86#define APC_TEST_BUS_SEL 0x0000000C
87#define CPU_TRGTD_DBG_RST 0x00000010
88#define APC_PWR_GATE_CTL 0x00000014
89#define APC_LDO_VREF_SET 0x00000018
90
91/* bit definitions for APC_PWR_GATE_CTL */
92#define BHS_CNT_BIT_POS 24
93#define BHS_CNT_MASK KRAIT_MASK(31, 24)
94#define BHS_CNT_DEFAULT 64
95
96#define CLK_SRC_SEL_BIT_POS 15
97#define CLK_SRC_SEL_MASK KRAIT_MASK(15, 15)
98#define CLK_SRC_DEFAULT 0
99
100#define LDO_PWR_DWN_BIT_POS 16
101#define LDO_PWR_DWN_MASK KRAIT_MASK(21, 16)
102
103#define LDO_BYP_BIT_POS 8
104#define LDO_BYP_MASK KRAIT_MASK(13, 8)
105
106#define BHS_SEG_EN_BIT_POS 1
107#define BHS_SEG_EN_MASK KRAIT_MASK(6, 1)
108#define BHS_SEG_EN_DEFAULT 0x3F
109
110#define BHS_EN_BIT_POS 0
111#define BHS_EN_MASK KRAIT_MASK(0, 0)
112
113/* bit definitions for APC_LDO_VREF_SET register */
114#define VREF_RET_POS 8
115#define VREF_RET_MASK KRAIT_MASK(14, 8)
116
117#define VREF_LDO_BIT_POS 0
118#define VREF_LDO_MASK KRAIT_MASK(6, 0)
119
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700120/**
121 * struct pmic_gang_vreg -
122 * @name: the string used to represent the gang
123 * @pmic_vmax_uV: the current pmic gang voltage
124 * @pmic_phase_count: the number of phases turned on in the gang
125 * @krait_power_vregs: a list of krait consumers this gang supplies to
126 * @krait_power_vregs_lock: lock to prevent simultaneous access to the list
127 * and its nodes. This needs to be taken by each
128 * regulator's callback functions to prevent
129 * simultaneous updates to the pmic's phase
130 * voltage.
131 */
132struct pmic_gang_vreg {
133 const char *name;
134 int pmic_vmax_uV;
135 int pmic_phase_count;
136 struct list_head krait_power_vregs;
137 struct mutex krait_power_vregs_lock;
138};
139
140static struct pmic_gang_vreg *the_gang;
141
142enum krait_supply_mode {
143 HS_MODE = REGULATOR_MODE_NORMAL,
144 LDO_MODE = REGULATOR_MODE_IDLE,
145};
146
147struct krait_power_vreg {
148 struct list_head link;
149 struct regulator_desc desc;
150 struct regulator_dev *rdev;
151 const char *name;
152 struct pmic_gang_vreg *pvreg;
153 int uV;
154 int load_uA;
155 enum krait_supply_mode mode;
156 void __iomem *reg_base;
157};
158
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700159static void krait_masked_write(struct krait_power_vreg *kvreg,
160 int reg, uint32_t mask, uint32_t val)
161{
162 uint32_t reg_val;
163
164 reg_val = readl_relaxed(kvreg->reg_base + reg);
165 reg_val &= ~mask;
166 reg_val |= (val & mask);
167 writel_relaxed(reg_val, kvreg->reg_base + reg);
168
169 /*
170 * Barrier to ensure that the reads and writes from
171 * other regulator regions (they are 1k apart) execute in
172 * order to the above write.
173 */
174 mb();
175}
176
177static int get_krait_ldo_uv(struct krait_power_vreg *kvreg)
178{
179 uint32_t reg_val;
180 int uV;
181
182 reg_val = readl_relaxed(kvreg->reg_base + APC_LDO_VREF_SET);
183 reg_val &= VREF_LDO_MASK;
184 reg_val >>= VREF_LDO_BIT_POS;
185
186 if (reg_val == 0)
187 uV = 0;
188 else
189 uV = KRAIT_LDO_VOLTAGE_OFFSET + reg_val * KRAIT_LDO_STEP;
190
191 return uV;
192}
193
194static int set_krait_ldo_uv(struct krait_power_vreg *kvreg)
195{
196 uint32_t reg_val;
197
198 reg_val = kvreg->uV - KRAIT_LDO_VOLTAGE_OFFSET / KRAIT_LDO_STEP;
199 krait_masked_write(kvreg, APC_LDO_VREF_SET, VREF_LDO_MASK,
200 reg_val << VREF_LDO_BIT_POS);
201
202 return 0;
203}
204
205static int switch_to_using_hs(struct krait_power_vreg *kvreg)
206{
207 if (kvreg->mode == HS_MODE)
208 return 0;
209
210 /*
211 * enable ldo bypass - the krait is powered still by LDO since
212 * LDO is enabled and BHS is disabled
213 */
214 krait_masked_write(kvreg, APC_PWR_GATE_CTL, LDO_BYP_MASK, LDO_BYP_MASK);
215
216 /* enable bhs */
217 krait_masked_write(kvreg, APC_PWR_GATE_CTL, BHS_EN_MASK, BHS_EN_MASK);
218
219 /*
220 * wait for the bhs to settle - note that
221 * after the voltage has settled both BHS and LDO are supplying power
222 * to the krait. This avoids glitches during switching
223 */
224 udelay(BHS_SETTLING_DELAY_US);
225
226 /* disable ldo - only the BHS provides voltage to the cpu after this */
227 krait_masked_write(kvreg, APC_PWR_GATE_CTL,
228 LDO_PWR_DWN_MASK, LDO_PWR_DWN_MASK);
229
230 kvreg->mode = HS_MODE;
231 return 0;
232}
233
234static int switch_to_using_ldo(struct krait_power_vreg *kvreg)
235{
236 if (kvreg->mode == LDO_MODE && get_krait_ldo_uv(kvreg) == kvreg->uV)
237 return 0;
238
239 /*
240 * if the krait is in ldo mode and a voltage change is requested on the
241 * ldo switch to using hs before changing ldo voltage
242 */
243 if (kvreg->mode == LDO_MODE)
244 switch_to_using_hs(kvreg);
245
246 set_krait_ldo_uv(kvreg);
247
248 /*
249 * enable ldo - note that both LDO and BHS are are supplying voltage to
250 * the cpu after this. This avoids glitches during switching from BHS
251 * to LDO.
252 */
253 krait_masked_write(kvreg, APC_PWR_GATE_CTL, LDO_PWR_DWN_MASK, 0);
254
255 /* wait for the ldo to settle */
256 udelay(LDO_SETTLING_DELAY_US);
257
258 /*
259 * disable BHS and disable LDO bypass seperate from enabling
260 * the LDO above.
261 */
262 krait_masked_write(kvreg, APC_PWR_GATE_CTL,
263 BHS_EN_MASK | LDO_BYP_MASK, 0);
264
265 kvreg->mode = LDO_MODE;
266 return 0;
267}
268
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700269static int set_pmic_gang_phases(int phase_count)
270{
Abhijeet Dharmapurikare4b89ee2012-08-07 18:53:53 -0700271 /*
272 * TODO : spm writes for phase control,
273 * pmic phase control is not working yet
274 */
275 return 0;
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700276}
277
278static int set_pmic_gang_voltage(int uV)
279{
280 int setpoint;
281
282 if (uV < PMIC_VOLTAGE_MIN) {
283 pr_err("requested %d < %d, restricting it to %d\n",
284 uV, PMIC_VOLTAGE_MIN, PMIC_VOLTAGE_MIN);
285 uV = PMIC_VOLTAGE_MIN;
286 }
287 if (uV > PMIC_VOLTAGE_MAX) {
288 pr_err("requested %d > %d, restricting it to %d\n",
289 uV, PMIC_VOLTAGE_MAX, PMIC_VOLTAGE_MAX);
290 uV = PMIC_VOLTAGE_MAX;
291 }
292
Abhijeet Dharmapurikard4f38da2012-08-08 21:42:06 -0700293 setpoint = DIV_ROUND_UP(uV, LV_RANGE_STEP);
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700294 return msm_spm_apcs_set_vdd(setpoint);
295}
296
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700297static int configure_ldo_or_hs(struct krait_power_vreg *from, int vmax)
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700298{
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700299 struct pmic_gang_vreg *pvreg = from->pvreg;
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700300 struct krait_power_vreg *kvreg;
301 int rc = 0;
302
303 list_for_each_entry(kvreg, &pvreg->krait_power_vregs, link) {
304 if (kvreg->uV > CORE_VOLTAGE_LDO_THRESH
305 || kvreg->uV > vmax - V_LDO_HEADROOM) {
306 rc = switch_to_using_hs(kvreg);
307 if (rc < 0) {
308 pr_err("could not switch %s to hs rc = %d\n",
309 kvreg->name, rc);
310 return rc;
311 }
312 } else {
313 rc = switch_to_using_ldo(kvreg);
314 if (rc < 0) {
315 pr_err("could not switch %s to ldo rc = %d\n",
316 kvreg->name, rc);
317 return rc;
318 }
319 }
320 }
321
322 return rc;
323}
324
325#define SLEW_RATE 2994
326static int pmic_gang_set_voltage_increase(struct krait_power_vreg *from,
327 int vmax)
328{
329 struct pmic_gang_vreg *pvreg = from->pvreg;
330 int rc = 0;
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700331 int settling_us;
332
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700333 /*
334 * since pmic gang voltage is increasing set the gang voltage
335 * prior to changing ldo/hs states of the requesting krait
336 */
337 rc = set_pmic_gang_voltage(vmax);
338 if (rc < 0) {
339 dev_err(&from->rdev->dev, "%s failed set voltage %d rc = %d\n",
340 pvreg->name, vmax, rc);
341 }
342
343 /* delay until the voltage is settled when it is raised */
344 settling_us = DIV_ROUND_UP(vmax - pvreg->pmic_vmax_uV, SLEW_RATE);
345 udelay(settling_us);
346
347 rc = configure_ldo_or_hs(from, vmax);
348 if (rc < 0) {
349 dev_err(&from->rdev->dev, "%s failed ldo/hs conf %d rc = %d\n",
350 pvreg->name, vmax, rc);
351 }
352
353 return rc;
354}
355
356static int pmic_gang_set_voltage_decrease(struct krait_power_vreg *from,
357 int vmax)
358{
359 struct pmic_gang_vreg *pvreg = from->pvreg;
360 int rc = 0;
361
362 /*
363 * since pmic gang voltage is decreasing ldos might get out of their
364 * operating range. Hence configure such kraits to be in hs mode prior
365 * to setting the pmic gang voltage
366 */
367 rc = configure_ldo_or_hs(from, vmax);
368 if (rc < 0) {
369 dev_err(&from->rdev->dev, "%s failed ldo/hs conf %d rc = %d\n",
370 pvreg->name, vmax, rc);
371 return rc;
372 }
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700373
374 rc = set_pmic_gang_voltage(vmax);
375 if (rc < 0) {
376 dev_err(&from->rdev->dev, "%s failed set voltage %d rc = %d\n",
377 pvreg->name, vmax, rc);
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700378 }
379
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700380 return rc;
381}
382
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700383static int pmic_gang_set_voltage(struct krait_power_vreg *from,
384 int vmax)
385{
386 struct pmic_gang_vreg *pvreg = from->pvreg;
387
388 if (pvreg->pmic_vmax_uV == vmax)
389 return 0;
390 else if (vmax < pvreg->pmic_vmax_uV)
391 return pmic_gang_set_voltage_decrease(from, vmax);
392
393 return pmic_gang_set_voltage_increase(from, vmax);
394}
395
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700396#define PHASE_SETTLING_TIME_US 10
397static unsigned int pmic_gang_set_phases(struct krait_power_vreg *from,
398 int load_uA)
399{
400 struct pmic_gang_vreg *pvreg = from->pvreg;
401 int phase_count = DIV_ROUND_UP(load_uA, LOAD_PER_PHASE) - 1;
402 int rc = 0;
403
404 if (phase_count < 0)
405 phase_count = 0;
406
407 if (phase_count != pvreg->pmic_phase_count) {
408 rc = set_pmic_gang_phases(phase_count);
409 if (rc < 0) {
410 dev_err(&from->rdev->dev,
411 "%s failed set phase %d rc = %d\n",
412 pvreg->name, phase_count, rc);
413 return rc;
414 }
415
416 /*
417 * delay until the phases are settled when
418 * the count is raised
419 */
420 if (phase_count > pvreg->pmic_phase_count)
421 udelay(PHASE_SETTLING_TIME_US);
422
423 pvreg->pmic_phase_count = phase_count;
424 }
425 return rc;
426}
427
428static int __init pvreg_init(struct platform_device *pdev)
429{
430 struct pmic_gang_vreg *pvreg;
431
432 pvreg = devm_kzalloc(&pdev->dev,
433 sizeof(struct pmic_gang_vreg), GFP_KERNEL);
434 if (!pvreg) {
435 pr_err("kzalloc failed.\n");
436 return -ENOMEM;
437 }
438
439 pvreg->name = "pmic_gang";
440 pvreg->pmic_vmax_uV = PMIC_VOLTAGE_MIN;
441 pvreg->pmic_phase_count = 1;
442
443 mutex_init(&pvreg->krait_power_vregs_lock);
444 INIT_LIST_HEAD(&pvreg->krait_power_vregs);
445 the_gang = pvreg;
446
447 pr_debug("name=%s inited\n", pvreg->name);
448
449 return 0;
450}
451
452static int krait_power_get_voltage(struct regulator_dev *rdev)
453{
454 struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
455
456 return kvreg->uV;
457}
458
459static int get_vmax(struct krait_power_vreg *from, int min_uV)
460{
461 int vmax = 0;
462 int v;
463 struct krait_power_vreg *kvreg;
464 struct pmic_gang_vreg *pvreg = from->pvreg;
465
466 list_for_each_entry(kvreg, &pvreg->krait_power_vregs, link) {
467 v = kvreg->uV;
468
469 if (kvreg == from)
470 v = min_uV;
471
472 if (vmax < v)
473 vmax = v;
474 }
475 return vmax;
476}
477
478static int get_total_load(struct krait_power_vreg *from)
479{
480 int load_total = 0;
481 struct krait_power_vreg *kvreg;
482 struct pmic_gang_vreg *pvreg = from->pvreg;
483
484 list_for_each_entry(kvreg, &pvreg->krait_power_vregs, link)
485 load_total += kvreg->load_uA;
486
487 return load_total;
488}
489
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700490#define ROUND_UP_VOLTAGE(v, res) (DIV_ROUND_UP(v, res) * res)
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700491static int krait_power_set_voltage(struct regulator_dev *rdev,
492 int min_uV, int max_uV, unsigned *selector)
493{
494 struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
495 struct pmic_gang_vreg *pvreg = kvreg->pvreg;
496 int rc;
497 int vmax;
498
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700499 /*
500 * if the voltage requested is below LDO_THRESHOLD this cpu could
501 * switch to LDO mode. Hence round the voltage as per the LDO
502 * resolution
503 */
504 if (min_uV < CORE_VOLTAGE_LDO_THRESH) {
505 if (min_uV < KRAIT_LDO_VOLTAGE_MIN)
506 min_uV = KRAIT_LDO_VOLTAGE_MIN;
507 min_uV = ROUND_UP_VOLTAGE(min_uV, KRAIT_LDO_STEP);
508 }
509
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700510 mutex_lock(&pvreg->krait_power_vregs_lock);
511
512 vmax = get_vmax(kvreg, min_uV);
513
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700514 /* round up the pmic voltage as per its resolution */
515 vmax = ROUND_UP_VOLTAGE(vmax, LV_RANGE_STEP);
516
517 /*
518 * Assign the voltage before updating the gang voltage as we iterate
519 * over all the core voltages and choose HS or LDO for each of them
520 */
521 kvreg->uV = min_uV;
522
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700523 rc = pmic_gang_set_voltage(kvreg, vmax);
524 if (rc < 0) {
525 dev_err(&rdev->dev, "%s failed set voltage (%d, %d) rc = %d\n",
526 kvreg->name, min_uV, max_uV, rc);
527 goto out;
528 }
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700529
530 pvreg->pmic_vmax_uV = vmax;
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700531
532out:
533 mutex_unlock(&pvreg->krait_power_vregs_lock);
534 return rc;
535}
536
537static unsigned int krait_power_get_optimum_mode(struct regulator_dev *rdev,
538 int input_uV, int output_uV, int load_uA)
539{
540 struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
541 struct pmic_gang_vreg *pvreg = kvreg->pvreg;
542 int rc;
543 int load_total_uA;
544 int reg_mode = -EINVAL;
545
546 mutex_lock(&pvreg->krait_power_vregs_lock);
547
548 kvreg->load_uA = load_uA;
549
550 load_total_uA = get_total_load(kvreg);
551
552 rc = pmic_gang_set_phases(kvreg, load_total_uA);
553 if (rc < 0) {
554 dev_err(&rdev->dev, "%s failed set mode %d rc = %d\n",
555 kvreg->name, load_total_uA, rc);
556 goto out;
557 }
558
559 reg_mode = kvreg->mode;
560out:
561 mutex_unlock(&pvreg->krait_power_vregs_lock);
562 return reg_mode;
563}
564
565static int krait_power_set_mode(struct regulator_dev *rdev, unsigned int mode)
566{
567 return 0;
568}
569
570static unsigned int krait_power_get_mode(struct regulator_dev *rdev)
571{
572 struct krait_power_vreg *kvreg = rdev_get_drvdata(rdev);
573
574 return kvreg->mode;
575}
576
577static struct regulator_ops krait_power_ops = {
578 .get_voltage = krait_power_get_voltage,
579 .set_voltage = krait_power_set_voltage,
580 .get_optimum_mode = krait_power_get_optimum_mode,
581 .set_mode = krait_power_set_mode,
582 .get_mode = krait_power_get_mode,
583};
584
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700585static void kvreg_hw_init(struct krait_power_vreg *kvreg)
586{
587 /*
588 * bhs_cnt value sets the ramp-up time from power collapse,
589 * initialize the ramp up time
590 */
591 krait_masked_write(kvreg, APC_PWR_GATE_CTL,
592 BHS_CNT_MASK, BHS_CNT_DEFAULT << BHS_CNT_BIT_POS);
593
594 krait_masked_write(kvreg, APC_PWR_GATE_CTL,
595 CLK_SRC_SEL_MASK, CLK_SRC_DEFAULT << CLK_SRC_SEL_BIT_POS);
596
597 /* BHS has six different segments, turn them all on */
598 krait_masked_write(kvreg, APC_PWR_GATE_CTL,
599 BHS_SEG_EN_MASK, BHS_SEG_EN_DEFAULT << BHS_SEG_EN_BIT_POS);
600}
601
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700602static int __devinit krait_power_probe(struct platform_device *pdev)
603{
604 struct krait_power_vreg *kvreg;
605 struct resource *res;
606 struct regulator_init_data *init_data = pdev->dev.platform_data;
607 int rc = 0;
608
609 /* Initialize the pmic gang if it hasn't been initialized already */
610 if (the_gang == NULL) {
611 rc = pvreg_init(pdev);
612 if (rc < 0) {
613 dev_err(&pdev->dev,
614 "failed to init pmic gang rc = %d\n", rc);
615 return rc;
616 }
617 }
618
619 if (pdev->dev.of_node) {
620 /* Get init_data from device tree. */
621 init_data = of_get_regulator_init_data(&pdev->dev,
622 pdev->dev.of_node);
623 init_data->constraints.valid_ops_mask
624 |= REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_DRMS
625 | REGULATOR_CHANGE_MODE;
626 init_data->constraints.valid_modes_mask
627 |= REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE
628 | REGULATOR_MODE_FAST;
629 init_data->constraints.input_uV = init_data->constraints.max_uV;
630 }
631
632 if (!init_data) {
633 dev_err(&pdev->dev, "init data required.\n");
634 return -EINVAL;
635 }
636
637 if (!init_data->constraints.name) {
638 dev_err(&pdev->dev,
639 "regulator name must be specified in constraints.\n");
640 return -EINVAL;
641 }
642
643 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
644 if (!res) {
645 dev_err(&pdev->dev, "missing physical register addresses\n");
646 return -EINVAL;
647 }
648
649 kvreg = devm_kzalloc(&pdev->dev,
650 sizeof(struct krait_power_vreg), GFP_KERNEL);
651 if (!kvreg) {
652 dev_err(&pdev->dev, "kzalloc failed.\n");
653 return -ENOMEM;
654 }
655
656 kvreg->reg_base = devm_ioremap(&pdev->dev,
657 res->start, resource_size(res));
658
659 kvreg->pvreg = the_gang;
660 kvreg->name = init_data->constraints.name;
661 kvreg->desc.name = kvreg->name;
662 kvreg->desc.ops = &krait_power_ops;
663 kvreg->desc.type = REGULATOR_VOLTAGE;
664 kvreg->desc.owner = THIS_MODULE;
665 kvreg->uV = CORE_VOLTAGE_MIN;
666 kvreg->mode = HS_MODE;
667 kvreg->desc.ops = &krait_power_ops;
668
669 platform_set_drvdata(pdev, kvreg);
670
671 mutex_lock(&the_gang->krait_power_vregs_lock);
672 list_add_tail(&kvreg->link, &the_gang->krait_power_vregs);
673 mutex_unlock(&the_gang->krait_power_vregs_lock);
674
675 kvreg->rdev = regulator_register(&kvreg->desc, &pdev->dev, init_data,
676 kvreg, pdev->dev.of_node);
677 if (IS_ERR(kvreg->rdev)) {
678 rc = PTR_ERR(kvreg->rdev);
679 pr_err("regulator_register failed, rc=%d.\n", rc);
680 goto out;
681 }
682
Abhijeet Dharmapurikar152a7082012-05-14 20:25:59 -0700683 kvreg_hw_init(kvreg);
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700684 dev_dbg(&pdev->dev, "id=%d, name=%s\n", pdev->id, kvreg->name);
685
686 return 0;
687out:
688 mutex_lock(&the_gang->krait_power_vregs_lock);
689 list_del(&kvreg->link);
690 mutex_unlock(&the_gang->krait_power_vregs_lock);
691
692 platform_set_drvdata(pdev, NULL);
693 return rc;
694}
695
696static int __devexit krait_power_remove(struct platform_device *pdev)
697{
698 struct krait_power_vreg *kvreg = platform_get_drvdata(pdev);
699 struct pmic_gang_vreg *pvreg = kvreg->pvreg;
700
701 mutex_lock(&pvreg->krait_power_vregs_lock);
702 list_del(&kvreg->link);
703 mutex_unlock(&pvreg->krait_power_vregs_lock);
704
705 regulator_unregister(kvreg->rdev);
706 platform_set_drvdata(pdev, NULL);
707 return 0;
708}
709
710static struct of_device_id krait_power_match_table[] = {
711 { .compatible = "qcom,krait-regulator", },
712 {}
713};
714
715static struct platform_driver krait_power_driver = {
716 .probe = krait_power_probe,
717 .remove = __devexit_p(krait_power_remove),
718 .driver = {
719 .name = KRAIT_REGULATOR_DRIVER_NAME,
720 .of_match_table = krait_power_match_table,
721 .owner = THIS_MODULE,
722 },
723};
724
725int __init krait_power_init(void)
726{
727 return platform_driver_register(&krait_power_driver);
728}
729
730static void __exit krait_power_exit(void)
731{
732 platform_driver_unregister(&krait_power_driver);
733}
734
735module_exit(krait_power_exit);
736
Abhijeet Dharmapurikare8571ef2012-08-14 20:44:58 -0700737void secondary_cpu_hs_init(void *base_ptr)
738{
739 /* 605mV retention and 705mV operational voltage */
740 writel_relaxed(0x1C30, base_ptr + APC_LDO_VREF_SET);
741 writel_relaxed(0x430000, base_ptr + 0x20);
742 writel_relaxed(0x21, base_ptr + 0x1C);
743
744 /* Turn on the BHS, turn off LDO Bypass and power down LDO */
745 writel_relaxed(0x403F007F, base_ptr + APC_PWR_GATE_CTL);
746 mb();
747 udelay(1);
748
749 /* Finally turn on the bypass so that BHS supplies power */
750 writel_relaxed(0x403F3F7F, base_ptr + APC_PWR_GATE_CTL);
751}
752
Abhijeet Dharmapurikar00269e52012-05-14 17:59:10 -0700753MODULE_LICENSE("GPL v2");
754MODULE_DESCRIPTION("KRAIT POWER regulator driver");
755MODULE_VERSION("1.0");
756MODULE_ALIAS("platform:"KRAIT_REGULATOR_DRIVER_NAME);