blob: 5fb8675e0d6b9278a3c31b9ec732cd3c918578db [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/video/cyber2000fb.c
3 *
4 * Copyright (C) 1998-2002 Russell King
5 *
6 * MIPS and 50xx clock support
7 * Copyright (C) 2001 Bradley D. LaRonde <brad@ltc.com>
8 *
9 * 32 bit support, text color and panning fixes for modes != 8 bit
10 * Copyright (C) 2002 Denis Oliver Kropp <dok@directfb.org>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * Integraphics CyberPro 2000, 2010 and 5000 frame buffer device
17 *
18 * Based on cyberfb.c.
19 *
20 * Note that we now use the new fbcon fix, var and cmap scheme. We do
21 * still have to check which console is the currently displayed one
22 * however, especially for the colourmap stuff.
23 *
24 * We also use the new hotplug PCI subsystem. I'm not sure if there
25 * are any such cards, but I'm erring on the side of caution. We don't
26 * want to go pop just because someone does have one.
27 *
28 * Note that this doesn't work fully in the case of multiple CyberPro
29 * cards with grabbers. We currently can only attach to the first
30 * CyberPro card found.
31 *
32 * When we're in truecolour mode, we power down the LUT RAM as a power
33 * saving feature. Also, when we enter any of the powersaving modes
34 * (except soft blanking) we power down the RAMDACs. This saves about
35 * 1W, which is roughly 8% of the power consumption of a NetWinder
36 * (which, incidentally, is about the same saving as a 2.5in hard disk
37 * entering standby mode.)
38 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <linux/module.h>
40#include <linux/kernel.h>
41#include <linux/errno.h>
42#include <linux/string.h>
43#include <linux/mm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070044#include <linux/slab.h>
45#include <linux/delay.h>
46#include <linux/fb.h>
47#include <linux/pci.h>
48#include <linux/init.h>
49
50#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <asm/pgtable.h>
52#include <asm/system.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053
54#ifdef __arm__
55#include <asm/mach-types.h>
56#endif
57
58#include "cyber2000fb.h"
59
60struct cfb_info {
61 struct fb_info fb;
62 struct display_switch *dispsw;
63 struct display *display;
64 struct pci_dev *dev;
Krzysztof Helt532237e2007-10-18 23:40:28 -070065 unsigned char __iomem *region;
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 unsigned char __iomem *regs;
67 u_int id;
68 int func_use_count;
69 u_long ref_ps;
70
71 /*
72 * Clock divisors
73 */
74 u_int divisors[4];
75
76 struct {
77 u8 red, green, blue;
78 } palette[NR_PALETTE];
79
80 u_char mem_ctl1;
81 u_char mem_ctl2;
82 u_char mclk_mult;
83 u_char mclk_div;
84 /*
85 * RAMDAC control register is both of these or'ed together
86 */
87 u_char ramdac_ctrl;
88 u_char ramdac_powerdown;
Russell Kingeca02b02005-05-03 12:23:56 +010089
90 u32 pseudo_palette[16];
Linus Torvalds1da177e2005-04-16 15:20:36 -070091};
92
93static char *default_font = "Acorn8x8";
94module_param(default_font, charp, 0);
95MODULE_PARM_DESC(default_font, "Default font name");
96
97/*
98 * Our access methods.
99 */
Krzysztof Helt532237e2007-10-18 23:40:28 -0700100#define cyber2000fb_writel(val, reg, cfb) writel(val, (cfb)->regs + (reg))
101#define cyber2000fb_writew(val, reg, cfb) writew(val, (cfb)->regs + (reg))
102#define cyber2000fb_writeb(val, reg, cfb) writeb(val, (cfb)->regs + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103
Krzysztof Helt532237e2007-10-18 23:40:28 -0700104#define cyber2000fb_readb(reg, cfb) readb((cfb)->regs + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
106static inline void
107cyber2000_crtcw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
108{
109 cyber2000fb_writew((reg & 255) | val << 8, 0x3d4, cfb);
110}
111
112static inline void
113cyber2000_grphw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
114{
115 cyber2000fb_writew((reg & 255) | val << 8, 0x3ce, cfb);
116}
117
118static inline unsigned int
119cyber2000_grphr(unsigned int reg, struct cfb_info *cfb)
120{
121 cyber2000fb_writeb(reg, 0x3ce, cfb);
122 return cyber2000fb_readb(0x3cf, cfb);
123}
124
125static inline void
126cyber2000_attrw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
127{
128 cyber2000fb_readb(0x3da, cfb);
129 cyber2000fb_writeb(reg, 0x3c0, cfb);
130 cyber2000fb_readb(0x3c1, cfb);
131 cyber2000fb_writeb(val, 0x3c0, cfb);
132}
133
134static inline void
135cyber2000_seqw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
136{
137 cyber2000fb_writew((reg & 255) | val << 8, 0x3c4, cfb);
138}
139
140/* -------------------- Hardware specific routines ------------------------- */
141
142/*
143 * Hardware Cyber2000 Acceleration
144 */
145static void
146cyber2000fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
147{
148 struct cfb_info *cfb = (struct cfb_info *)info;
149 unsigned long dst, col;
150
151 if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
152 cfb_fillrect(info, rect);
153 return;
154 }
155
156 cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
157 cyber2000fb_writew(rect->width - 1, CO_REG_PIXWIDTH, cfb);
158 cyber2000fb_writew(rect->height - 1, CO_REG_PIXHEIGHT, cfb);
159
160 col = rect->color;
161 if (cfb->fb.var.bits_per_pixel > 8)
162 col = ((u32 *)cfb->fb.pseudo_palette)[col];
163 cyber2000fb_writel(col, CO_REG_FGCOLOUR, cfb);
164
165 dst = rect->dx + rect->dy * cfb->fb.var.xres_virtual;
166 if (cfb->fb.var.bits_per_pixel == 24) {
167 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
168 dst *= 3;
169 }
170
171 cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
172 cyber2000fb_writeb(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
173 cyber2000fb_writew(CO_CMD_L_PATTERN_FGCOL, CO_REG_CMD_L, cfb);
174 cyber2000fb_writew(CO_CMD_H_BLITTER, CO_REG_CMD_H, cfb);
175}
176
177static void
178cyber2000fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
179{
180 struct cfb_info *cfb = (struct cfb_info *)info;
181 unsigned int cmd = CO_CMD_L_PATTERN_FGCOL;
182 unsigned long src, dst;
183
184 if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
185 cfb_copyarea(info, region);
186 return;
187 }
188
189 cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
190 cyber2000fb_writew(region->width - 1, CO_REG_PIXWIDTH, cfb);
191 cyber2000fb_writew(region->height - 1, CO_REG_PIXHEIGHT, cfb);
192
193 src = region->sx + region->sy * cfb->fb.var.xres_virtual;
194 dst = region->dx + region->dy * cfb->fb.var.xres_virtual;
195
196 if (region->sx < region->dx) {
197 src += region->width - 1;
198 dst += region->width - 1;
199 cmd |= CO_CMD_L_INC_LEFT;
200 }
201
202 if (region->sy < region->dy) {
203 src += (region->height - 1) * cfb->fb.var.xres_virtual;
204 dst += (region->height - 1) * cfb->fb.var.xres_virtual;
205 cmd |= CO_CMD_L_INC_UP;
206 }
207
208 if (cfb->fb.var.bits_per_pixel == 24) {
209 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
210 src *= 3;
211 dst *= 3;
212 }
213 cyber2000fb_writel(src, CO_REG_SRC1_PTR, cfb);
214 cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
215 cyber2000fb_writew(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
216 cyber2000fb_writew(cmd, CO_REG_CMD_L, cfb);
217 cyber2000fb_writew(CO_CMD_H_FGSRCMAP | CO_CMD_H_BLITTER,
218 CO_REG_CMD_H, cfb);
219}
220
221static void
222cyber2000fb_imageblit(struct fb_info *info, const struct fb_image *image)
223{
Krzysztof Helt532237e2007-10-18 23:40:28 -0700224 cfb_imageblit(info, image);
225 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226}
227
228static int cyber2000fb_sync(struct fb_info *info)
229{
230 struct cfb_info *cfb = (struct cfb_info *)info;
231 int count = 100000;
232
233 if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT))
234 return 0;
235
236 while (cyber2000fb_readb(CO_REG_CONTROL, cfb) & CO_CTRL_BUSY) {
237 if (!count--) {
238 debug_printf("accel_wait timed out\n");
239 cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
240 break;
241 }
242 udelay(1);
243 }
244 return 0;
245}
246
247/*
248 * ===========================================================================
249 */
250
251static inline u32 convert_bitfield(u_int val, struct fb_bitfield *bf)
252{
253 u_int mask = (1 << bf->length) - 1;
254
255 return (val >> (16 - bf->length) & mask) << bf->offset;
256}
257
258/*
259 * Set a single color register. Return != 0 for invalid regno.
260 */
261static int
262cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
263 u_int transp, struct fb_info *info)
264{
265 struct cfb_info *cfb = (struct cfb_info *)info;
266 struct fb_var_screeninfo *var = &cfb->fb.var;
267 u32 pseudo_val;
268 int ret = 1;
269
270 switch (cfb->fb.fix.visual) {
271 default:
272 return 1;
273
274 /*
275 * Pseudocolour:
Krzysztof Helt532237e2007-10-18 23:40:28 -0700276 * 8 8
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277 * pixel --/--+--/--> red lut --> red dac
Krzysztof Helt532237e2007-10-18 23:40:28 -0700278 * | 8
279 * +--/--> green lut --> green dac
280 * | 8
281 * +--/--> blue lut --> blue dac
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282 */
283 case FB_VISUAL_PSEUDOCOLOR:
284 if (regno >= NR_PALETTE)
285 return 1;
286
287 red >>= 8;
288 green >>= 8;
289 blue >>= 8;
290
Krzysztof Helt532237e2007-10-18 23:40:28 -0700291 cfb->palette[regno].red = red;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 cfb->palette[regno].green = green;
Krzysztof Helt532237e2007-10-18 23:40:28 -0700293 cfb->palette[regno].blue = blue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294
295 cyber2000fb_writeb(regno, 0x3c8, cfb);
296 cyber2000fb_writeb(red, 0x3c9, cfb);
297 cyber2000fb_writeb(green, 0x3c9, cfb);
298 cyber2000fb_writeb(blue, 0x3c9, cfb);
299 return 0;
300
301 /*
302 * Direct colour:
Krzysztof Helt532237e2007-10-18 23:40:28 -0700303 * n rl
304 * pixel --/--+--/--> red lut --> red dac
305 * | gl
306 * +--/--> green lut --> green dac
307 * | bl
308 * +--/--> blue lut --> blue dac
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309 * n = bpp, rl = red length, gl = green length, bl = blue length
310 */
311 case FB_VISUAL_DIRECTCOLOR:
312 red >>= 8;
313 green >>= 8;
314 blue >>= 8;
315
316 if (var->green.length == 6 && regno < 64) {
317 cfb->palette[regno << 2].green = green;
318
319 /*
320 * The 6 bits of the green component are applied
321 * to the high 6 bits of the LUT.
322 */
323 cyber2000fb_writeb(regno << 2, 0x3c8, cfb);
Krzysztof Helt532237e2007-10-18 23:40:28 -0700324 cyber2000fb_writeb(cfb->palette[regno >> 1].red,
325 0x3c9, cfb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326 cyber2000fb_writeb(green, 0x3c9, cfb);
Krzysztof Helt532237e2007-10-18 23:40:28 -0700327 cyber2000fb_writeb(cfb->palette[regno >> 1].blue,
328 0x3c9, cfb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329
330 green = cfb->palette[regno << 3].green;
331
332 ret = 0;
333 }
334
335 if (var->green.length >= 5 && regno < 32) {
Krzysztof Helt532237e2007-10-18 23:40:28 -0700336 cfb->palette[regno << 3].red = red;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 cfb->palette[regno << 3].green = green;
Krzysztof Helt532237e2007-10-18 23:40:28 -0700338 cfb->palette[regno << 3].blue = blue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339
340 /*
341 * The 5 bits of each colour component are
342 * applied to the high 5 bits of the LUT.
343 */
344 cyber2000fb_writeb(regno << 3, 0x3c8, cfb);
345 cyber2000fb_writeb(red, 0x3c9, cfb);
346 cyber2000fb_writeb(green, 0x3c9, cfb);
347 cyber2000fb_writeb(blue, 0x3c9, cfb);
348 ret = 0;
349 }
350
351 if (var->green.length == 4 && regno < 16) {
Krzysztof Helt532237e2007-10-18 23:40:28 -0700352 cfb->palette[regno << 4].red = red;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353 cfb->palette[regno << 4].green = green;
Krzysztof Helt532237e2007-10-18 23:40:28 -0700354 cfb->palette[regno << 4].blue = blue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355
356 /*
357 * The 5 bits of each colour component are
358 * applied to the high 5 bits of the LUT.
359 */
360 cyber2000fb_writeb(regno << 4, 0x3c8, cfb);
361 cyber2000fb_writeb(red, 0x3c9, cfb);
362 cyber2000fb_writeb(green, 0x3c9, cfb);
363 cyber2000fb_writeb(blue, 0x3c9, cfb);
364 ret = 0;
365 }
366
367 /*
368 * Since this is only used for the first 16 colours, we
369 * don't have to care about overflowing for regno >= 32
370 */
371 pseudo_val = regno << var->red.offset |
372 regno << var->green.offset |
373 regno << var->blue.offset;
374 break;
375
376 /*
377 * True colour:
Krzysztof Helt532237e2007-10-18 23:40:28 -0700378 * n rl
379 * pixel --/--+--/--> red dac
380 * | gl
381 * +--/--> green dac
382 * | bl
383 * +--/--> blue dac
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384 * n = bpp, rl = red length, gl = green length, bl = blue length
385 */
386 case FB_VISUAL_TRUECOLOR:
387 pseudo_val = convert_bitfield(transp ^ 0xffff, &var->transp);
388 pseudo_val |= convert_bitfield(red, &var->red);
389 pseudo_val |= convert_bitfield(green, &var->green);
390 pseudo_val |= convert_bitfield(blue, &var->blue);
391 break;
392 }
393
394 /*
395 * Now set our pseudo palette for the CFB16/24/32 drivers.
396 */
397 if (regno < 16)
398 ((u32 *)cfb->fb.pseudo_palette)[regno] = pseudo_val;
399
400 return ret;
401}
402
403struct par_info {
404 /*
405 * Hardware
406 */
407 u_char clock_mult;
408 u_char clock_div;
409 u_char extseqmisc;
410 u_char co_pixfmt;
411 u_char crtc_ofl;
412 u_char crtc[19];
413 u_int width;
414 u_int pitch;
415 u_int fetch;
416
417 /*
418 * Other
419 */
420 u_char ramdac;
421};
422
423static const u_char crtc_idx[] = {
424 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
425 0x08, 0x09,
426 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
427};
428
429static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
430{
431 unsigned int i;
432 unsigned int val = cfb->ramdac_ctrl | cfb->ramdac_powerdown;
433
434 cyber2000fb_writeb(0x56, 0x3ce, cfb);
435 i = cyber2000fb_readb(0x3cf, cfb);
436 cyber2000fb_writeb(i | 4, 0x3cf, cfb);
437 cyber2000fb_writeb(val, 0x3c6, cfb);
438 cyber2000fb_writeb(i, 0x3cf, cfb);
439}
440
441static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
442{
443 u_int i;
444
445 /*
446 * Blank palette
447 */
448 for (i = 0; i < NR_PALETTE; i++) {
449 cyber2000fb_writeb(i, 0x3c8, cfb);
450 cyber2000fb_writeb(0, 0x3c9, cfb);
451 cyber2000fb_writeb(0, 0x3c9, cfb);
452 cyber2000fb_writeb(0, 0x3c9, cfb);
453 }
454
455 cyber2000fb_writeb(0xef, 0x3c2, cfb);
456 cyber2000_crtcw(0x11, 0x0b, cfb);
457 cyber2000_attrw(0x11, 0x00, cfb);
458
459 cyber2000_seqw(0x00, 0x01, cfb);
460 cyber2000_seqw(0x01, 0x01, cfb);
461 cyber2000_seqw(0x02, 0x0f, cfb);
462 cyber2000_seqw(0x03, 0x00, cfb);
463 cyber2000_seqw(0x04, 0x0e, cfb);
464 cyber2000_seqw(0x00, 0x03, cfb);
465
466 for (i = 0; i < sizeof(crtc_idx); i++)
467 cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb);
468
469 for (i = 0x0a; i < 0x10; i++)
470 cyber2000_crtcw(i, 0, cfb);
471
472 cyber2000_grphw(EXT_CRT_VRTOFL, hw->crtc_ofl, cfb);
473 cyber2000_grphw(0x00, 0x00, cfb);
474 cyber2000_grphw(0x01, 0x00, cfb);
475 cyber2000_grphw(0x02, 0x00, cfb);
476 cyber2000_grphw(0x03, 0x00, cfb);
477 cyber2000_grphw(0x04, 0x00, cfb);
478 cyber2000_grphw(0x05, 0x60, cfb);
479 cyber2000_grphw(0x06, 0x05, cfb);
480 cyber2000_grphw(0x07, 0x0f, cfb);
481 cyber2000_grphw(0x08, 0xff, cfb);
482
483 /* Attribute controller registers */
484 for (i = 0; i < 16; i++)
485 cyber2000_attrw(i, i, cfb);
486
487 cyber2000_attrw(0x10, 0x01, cfb);
488 cyber2000_attrw(0x11, 0x00, cfb);
489 cyber2000_attrw(0x12, 0x0f, cfb);
490 cyber2000_attrw(0x13, 0x00, cfb);
491 cyber2000_attrw(0x14, 0x00, cfb);
492
493 /* PLL registers */
494 cyber2000_grphw(EXT_DCLK_MULT, hw->clock_mult, cfb);
Krzysztof Helt532237e2007-10-18 23:40:28 -0700495 cyber2000_grphw(EXT_DCLK_DIV, hw->clock_div, cfb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496 cyber2000_grphw(EXT_MCLK_MULT, cfb->mclk_mult, cfb);
Krzysztof Helt532237e2007-10-18 23:40:28 -0700497 cyber2000_grphw(EXT_MCLK_DIV, cfb->mclk_div, cfb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498 cyber2000_grphw(0x90, 0x01, cfb);
499 cyber2000_grphw(0xb9, 0x80, cfb);
500 cyber2000_grphw(0xb9, 0x00, cfb);
501
502 cfb->ramdac_ctrl = hw->ramdac;
503 cyber2000fb_write_ramdac_ctrl(cfb);
504
505 cyber2000fb_writeb(0x20, 0x3c0, cfb);
506 cyber2000fb_writeb(0xff, 0x3c6, cfb);
507
508 cyber2000_grphw(0x14, hw->fetch, cfb);
509 cyber2000_grphw(0x15, ((hw->fetch >> 8) & 0x03) |
510 ((hw->pitch >> 4) & 0x30), cfb);
511 cyber2000_grphw(EXT_SEQ_MISC, hw->extseqmisc, cfb);
512
513 /*
514 * Set up accelerator registers
515 */
Krzysztof Helt532237e2007-10-18 23:40:28 -0700516 cyber2000fb_writew(hw->width, CO_REG_SRC_WIDTH, cfb);
517 cyber2000fb_writew(hw->width, CO_REG_DEST_WIDTH, cfb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518 cyber2000fb_writeb(hw->co_pixfmt, CO_REG_PIXFMT, cfb);
519}
520
521static inline int
522cyber2000fb_update_start(struct cfb_info *cfb, struct fb_var_screeninfo *var)
523{
524 u_int base = var->yoffset * var->xres_virtual + var->xoffset;
525
526 base *= var->bits_per_pixel;
527
528 /*
529 * Convert to bytes and shift two extra bits because DAC
530 * can only start on 4 byte aligned data.
531 */
532 base >>= 5;
533
534 if (base >= 1 << 20)
535 return -EINVAL;
536
537 cyber2000_grphw(0x10, base >> 16 | 0x10, cfb);
538 cyber2000_crtcw(0x0c, base >> 8, cfb);
539 cyber2000_crtcw(0x0d, base, cfb);
540
541 return 0;
542}
543
544static int
545cyber2000fb_decode_crtc(struct par_info *hw, struct cfb_info *cfb,
546 struct fb_var_screeninfo *var)
547{
548 u_int Htotal, Hblankend, Hsyncend;
549 u_int Vtotal, Vdispend, Vblankstart, Vblankend, Vsyncstart, Vsyncend;
Krzysztof Helt532237e2007-10-18 23:40:28 -0700550#define ENCODE_BIT(v, b1, m, b2) ((((v) >> (b1)) & (m)) << (b2))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551
552 hw->crtc[13] = hw->pitch;
553 hw->crtc[17] = 0xe3;
554 hw->crtc[14] = 0;
555 hw->crtc[8] = 0;
556
Krzysztof Helt532237e2007-10-18 23:40:28 -0700557 Htotal = var->xres + var->right_margin +
558 var->hsync_len + var->left_margin;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559
560 if (Htotal > 2080)
561 return -EINVAL;
562
563 hw->crtc[0] = (Htotal >> 3) - 5;
564 hw->crtc[1] = (var->xres >> 3) - 1;
565 hw->crtc[2] = var->xres >> 3;
566 hw->crtc[4] = (var->xres + var->right_margin) >> 3;
567
Krzysztof Helt532237e2007-10-18 23:40:28 -0700568 Hblankend = (Htotal - 4 * 8) >> 3;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569
Jiri Slaby87d06132007-10-18 23:40:27 -0700570 hw->crtc[3] = ENCODE_BIT(Hblankend, 0, 0x1f, 0) |
571 ENCODE_BIT(1, 0, 0x01, 7);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572
573 Hsyncend = (var->xres + var->right_margin + var->hsync_len) >> 3;
574
Jiri Slaby87d06132007-10-18 23:40:27 -0700575 hw->crtc[5] = ENCODE_BIT(Hsyncend, 0, 0x1f, 0) |
576 ENCODE_BIT(Hblankend, 5, 0x01, 7);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577
578 Vdispend = var->yres - 1;
579 Vsyncstart = var->yres + var->lower_margin;
580 Vsyncend = var->yres + var->lower_margin + var->vsync_len;
581 Vtotal = var->yres + var->lower_margin + var->vsync_len +
582 var->upper_margin - 2;
583
584 if (Vtotal > 2047)
585 return -EINVAL;
586
587 Vblankstart = var->yres + 6;
588 Vblankend = Vtotal - 10;
589
590 hw->crtc[6] = Vtotal;
Jiri Slaby87d06132007-10-18 23:40:27 -0700591 hw->crtc[7] = ENCODE_BIT(Vtotal, 8, 0x01, 0) |
592 ENCODE_BIT(Vdispend, 8, 0x01, 1) |
593 ENCODE_BIT(Vsyncstart, 8, 0x01, 2) |
Krzysztof Helt532237e2007-10-18 23:40:28 -0700594 ENCODE_BIT(Vblankstart, 8, 0x01, 3) |
Jiri Slaby87d06132007-10-18 23:40:27 -0700595 ENCODE_BIT(1, 0, 0x01, 4) |
Krzysztof Helt532237e2007-10-18 23:40:28 -0700596 ENCODE_BIT(Vtotal, 9, 0x01, 5) |
Jiri Slaby87d06132007-10-18 23:40:27 -0700597 ENCODE_BIT(Vdispend, 9, 0x01, 6) |
598 ENCODE_BIT(Vsyncstart, 9, 0x01, 7);
599 hw->crtc[9] = ENCODE_BIT(0, 0, 0x1f, 0) |
Krzysztof Helt532237e2007-10-18 23:40:28 -0700600 ENCODE_BIT(Vblankstart, 9, 0x01, 5) |
Jiri Slaby87d06132007-10-18 23:40:27 -0700601 ENCODE_BIT(1, 0, 0x01, 6);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 hw->crtc[10] = Vsyncstart;
Jiri Slaby87d06132007-10-18 23:40:27 -0700603 hw->crtc[11] = ENCODE_BIT(Vsyncend, 0, 0x0f, 0) |
604 ENCODE_BIT(1, 0, 0x01, 7);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 hw->crtc[12] = Vdispend;
606 hw->crtc[15] = Vblankstart;
607 hw->crtc[16] = Vblankend;
608 hw->crtc[18] = 0xff;
609
610 /*
611 * overflow - graphics reg 0x11
612 * 0=VTOTAL:10 1=VDEND:10 2=VRSTART:10 3=VBSTART:10
613 * 4=LINECOMP:10 5-IVIDEO 6=FIXCNT
614 */
615 hw->crtc_ofl =
Krzysztof Helt532237e2007-10-18 23:40:28 -0700616 ENCODE_BIT(Vtotal, 10, 0x01, 0) |
617 ENCODE_BIT(Vdispend, 10, 0x01, 1) |
618 ENCODE_BIT(Vsyncstart, 10, 0x01, 2) |
619 ENCODE_BIT(Vblankstart, 10, 0x01, 3) |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620 EXT_CRT_VRTOFL_LINECOMP10;
621
622 /* woody: set the interlaced bit... */
623 /* FIXME: what about doublescan? */
624 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
625 hw->crtc_ofl |= EXT_CRT_VRTOFL_INTERLACE;
626
627 return 0;
628}
629
630/*
631 * The following was discovered by a good monitor, bit twiddling, theorising
632 * and but mostly luck. Strangely, it looks like everyone elses' PLL!
633 *
634 * Clock registers:
635 * fclock = fpll / div2
636 * fpll = fref * mult / div1
637 * where:
638 * fref = 14.318MHz (69842ps)
639 * mult = reg0xb0.7:0
640 * div1 = (reg0xb1.5:0 + 1)
641 * div2 = 2^(reg0xb1.7:6)
642 * fpll should be between 115 and 260 MHz
643 * (8696ps and 3846ps)
644 */
645static int
646cyber2000fb_decode_clock(struct par_info *hw, struct cfb_info *cfb,
647 struct fb_var_screeninfo *var)
648{
649 u_long pll_ps = var->pixclock;
650 const u_long ref_ps = cfb->ref_ps;
651 u_int div2, t_div1, best_div1, best_mult;
652 int best_diff;
653 int vco;
654
655 /*
656 * Step 1:
657 * find div2 such that 115MHz < fpll < 260MHz
658 * and 0 <= div2 < 4
659 */
660 for (div2 = 0; div2 < 4; div2++) {
661 u_long new_pll;
662
663 new_pll = pll_ps / cfb->divisors[div2];
664 if (8696 > new_pll && new_pll > 3846) {
665 pll_ps = new_pll;
666 break;
667 }
668 }
669
670 if (div2 == 4)
671 return -EINVAL;
672
673 /*
674 * Step 2:
675 * Given pll_ps and ref_ps, find:
676 * pll_ps * 0.995 < pll_ps_calc < pll_ps * 1.005
677 * where { 1 < best_div1 < 32, 1 < best_mult < 256 }
678 * pll_ps_calc = best_div1 / (ref_ps * best_mult)
679 */
680 best_diff = 0x7fffffff;
681 best_mult = 32;
682 best_div1 = 255;
683 for (t_div1 = 32; t_div1 > 1; t_div1 -= 1) {
684 u_int rr, t_mult, t_pll_ps;
685 int diff;
686
687 /*
688 * Find the multiplier for this divisor
689 */
690 rr = ref_ps * t_div1;
691 t_mult = (rr + pll_ps / 2) / pll_ps;
692
693 /*
694 * Is the multiplier within the correct range?
695 */
696 if (t_mult > 256 || t_mult < 2)
697 continue;
698
699 /*
700 * Calculate the actual clock period from this multiplier
701 * and divisor, and estimate the error.
702 */
703 t_pll_ps = (rr + t_mult / 2) / t_mult;
704 diff = pll_ps - t_pll_ps;
705 if (diff < 0)
706 diff = -diff;
707
708 if (diff < best_diff) {
709 best_diff = diff;
710 best_mult = t_mult;
711 best_div1 = t_div1;
712 }
713
714 /*
715 * If we hit an exact value, there is no point in continuing.
716 */
717 if (diff == 0)
718 break;
719 }
720
721 /*
722 * Step 3:
723 * combine values
724 */
725 hw->clock_mult = best_mult - 1;
726 hw->clock_div = div2 << 6 | (best_div1 - 1);
727
728 vco = ref_ps * best_div1 / best_mult;
729 if ((ref_ps == 40690) && (vco < 5556))
730 /* Set VFSEL when VCO > 180MHz (5.556 ps). */
731 hw->clock_div |= EXT_DCLK_DIV_VFSEL;
732
733 return 0;
734}
735
736/*
737 * Set the User Defined Part of the Display
738 */
739static int
740cyber2000fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
741{
742 struct cfb_info *cfb = (struct cfb_info *)info;
743 struct par_info hw;
744 unsigned int mem;
745 int err;
746
747 var->transp.msb_right = 0;
748 var->red.msb_right = 0;
749 var->green.msb_right = 0;
750 var->blue.msb_right = 0;
Krzysztof Helt532237e2007-10-18 23:40:28 -0700751 var->transp.offset = 0;
752 var->transp.length = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753
754 switch (var->bits_per_pixel) {
755 case 8: /* PSEUDOCOLOUR, 256 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756 var->red.offset = 0;
757 var->red.length = 8;
758 var->green.offset = 0;
759 var->green.length = 8;
760 var->blue.offset = 0;
761 var->blue.length = 8;
762 break;
763
764 case 16:/* DIRECTCOLOUR, 64k or 32k */
765 switch (var->green.length) {
766 case 6: /* RGB565, 64k */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767 var->red.offset = 11;
768 var->red.length = 5;
769 var->green.offset = 5;
770 var->green.length = 6;
771 var->blue.offset = 0;
772 var->blue.length = 5;
773 break;
774
775 default:
776 case 5: /* RGB555, 32k */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777 var->red.offset = 10;
778 var->red.length = 5;
779 var->green.offset = 5;
780 var->green.length = 5;
781 var->blue.offset = 0;
782 var->blue.length = 5;
783 break;
784
785 case 4: /* RGB444, 4k + transparency? */
786 var->transp.offset = 12;
787 var->transp.length = 4;
788 var->red.offset = 8;
789 var->red.length = 4;
790 var->green.offset = 4;
791 var->green.length = 4;
792 var->blue.offset = 0;
793 var->blue.length = 4;
794 break;
795 }
796 break;
797
798 case 24:/* TRUECOLOUR, 16m */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700799 var->red.offset = 16;
800 var->red.length = 8;
801 var->green.offset = 8;
802 var->green.length = 8;
803 var->blue.offset = 0;
804 var->blue.length = 8;
805 break;
806
807 case 32:/* TRUECOLOUR, 16m */
808 var->transp.offset = 24;
809 var->transp.length = 8;
810 var->red.offset = 16;
811 var->red.length = 8;
812 var->green.offset = 8;
813 var->green.length = 8;
814 var->blue.offset = 0;
815 var->blue.length = 8;
816 break;
817
818 default:
819 return -EINVAL;
820 }
821
822 mem = var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8);
823 if (mem > cfb->fb.fix.smem_len)
824 var->yres_virtual = cfb->fb.fix.smem_len * 8 /
Krzysztof Helt532237e2007-10-18 23:40:28 -0700825 (var->bits_per_pixel * var->xres_virtual);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700826
827 if (var->yres > var->yres_virtual)
828 var->yres = var->yres_virtual;
829 if (var->xres > var->xres_virtual)
830 var->xres = var->xres_virtual;
831
832 err = cyber2000fb_decode_clock(&hw, cfb, var);
833 if (err)
834 return err;
835
836 err = cyber2000fb_decode_crtc(&hw, cfb, var);
837 if (err)
838 return err;
839
840 return 0;
841}
842
843static int cyber2000fb_set_par(struct fb_info *info)
844{
845 struct cfb_info *cfb = (struct cfb_info *)info;
846 struct fb_var_screeninfo *var = &cfb->fb.var;
847 struct par_info hw;
848 unsigned int mem;
849
850 hw.width = var->xres_virtual;
851 hw.ramdac = RAMDAC_VREFEN | RAMDAC_DAC8BIT;
852
853 switch (var->bits_per_pixel) {
854 case 8:
855 hw.co_pixfmt = CO_PIXFMT_8BPP;
856 hw.pitch = hw.width >> 3;
857 hw.extseqmisc = EXT_SEQ_MISC_8;
858 break;
859
860 case 16:
861 hw.co_pixfmt = CO_PIXFMT_16BPP;
862 hw.pitch = hw.width >> 2;
863
864 switch (var->green.length) {
865 case 6: /* RGB565, 64k */
866 hw.extseqmisc = EXT_SEQ_MISC_16_RGB565;
867 break;
868 case 5: /* RGB555, 32k */
869 hw.extseqmisc = EXT_SEQ_MISC_16_RGB555;
870 break;
871 case 4: /* RGB444, 4k + transparency? */
872 hw.extseqmisc = EXT_SEQ_MISC_16_RGB444;
873 break;
874 default:
875 BUG();
876 }
877 case 24:/* TRUECOLOUR, 16m */
878 hw.co_pixfmt = CO_PIXFMT_24BPP;
879 hw.width *= 3;
880 hw.pitch = hw.width >> 3;
881 hw.ramdac |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
882 hw.extseqmisc = EXT_SEQ_MISC_24_RGB888;
883 break;
884
885 case 32:/* TRUECOLOUR, 16m */
886 hw.co_pixfmt = CO_PIXFMT_32BPP;
887 hw.pitch = hw.width >> 1;
888 hw.ramdac |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
889 hw.extseqmisc = EXT_SEQ_MISC_32;
890 break;
891
892 default:
893 BUG();
894 }
895
896 /*
897 * Sigh, this is absolutely disgusting, but caused by
898 * the way the fbcon developers want to separate out
899 * the "checking" and the "setting" of the video mode.
900 *
901 * If the mode is not suitable for the hardware here,
902 * we can't prevent it being set by returning an error.
903 *
904 * In theory, since NetWinders contain just one VGA card,
905 * we should never end up hitting this problem.
906 */
907 BUG_ON(cyber2000fb_decode_clock(&hw, cfb, var) != 0);
908 BUG_ON(cyber2000fb_decode_crtc(&hw, cfb, var) != 0);
909
910 hw.width -= 1;
911 hw.fetch = hw.pitch;
912 if (!(cfb->mem_ctl2 & MEM_CTL2_64BIT))
913 hw.fetch <<= 1;
914 hw.fetch += 1;
915
Krzysztof Helt532237e2007-10-18 23:40:28 -0700916 cfb->fb.fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917
918 /*
919 * Same here - if the size of the video mode exceeds the
920 * available RAM, we can't prevent this mode being set.
921 *
922 * In theory, since NetWinders contain just one VGA card,
923 * we should never end up hitting this problem.
924 */
925 mem = cfb->fb.fix.line_length * var->yres_virtual;
926 BUG_ON(mem > cfb->fb.fix.smem_len);
927
928 /*
929 * 8bpp displays are always pseudo colour. 16bpp and above
930 * are direct colour or true colour, depending on whether
931 * the RAMDAC palettes are bypassed. (Direct colour has
932 * palettes, true colour does not.)
933 */
934 if (var->bits_per_pixel == 8)
935 cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
936 else if (hw.ramdac & RAMDAC_BYPASS)
937 cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
938 else
939 cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR;
940
941 cyber2000fb_set_timing(cfb, &hw);
942 cyber2000fb_update_start(cfb, var);
943
944 return 0;
945}
946
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947/*
948 * Pan or Wrap the Display
949 */
950static int
951cyber2000fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
952{
953 struct cfb_info *cfb = (struct cfb_info *)info;
954
955 if (cyber2000fb_update_start(cfb, var))
956 return -EINVAL;
957
958 cfb->fb.var.xoffset = var->xoffset;
959 cfb->fb.var.yoffset = var->yoffset;
960
961 if (var->vmode & FB_VMODE_YWRAP) {
962 cfb->fb.var.vmode |= FB_VMODE_YWRAP;
963 } else {
964 cfb->fb.var.vmode &= ~FB_VMODE_YWRAP;
965 }
966
967 return 0;
968}
969
970/*
971 * (Un)Blank the display.
972 *
973 * Blank the screen if blank_mode != 0, else unblank. If
974 * blank == NULL then the caller blanks by setting the CLUT
975 * (Color Look Up Table) to all black. Return 0 if blanking
976 * succeeded, != 0 if un-/blanking failed due to e.g. a
977 * video mode which doesn't support it. Implements VESA
978 * suspend and powerdown modes on hardware that supports
979 * disabling hsync/vsync:
980 * blank_mode == 2: suspend vsync
981 * blank_mode == 3: suspend hsync
982 * blank_mode == 4: powerdown
983 *
984 * wms...Enable VESA DMPS compatible powerdown mode
985 * run "setterm -powersave powerdown" to take advantage
986 */
987static int cyber2000fb_blank(int blank, struct fb_info *info)
988{
989 struct cfb_info *cfb = (struct cfb_info *)info;
990 unsigned int sync = 0;
991 int i;
992
993 switch (blank) {
994 case FB_BLANK_POWERDOWN: /* powerdown - both sync lines down */
995 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_0;
Krzysztof Helt532237e2007-10-18 23:40:28 -0700996 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700997 case FB_BLANK_HSYNC_SUSPEND: /* hsync off */
998 sync = EXT_SYNC_CTL_VS_NORMAL | EXT_SYNC_CTL_HS_0;
Krzysztof Helt532237e2007-10-18 23:40:28 -0700999 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000 case FB_BLANK_VSYNC_SUSPEND: /* vsync off */
1001 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_NORMAL;
1002 break;
Krzysztof Helt532237e2007-10-18 23:40:28 -07001003 case FB_BLANK_NORMAL: /* soft blank */
1004 default: /* unblank */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001005 break;
1006 }
1007
1008 cyber2000_grphw(EXT_SYNC_CTL, sync, cfb);
1009
1010 if (blank <= 1) {
1011 /* turn on ramdacs */
Krzysztof Helt532237e2007-10-18 23:40:28 -07001012 cfb->ramdac_powerdown &= ~(RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1013 RAMDAC_RAMPWRDN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014 cyber2000fb_write_ramdac_ctrl(cfb);
1015 }
1016
1017 /*
1018 * Soft blank/unblank the display.
1019 */
1020 if (blank) { /* soft blank */
1021 for (i = 0; i < NR_PALETTE; i++) {
1022 cyber2000fb_writeb(i, 0x3c8, cfb);
1023 cyber2000fb_writeb(0, 0x3c9, cfb);
1024 cyber2000fb_writeb(0, 0x3c9, cfb);
1025 cyber2000fb_writeb(0, 0x3c9, cfb);
1026 }
1027 } else { /* unblank */
1028 for (i = 0; i < NR_PALETTE; i++) {
1029 cyber2000fb_writeb(i, 0x3c8, cfb);
1030 cyber2000fb_writeb(cfb->palette[i].red, 0x3c9, cfb);
1031 cyber2000fb_writeb(cfb->palette[i].green, 0x3c9, cfb);
1032 cyber2000fb_writeb(cfb->palette[i].blue, 0x3c9, cfb);
1033 }
1034 }
1035
1036 if (blank >= 2) {
1037 /* turn off ramdacs */
Krzysztof Helt532237e2007-10-18 23:40:28 -07001038 cfb->ramdac_powerdown |= RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1039 RAMDAC_RAMPWRDN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040 cyber2000fb_write_ramdac_ctrl(cfb);
1041 }
1042
1043 return 0;
1044}
1045
1046static struct fb_ops cyber2000fb_ops = {
1047 .owner = THIS_MODULE,
1048 .fb_check_var = cyber2000fb_check_var,
1049 .fb_set_par = cyber2000fb_set_par,
1050 .fb_setcolreg = cyber2000fb_setcolreg,
1051 .fb_blank = cyber2000fb_blank,
1052 .fb_pan_display = cyber2000fb_pan_display,
1053 .fb_fillrect = cyber2000fb_fillrect,
1054 .fb_copyarea = cyber2000fb_copyarea,
1055 .fb_imageblit = cyber2000fb_imageblit,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001056 .fb_sync = cyber2000fb_sync,
1057};
1058
1059/*
1060 * This is the only "static" reference to the internal data structures
1061 * of this driver. It is here solely at the moment to support the other
1062 * CyberPro modules external to this driver.
1063 */
Krzysztof Helt532237e2007-10-18 23:40:28 -07001064static struct cfb_info *int_cfb_info;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065
1066/*
1067 * Enable access to the extended registers
1068 */
1069void cyber2000fb_enable_extregs(struct cfb_info *cfb)
1070{
1071 cfb->func_use_count += 1;
1072
1073 if (cfb->func_use_count == 1) {
1074 int old;
1075
1076 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1077 old |= EXT_FUNC_CTL_EXTREGENBL;
1078 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1079 }
1080}
Krzysztof Helt532237e2007-10-18 23:40:28 -07001081EXPORT_SYMBOL(cyber2000fb_enable_extregs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001082
1083/*
1084 * Disable access to the extended registers
1085 */
1086void cyber2000fb_disable_extregs(struct cfb_info *cfb)
1087{
1088 if (cfb->func_use_count == 1) {
1089 int old;
1090
1091 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1092 old &= ~EXT_FUNC_CTL_EXTREGENBL;
1093 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1094 }
1095
1096 if (cfb->func_use_count == 0)
1097 printk(KERN_ERR "disable_extregs: count = 0\n");
1098 else
1099 cfb->func_use_count -= 1;
1100}
Krzysztof Helt532237e2007-10-18 23:40:28 -07001101EXPORT_SYMBOL(cyber2000fb_disable_extregs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001102
1103void cyber2000fb_get_fb_var(struct cfb_info *cfb, struct fb_var_screeninfo *var)
1104{
1105 memcpy(var, &cfb->fb.var, sizeof(struct fb_var_screeninfo));
1106}
Krzysztof Helt532237e2007-10-18 23:40:28 -07001107EXPORT_SYMBOL(cyber2000fb_get_fb_var);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001108
1109/*
1110 * Attach a capture/tv driver to the core CyberX0X0 driver.
1111 */
1112int cyber2000fb_attach(struct cyberpro_info *info, int idx)
1113{
1114 if (int_cfb_info != NULL) {
1115 info->dev = int_cfb_info->dev;
1116 info->regs = int_cfb_info->regs;
1117 info->fb = int_cfb_info->fb.screen_base;
1118 info->fb_size = int_cfb_info->fb.fix.smem_len;
1119 info->enable_extregs = cyber2000fb_enable_extregs;
1120 info->disable_extregs = cyber2000fb_disable_extregs;
Krzysztof Helt532237e2007-10-18 23:40:28 -07001121 info->info = int_cfb_info;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122
Krzysztof Helt532237e2007-10-18 23:40:28 -07001123 strlcpy(info->dev_name, int_cfb_info->fb.fix.id,
1124 sizeof(info->dev_name));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001125 }
1126
1127 return int_cfb_info != NULL;
1128}
Krzysztof Helt532237e2007-10-18 23:40:28 -07001129EXPORT_SYMBOL(cyber2000fb_attach);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001130
1131/*
1132 * Detach a capture/tv driver from the core CyberX0X0 driver.
1133 */
1134void cyber2000fb_detach(int idx)
1135{
1136}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001137EXPORT_SYMBOL(cyber2000fb_detach);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001138
1139/*
1140 * These parameters give
1141 * 640x480, hsync 31.5kHz, vsync 60Hz
1142 */
1143static struct fb_videomode __devinitdata cyber2000fb_default_mode = {
1144 .refresh = 60,
1145 .xres = 640,
1146 .yres = 480,
1147 .pixclock = 39722,
1148 .left_margin = 56,
1149 .right_margin = 16,
1150 .upper_margin = 34,
1151 .lower_margin = 9,
1152 .hsync_len = 88,
1153 .vsync_len = 2,
1154 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1155 .vmode = FB_VMODE_NONINTERLACED
1156};
1157
1158static char igs_regs[] = {
1159 EXT_CRT_IRQ, 0,
1160 EXT_CRT_TEST, 0,
1161 EXT_SYNC_CTL, 0,
1162 EXT_SEG_WRITE_PTR, 0,
1163 EXT_SEG_READ_PTR, 0,
1164 EXT_BIU_MISC, EXT_BIU_MISC_LIN_ENABLE |
1165 EXT_BIU_MISC_COP_ENABLE |
1166 EXT_BIU_MISC_COP_BFC,
1167 EXT_FUNC_CTL, 0,
1168 CURS_H_START, 0,
1169 CURS_H_START + 1, 0,
1170 CURS_H_PRESET, 0,
1171 CURS_V_START, 0,
1172 CURS_V_START + 1, 0,
1173 CURS_V_PRESET, 0,
1174 CURS_CTL, 0,
1175 EXT_ATTRIB_CTL, EXT_ATTRIB_CTL_EXT,
1176 EXT_OVERSCAN_RED, 0,
1177 EXT_OVERSCAN_GREEN, 0,
1178 EXT_OVERSCAN_BLUE, 0,
1179
1180 /* some of these are questionable when we have a BIOS */
1181 EXT_MEM_CTL0, EXT_MEM_CTL0_7CLK |
1182 EXT_MEM_CTL0_RAS_1 |
1183 EXT_MEM_CTL0_MULTCAS,
1184 EXT_HIDDEN_CTL1, 0x30,
1185 EXT_FIFO_CTL, 0x0b,
1186 EXT_FIFO_CTL + 1, 0x17,
1187 0x76, 0x00,
1188 EXT_HIDDEN_CTL4, 0xc8
1189};
1190
1191/*
1192 * Initialise the CyberPro hardware. On the CyberPro5XXXX,
1193 * ensure that we're using the correct PLL (5XXX's may be
1194 * programmed to use an additional set of PLLs.)
1195 */
1196static void cyberpro_init_hw(struct cfb_info *cfb)
1197{
1198 int i;
1199
1200 for (i = 0; i < sizeof(igs_regs); i += 2)
Krzysztof Helt532237e2007-10-18 23:40:28 -07001201 cyber2000_grphw(igs_regs[i], igs_regs[i + 1], cfb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001202
1203 if (cfb->id == ID_CYBERPRO_5000) {
1204 unsigned char val;
1205 cyber2000fb_writeb(0xba, 0x3ce, cfb);
1206 val = cyber2000fb_readb(0x3cf, cfb) & 0x80;
1207 cyber2000fb_writeb(val, 0x3cf, cfb);
1208 }
1209}
1210
Krzysztof Helt532237e2007-10-18 23:40:28 -07001211static struct cfb_info __devinit *cyberpro_alloc_fb_info(unsigned int id,
1212 char *name)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001213{
1214 struct cfb_info *cfb;
1215
Yoann Padioleaudd00cc42007-07-19 01:49:03 -07001216 cfb = kzalloc(sizeof(struct cfb_info), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001217 if (!cfb)
1218 return NULL;
1219
Linus Torvalds1da177e2005-04-16 15:20:36 -07001220
1221 cfb->id = id;
1222
1223 if (id == ID_CYBERPRO_5000)
Krzysztof Helt532237e2007-10-18 23:40:28 -07001224 cfb->ref_ps = 40690; /* 24.576 MHz */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001225 else
Krzysztof Helt532237e2007-10-18 23:40:28 -07001226 cfb->ref_ps = 69842; /* 14.31818 MHz (69841?) */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001227
1228 cfb->divisors[0] = 1;
1229 cfb->divisors[1] = 2;
1230 cfb->divisors[2] = 4;
1231
1232 if (id == ID_CYBERPRO_2000)
1233 cfb->divisors[3] = 8;
1234 else
1235 cfb->divisors[3] = 6;
1236
1237 strcpy(cfb->fb.fix.id, name);
1238
1239 cfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
1240 cfb->fb.fix.type_aux = 0;
1241 cfb->fb.fix.xpanstep = 0;
1242 cfb->fb.fix.ypanstep = 1;
1243 cfb->fb.fix.ywrapstep = 0;
1244
1245 switch (id) {
1246 case ID_IGA_1682:
1247 cfb->fb.fix.accel = 0;
1248 break;
1249
1250 case ID_CYBERPRO_2000:
1251 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2000;
1252 break;
1253
1254 case ID_CYBERPRO_2010:
1255 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2010;
1256 break;
1257
1258 case ID_CYBERPRO_5000:
1259 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER5000;
1260 break;
1261 }
1262
1263 cfb->fb.var.nonstd = 0;
1264 cfb->fb.var.activate = FB_ACTIVATE_NOW;
1265 cfb->fb.var.height = -1;
1266 cfb->fb.var.width = -1;
1267 cfb->fb.var.accel_flags = FB_ACCELF_TEXT;
1268
1269 cfb->fb.fbops = &cyber2000fb_ops;
1270 cfb->fb.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
Russell Kingeca02b02005-05-03 12:23:56 +01001271 cfb->fb.pseudo_palette = cfb->pseudo_palette;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001272
1273 fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0);
1274
1275 return cfb;
1276}
1277
Krzysztof Helt532237e2007-10-18 23:40:28 -07001278static void cyberpro_free_fb_info(struct cfb_info *cfb)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279{
1280 if (cfb) {
1281 /*
1282 * Free the colourmap
1283 */
1284 fb_alloc_cmap(&cfb->fb.cmap, 0, 0);
1285
1286 kfree(cfb);
1287 }
1288}
1289
1290/*
1291 * Parse Cyber2000fb options. Usage:
1292 * video=cyber2000:font:fontname
1293 */
1294#ifndef MODULE
Krzysztof Helt532237e2007-10-18 23:40:28 -07001295static int cyber2000fb_setup(char *options)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001296{
1297 char *opt;
1298
1299 if (!options || !*options)
1300 return 0;
1301
1302 while ((opt = strsep(&options, ",")) != NULL) {
1303 if (!*opt)
1304 continue;
1305
1306 if (strncmp(opt, "font:", 5) == 0) {
1307 static char default_font_storage[40];
1308
Krzysztof Helt532237e2007-10-18 23:40:28 -07001309 strlcpy(default_font_storage, opt + 5,
1310 sizeof(default_font_storage));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001311 default_font = default_font_storage;
1312 continue;
1313 }
1314
1315 printk(KERN_ERR "CyberPro20x0: unknown parameter: %s\n", opt);
1316 }
1317 return 0;
1318}
1319#endif /* MODULE */
1320
1321/*
1322 * The CyberPro chips can be placed on many different bus types.
1323 * This probe function is common to all bus types. The bus-specific
1324 * probe function is expected to have:
1325 * - enabled access to the linear memory region
1326 * - memory mapped access to the registers
1327 * - initialised mem_ctl1 and mem_ctl2 appropriately.
1328 */
1329static int __devinit cyberpro_common_probe(struct cfb_info *cfb)
1330{
1331 u_long smem_size;
1332 u_int h_sync, v_sync;
1333 int err;
1334
1335 cyberpro_init_hw(cfb);
1336
1337 /*
1338 * Get the video RAM size and width from the VGA register.
1339 * This should have been already initialised by the BIOS,
1340 * but if it's garbage, claim default 1MB VRAM (woody)
1341 */
1342 cfb->mem_ctl1 = cyber2000_grphr(EXT_MEM_CTL1, cfb);
1343 cfb->mem_ctl2 = cyber2000_grphr(EXT_MEM_CTL2, cfb);
1344
1345 /*
1346 * Determine the size of the memory.
1347 */
1348 switch (cfb->mem_ctl2 & MEM_CTL2_SIZE_MASK) {
Krzysztof Helt532237e2007-10-18 23:40:28 -07001349 case MEM_CTL2_SIZE_4MB:
1350 smem_size = 0x00400000;
1351 break;
1352 case MEM_CTL2_SIZE_2MB:
1353 smem_size = 0x00200000;
1354 break;
1355 case MEM_CTL2_SIZE_1MB:
1356 smem_size = 0x00100000;
1357 break;
1358 default:
1359 smem_size = 0x00100000;
1360 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001361 }
1362
1363 cfb->fb.fix.smem_len = smem_size;
1364 cfb->fb.fix.mmio_len = MMIO_SIZE;
1365 cfb->fb.screen_base = cfb->region;
1366
1367 err = -EINVAL;
1368 if (!fb_find_mode(&cfb->fb.var, &cfb->fb, NULL, NULL, 0,
Krzysztof Helt532237e2007-10-18 23:40:28 -07001369 &cyber2000fb_default_mode, 8)) {
1370 printk(KERN_ERR "%s: no valid mode found\n", cfb->fb.fix.id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001371 goto failed;
1372 }
1373
1374 cfb->fb.var.yres_virtual = cfb->fb.fix.smem_len * 8 /
1375 (cfb->fb.var.bits_per_pixel * cfb->fb.var.xres_virtual);
1376
1377 if (cfb->fb.var.yres_virtual < cfb->fb.var.yres)
1378 cfb->fb.var.yres_virtual = cfb->fb.var.yres;
1379
Krzysztof Helt532237e2007-10-18 23:40:28 -07001380/* fb_set_var(&cfb->fb.var, -1, &cfb->fb); */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001381
1382 /*
1383 * Calculate the hsync and vsync frequencies. Note that
1384 * we split the 1e12 constant up so that we can preserve
1385 * the precision and fit the results into 32-bit registers.
1386 * (1953125000 * 512 = 1e12)
1387 */
1388 h_sync = 1953125000 / cfb->fb.var.pixclock;
1389 h_sync = h_sync * 512 / (cfb->fb.var.xres + cfb->fb.var.left_margin +
1390 cfb->fb.var.right_margin + cfb->fb.var.hsync_len);
1391 v_sync = h_sync / (cfb->fb.var.yres + cfb->fb.var.upper_margin +
1392 cfb->fb.var.lower_margin + cfb->fb.var.vsync_len);
1393
1394 printk(KERN_INFO "%s: %dKiB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
1395 cfb->fb.fix.id, cfb->fb.fix.smem_len >> 10,
1396 cfb->fb.var.xres, cfb->fb.var.yres,
1397 h_sync / 1000, h_sync % 1000, v_sync);
1398
1399 if (cfb->dev)
1400 cfb->fb.device = &cfb->dev->dev;
1401 err = register_framebuffer(&cfb->fb);
1402
1403failed:
1404 return err;
1405}
1406
1407static void cyberpro_common_resume(struct cfb_info *cfb)
1408{
1409 cyberpro_init_hw(cfb);
1410
1411 /*
1412 * Reprogram the MEM_CTL1 and MEM_CTL2 registers
1413 */
1414 cyber2000_grphw(EXT_MEM_CTL1, cfb->mem_ctl1, cfb);
1415 cyber2000_grphw(EXT_MEM_CTL2, cfb->mem_ctl2, cfb);
1416
1417 /*
1418 * Restore the old video mode and the palette.
1419 * We also need to tell fbcon to redraw the console.
1420 */
1421 cyber2000fb_set_par(&cfb->fb);
1422}
1423
1424#ifdef CONFIG_ARCH_SHARK
1425
1426#include <asm/arch/hardware.h>
1427
Krzysztof Helt532237e2007-10-18 23:40:28 -07001428static int __devinit cyberpro_vl_probe(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001429{
1430 struct cfb_info *cfb;
1431 int err = -ENOMEM;
1432
Krzysztof Helt532237e2007-10-18 23:40:28 -07001433 if (!request_mem_region(FB_START, FB_SIZE, "CyberPro2010"))
1434 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001435
1436 cfb = cyberpro_alloc_fb_info(ID_CYBERPRO_2010, "CyberPro2010");
1437 if (!cfb)
1438 goto failed_release;
1439
1440 cfb->dev = NULL;
Krzysztof Helt532237e2007-10-18 23:40:28 -07001441 cfb->region = ioremap(FB_START, FB_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001442 if (!cfb->region)
1443 goto failed_ioremap;
1444
1445 cfb->regs = cfb->region + MMIO_OFFSET;
1446 cfb->fb.fix.mmio_start = FB_START + MMIO_OFFSET;
1447 cfb->fb.fix.smem_start = FB_START;
1448
1449 /*
1450 * Bring up the hardware. This is expected to enable access
1451 * to the linear memory region, and allow access to the memory
1452 * mapped registers. Also, mem_ctl1 and mem_ctl2 must be
1453 * initialised.
1454 */
1455 cyber2000fb_writeb(0x18, 0x46e8, cfb);
1456 cyber2000fb_writeb(0x01, 0x102, cfb);
1457 cyber2000fb_writeb(0x08, 0x46e8, cfb);
1458 cyber2000fb_writeb(EXT_BIU_MISC, 0x3ce, cfb);
1459 cyber2000fb_writeb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf, cfb);
1460
1461 cfb->mclk_mult = 0xdb;
1462 cfb->mclk_div = 0x54;
1463
1464 err = cyberpro_common_probe(cfb);
1465 if (err)
1466 goto failed;
1467
1468 if (int_cfb_info == NULL)
1469 int_cfb_info = cfb;
1470
1471 return 0;
1472
1473failed:
1474 iounmap(cfb->region);
1475failed_ioremap:
1476 cyberpro_free_fb_info(cfb);
1477failed_release:
Krzysztof Helt532237e2007-10-18 23:40:28 -07001478 release_mem_region(FB_START, FB_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001479
1480 return err;
1481}
1482#endif /* CONFIG_ARCH_SHARK */
1483
1484/*
1485 * PCI specific support.
1486 */
1487#ifdef CONFIG_PCI
1488/*
1489 * We need to wake up the CyberPro, and make sure its in linear memory
1490 * mode. Unfortunately, this is specific to the platform and card that
1491 * we are running on.
1492 *
1493 * On x86 and ARM, should we be initialising the CyberPro first via the
1494 * IO registers, and then the MMIO registers to catch all cases? Can we
1495 * end up in the situation where the chip is in MMIO mode, but not awake
1496 * on an x86 system?
1497 */
1498static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
1499{
1500 unsigned char val;
1501
1502#if defined(__sparc_v9__)
1503#error "You lose, consult DaveM."
1504#elif defined(__sparc__)
1505 /*
1506 * SPARC does not have an "outb" instruction, so we generate
1507 * I/O cycles storing into a reserved memory space at
1508 * physical address 0x3000000
1509 */
Al Virocd030662005-12-15 09:18:10 +00001510 unsigned char __iomem *iop;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001511
1512 iop = ioremap(0x3000000, 0x5000);
1513 if (iop == NULL) {
1514 prom_printf("iga5000: cannot map I/O\n");
1515 return -ENOMEM;
1516 }
1517
1518 writeb(0x18, iop + 0x46e8);
1519 writeb(0x01, iop + 0x102);
1520 writeb(0x08, iop + 0x46e8);
1521 writeb(EXT_BIU_MISC, iop + 0x3ce);
1522 writeb(EXT_BIU_MISC_LIN_ENABLE, iop + 0x3cf);
1523
Al Virocd030662005-12-15 09:18:10 +00001524 iounmap(iop);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001525#else
1526 /*
1527 * Most other machine types are "normal", so
1528 * we use the standard IO-based wakeup.
1529 */
1530 outb(0x18, 0x46e8);
1531 outb(0x01, 0x102);
1532 outb(0x08, 0x46e8);
1533 outb(EXT_BIU_MISC, 0x3ce);
1534 outb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf);
1535#endif
1536
1537 /*
1538 * Allow the CyberPro to accept PCI burst accesses
1539 */
Woody Suwalskicd792aa2007-02-12 00:55:00 -08001540 if (cfb->id == ID_CYBERPRO_2010) {
Krzysztof Helt532237e2007-10-18 23:40:28 -07001541 printk(KERN_INFO "%s: NOT enabling PCI bursts\n",
1542 cfb->fb.fix.id);
Woody Suwalskicd792aa2007-02-12 00:55:00 -08001543 } else {
1544 val = cyber2000_grphr(EXT_BUS_CTL, cfb);
1545 if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) {
1546 printk(KERN_INFO "%s: enabling PCI bursts\n",
1547 cfb->fb.fix.id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001548
Woody Suwalskicd792aa2007-02-12 00:55:00 -08001549 val |= EXT_BUS_CTL_PCIBURST_WRITE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001550
Woody Suwalskicd792aa2007-02-12 00:55:00 -08001551 if (cfb->id == ID_CYBERPRO_5000)
1552 val |= EXT_BUS_CTL_PCIBURST_READ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001553
Woody Suwalskicd792aa2007-02-12 00:55:00 -08001554 cyber2000_grphw(EXT_BUS_CTL, val, cfb);
1555 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001556 }
1557
1558 return 0;
1559}
1560
1561static int __devinit
1562cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1563{
1564 struct cfb_info *cfb;
1565 char name[16];
1566 int err;
1567
1568 sprintf(name, "CyberPro%4X", id->device);
1569
1570 err = pci_enable_device(dev);
1571 if (err)
1572 return err;
1573
1574 err = pci_request_regions(dev, name);
1575 if (err)
1576 return err;
1577
1578 err = -ENOMEM;
1579 cfb = cyberpro_alloc_fb_info(id->driver_data, name);
1580 if (!cfb)
1581 goto failed_release;
1582
1583 cfb->dev = dev;
1584 cfb->region = ioremap(pci_resource_start(dev, 0),
1585 pci_resource_len(dev, 0));
1586 if (!cfb->region)
1587 goto failed_ioremap;
1588
1589 cfb->regs = cfb->region + MMIO_OFFSET;
1590 cfb->fb.fix.mmio_start = pci_resource_start(dev, 0) + MMIO_OFFSET;
1591 cfb->fb.fix.smem_start = pci_resource_start(dev, 0);
1592
1593 /*
1594 * Bring up the hardware. This is expected to enable access
1595 * to the linear memory region, and allow access to the memory
1596 * mapped registers. Also, mem_ctl1 and mem_ctl2 must be
1597 * initialised.
1598 */
1599 err = cyberpro_pci_enable_mmio(cfb);
1600 if (err)
1601 goto failed;
1602
1603 /*
1604 * Use MCLK from BIOS. FIXME: what about hotplug?
1605 */
1606 cfb->mclk_mult = cyber2000_grphr(EXT_MCLK_MULT, cfb);
1607 cfb->mclk_div = cyber2000_grphr(EXT_MCLK_DIV, cfb);
1608
1609#ifdef __arm__
1610 /*
1611 * MCLK on the NetWinder and the Shark is fixed at 75MHz
1612 */
1613 if (machine_is_netwinder()) {
1614 cfb->mclk_mult = 0xdb;
1615 cfb->mclk_div = 0x54;
1616 }
1617#endif
1618
1619 err = cyberpro_common_probe(cfb);
1620 if (err)
1621 goto failed;
1622
1623 /*
1624 * Our driver data
1625 */
1626 pci_set_drvdata(dev, cfb);
1627 if (int_cfb_info == NULL)
1628 int_cfb_info = cfb;
1629
1630 return 0;
1631
1632failed:
1633 iounmap(cfb->region);
1634failed_ioremap:
1635 cyberpro_free_fb_info(cfb);
1636failed_release:
1637 pci_release_regions(dev);
1638
1639 return err;
1640}
1641
1642static void __devexit cyberpro_pci_remove(struct pci_dev *dev)
1643{
1644 struct cfb_info *cfb = pci_get_drvdata(dev);
1645
1646 if (cfb) {
1647 /*
1648 * If unregister_framebuffer fails, then
1649 * we will be leaving hooks that could cause
1650 * oopsen laying around.
1651 */
1652 if (unregister_framebuffer(&cfb->fb))
1653 printk(KERN_WARNING "%s: danger Will Robinson, "
1654 "danger danger! Oopsen imminent!\n",
1655 cfb->fb.fix.id);
1656 iounmap(cfb->region);
1657 cyberpro_free_fb_info(cfb);
1658
1659 /*
1660 * Ensure that the driver data is no longer
1661 * valid.
1662 */
1663 pci_set_drvdata(dev, NULL);
1664 if (cfb == int_cfb_info)
1665 int_cfb_info = NULL;
1666
1667 pci_release_regions(dev);
1668 }
1669}
1670
1671static int cyberpro_pci_suspend(struct pci_dev *dev, pm_message_t state)
1672{
1673 return 0;
1674}
1675
1676/*
1677 * Re-initialise the CyberPro hardware
1678 */
1679static int cyberpro_pci_resume(struct pci_dev *dev)
1680{
1681 struct cfb_info *cfb = pci_get_drvdata(dev);
1682
1683 if (cfb) {
1684 cyberpro_pci_enable_mmio(cfb);
1685 cyberpro_common_resume(cfb);
1686 }
1687
1688 return 0;
1689}
1690
1691static struct pci_device_id cyberpro_pci_table[] = {
Krzysztof Helt532237e2007-10-18 23:40:28 -07001692/* Not yet
1693 * { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
1694 * PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_IGA_1682 },
1695 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001696 { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2000,
1697 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2000 },
1698 { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2010,
1699 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2010 },
1700 { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5000,
1701 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_5000 },
1702 { 0, }
1703};
1704
Krzysztof Helt532237e2007-10-18 23:40:28 -07001705MODULE_DEVICE_TABLE(pci, cyberpro_pci_table);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001706
1707static struct pci_driver cyberpro_driver = {
1708 .name = "CyberPro",
1709 .probe = cyberpro_pci_probe,
1710 .remove = __devexit_p(cyberpro_pci_remove),
1711 .suspend = cyberpro_pci_suspend,
1712 .resume = cyberpro_pci_resume,
1713 .id_table = cyberpro_pci_table
1714};
1715#endif
1716
1717/*
1718 * I don't think we can use the "module_init" stuff here because
1719 * the fbcon stuff may not be initialised yet. Hence the #ifdef
1720 * around module_init.
1721 *
1722 * Tony: "module_init" is now required
1723 */
1724static int __init cyber2000fb_init(void)
1725{
1726 int ret = -1, err;
1727
1728#ifndef MODULE
1729 char *option = NULL;
1730
1731 if (fb_get_options("cyber2000fb", &option))
1732 return -ENODEV;
1733 cyber2000fb_setup(option);
1734#endif
1735
1736#ifdef CONFIG_ARCH_SHARK
1737 err = cyberpro_vl_probe();
1738 if (!err) {
1739 ret = 0;
1740 __module_get(THIS_MODULE);
1741 }
1742#endif
1743#ifdef CONFIG_PCI
1744 err = pci_register_driver(&cyberpro_driver);
1745 if (!err)
1746 ret = 0;
1747#endif
1748
1749 return ret ? err : 0;
1750}
1751
1752static void __exit cyberpro_exit(void)
1753{
1754 pci_unregister_driver(&cyberpro_driver);
1755}
1756
1757module_init(cyber2000fb_init);
1758module_exit(cyberpro_exit);
1759
1760MODULE_AUTHOR("Russell King");
1761MODULE_DESCRIPTION("CyberPro 2000, 2010 and 5000 framebuffer driver");
1762MODULE_LICENSE("GPL");