Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm / 93c7460c6306f1b6b3be8f29651e6d34ea740459 / . / arch / arm / boot / dts / msm8226.dtsi
blob: da52984ad02a82ed223c83b10cba14080fbed31a [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]24 sdhc3 = &sdhc_3; /* SDC3 SDIO slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]25 };
26
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]27 memory {
28 secure_mem: secure_region {
29 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]30 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]31 label = "secure_mem";
32 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]33
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]34 adsp_mem: adsp_region {
35 linux,contiguous-region;
36 reg = <0 0x2000000>;
37 label = "adsp_mem";
38 };
39
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]40 qsecom_mem: qsecom_region {
41 linux,contiguous-region;
42 reg = <0 0x780000>;
43 label = "qsecom_mem";
44 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]45 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]46
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]47 soc: soc { };
48};
49
50/include/ "msm8226-ion.dtsi"
51/include/ "msm8226-camera.dtsi"
52/include/ "msm-gdsc.dtsi"
53/include/ "msm8226-iommu.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]54/include/ "msm8226-smp2p.dtsi"
55/include/ "msm8226-gpu.dtsi"
56/include/ "msm8226-bus.dtsi"
57/include/ "msm8226-mdss.dtsi"
58/include/ "msm8226-coresight.dtsi"
59/include/ "msm8226-iommu-domains.dtsi"
60
61&soc {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65
66 intc: interrupt-controller@f9000000 {
67 compatible = "qcom,msm-qgic2";
68 interrupt-controller;
69 #interrupt-cells = <3>;
70 reg = <0xF9000000 0x1000>,
71 <0xF9002000 0x1000>;
72 };
73
74 msmgpio: gpio@fd510000 {
75 compatible = "qcom,msm-gpio";
76 interrupt-controller;
77 #interrupt-cells = <2>;
78 reg = <0xfd510000 0x4000>;
79 gpio-controller;
80 #gpio-cells = <2>;
81 ngpio = <117>;
82 interrupts = <0 208 0>;
83 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]84 };
85
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]86 qcom,mpm2-sleep-counter@fc4a3000 {
87 compatible = "qcom,mpm2-sleep-counter";
88 reg = <0xfc4a3000 0x1000>;
89 clock-frequency = <32768>;
90 };
91
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]92 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]93 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]94 interrupts = <1 2 0 1 3 0>;
95 clock-frequency = <19200000>;
96 };
97
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]98 timer@f9020000 {
99 #address-cells = <1>;
100 #size-cells = <1>;
101 ranges;
102 compatible = "arm,armv7-timer-mem";
103 reg = <0xf9020000 0x1000>;
104 clock-frequency = <19200000>;
105
106 frame@f9021000 {
107 frame-number = <0>;
108 interrupts = <0 8 0x4>,
109 <0 7 0x4>;
110 reg = <0xf9021000 0x1000>,
111 <0xf9022000 0x1000>;
112 };
113
114 frame@f9023000 {
115 frame-number = <1>;
116 interrupts = <0 9 0x4>;
117 reg = <0xf9023000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9024000 {
122 frame-number = <2>;
123 interrupts = <0 10 0x4>;
124 reg = <0xf9024000 0x1000>;
125 status = "disabled";
126 };
127
128 frame@f9025000 {
129 frame-number = <3>;
130 interrupts = <0 11 0x4>;
131 reg = <0xf9025000 0x1000>;
132 status = "disabled";
133 };
134
135 frame@f9026000 {
136 frame-number = <4>;
137 interrupts = <0 12 0x4>;
138 reg = <0xf9026000 0x1000>;
139 status = "disabled";
140 };
141
142 frame@f9027000 {
143 frame-number = <5>;
144 interrupts = <0 13 0x4>;
145 reg = <0xf9027000 0x1000>;
146 status = "disabled";
147 };
148
149 frame@f9028000 {
150 frame-number = <6>;
151 interrupts = <0 14 0x4>;
152 reg = <0xf9028000 0x1000>;
153 status = "disabled";
154 };
155 };
156
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]157 qcom,vidc@fdc00000 {
158 compatible = "qcom,msm-vidc";
159 reg = <0xfdc00000 0xff000>;
160 interrupts = <0 44 0>;
161 qcom,load-freq-tbl = <352800 160000000>,
162 <244800 133330000>,
163 <108000 66700000>;
164 qcom,hfi = "venus";
165 qcom,bus-ports = <1>;
166 qcom,reg-presets = <0xE0024 0x0>,
167 <0x80124 0x3>,
168 <0xE0020 0x5555556>,
169 <0x800B0 0x10101001>,
170 <0x800B4 0x00101010>,
171 <0x800C0 0x1010100f>,
172 <0x800C4 0x00101010>,
173 <0x800D0 0x00000010>,
174 <0x800D4 0x00000010>,
175 <0x800D8 0x00000707>;
176 qcom,enc-ddr-ab-ib = <0 0>,
177 <129000 142000>,
178 <384000 422000>,
179 <866000 953000>;
180 qcom,dec-ddr-ab-ib = <0 0>,
181 <103000 134000>,
182 <268000 348000>,
183 <505000 657000>;
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]184 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]185 <0x2 0x2>,
186 <0x1f0 0x3>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]187 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]188 qcom,vidc-iommu-domains {
189 qcom,domain-ns {
190 qcom,vidc-domain-phandle = <&venus_domain_ns>;
191 qcom,vidc-partition-buffer-types = <0x1ff>,
192 <0x200>;
193 };
194
195 qcom,domain-cp {
196 qcom,vidc-domain-phandle = <&venus_domain_cp>;
197 qcom,vidc-partition-buffer-types = <0x2>,
198 <0x1f1>;
199 };
200 };
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]201 };
202
203 qcom,wfd {
204 compatible = "qcom,msm-wfd";
205 };
206
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]207 serial@f991f000 {
208 compatible = "qcom,msm-lsuart-v14";
209 reg = <0xf991f000 0x1000>;
210 interrupts = <0 109 0>;
211 status = "disabled";
212 };
213
214 serial@f995e000 {
215 compatible = "qcom,msm-lsuart-v14";
216 reg = <0xf995e000 0x1000>;
217 interrupts = <0 114 0>;
218 status = "disabled";
219 };
220
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]221 qcom,msm-imem@fe805000 {
222 compatible = "qcom,msm-imem";
223 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
224 };
225
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]226 qcom,sps@f9984000 {
227 compatible = "qcom,msm_sps";
228 reg = <0xf9984000 0x15000>,
229 <0xf9999000 0xb000>;
230 interrupts = <0 94 0>;
231 };
232
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]233 qcom,usbbam@f9a44000 {
234 compatible = "qcom,usb-bam-msm";
235 reg = <0xf9a44000 0x11000>;
236 reg-names = "hsusb";
237 interrupts = <0 135 0>;
238 interrupt-names = "hsusb";
239 qcom,usb-bam-num-pipes = <16>;
240 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
241 qcom,ignore-core-reset-ack;
242 qcom,disable-clk-gating;
243
244 qcom,pipe0 {
245 label = "hsusb-qdss-in-0";
246 qcom,usb-bam-mem-type = <3>;
247 qcom,bam-type = <1>;
248 qcom,dir = <1>;
249 qcom,pipe-num = <0>;
250 qcom,peer-bam = <1>;
251 qcom,src-bam-physical-address = <0xfc37c000>;
252 qcom,src-bam-pipe-index = <0>;
253 qcom,dst-bam-physical-address = <0xf9a44000>;
254 qcom,dst-bam-pipe-index = <2>;
255 qcom,data-fifo-offset = <0x0>;
256 qcom,data-fifo-size = <0x600>;
257 qcom,descriptor-fifo-offset = <0x600>;
258 qcom,descriptor-fifo-size = <0x200>;
259 };
260 };
261
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]262 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]263 compatible = "qcom,hsusb-otg";
264 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]265 interrupts = <0 134 0>, <0 140 0>;
266 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]267 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]268 HSUSB_1p8-supply = <&pm8226_l10>;
269 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]270 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]271
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]272 qcom,hsusb-otg-phy-init-seq =
273 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]274 qcom,hsusb-otg-phy-type = <2>;
275 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]276 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]277 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]278 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]279
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]280 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]281 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]282 qcom,msm-bus,num-paths = <1>;
283 qcom,msm-bus,vectors-KBps =
284 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]285 <87 512 60000 960000>,
286 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]287 };
288
Mayank Ranaf8bfadb2013-07-25 12:01:25 +0530[diff] [blame]289 android_usb: android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]290 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]291 reg = <0xfe8050c8 0xc8>;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]292 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]293 };
294
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]295 wcd9xxx_intc: wcd9xxx-irq {
296 compatible = "qcom,wcd9xxx-irq";
297 interrupt-controller;
298 #interrupt-cells = <1>;
299 interrupt-parent = <&msmgpio>;
300 interrupts = <68 0>;
301 interrupt-names = "cdc-int";
302 };
303
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]304 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]305 cell-index = <1>;
306 compatible = "qcom,slim-ngd";
307 reg = <0xfe12f000 0x35000>,
308 <0xfe104000 0x20000>;
309 reg-names = "slimbus_physical", "slimbus_bam_physical";
310 interrupts = <0 163 0>, <0 164 0>;
311 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]312
313 tapan_codec {
314 compatible = "qcom,tapan-slim-pgd";
315 elemental-addr = [00 01 E0 00 17 02];
316
317 interrupt-parent = <&wcd9xxx_intc>;
318 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
319 17 18 19 20 21 22 23 24 25 26 27 28>;
320 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
321
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]322 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare482ef672013-06-20 15:28:59 -0700[diff] [blame]323 qcom,cdc-vdd-buck-voltage = <1800000 2150000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]324 qcom,cdc-vdd-buck-current = <650000>;
325
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]326 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]327 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
328 qcom,cdc-vdd-h-current = <25000>;
329
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]330 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]331 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
332 qcom,cdc-vdd-px-current = <25000>;
333
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]334 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]335 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
336 qcom,cdc-vdd-a-1p2v-current = <10000>;
337
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]338 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]339 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
340 qcom,cdc-vdd-cx-current = <10000>;
341
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame]342 cdc-vdd-buckhelper-supply = <&pm8226_l25>;
343 qcom,cdc-vdd-buckhelper-voltage = <1775000 2125000>;
344 qcom,cdc-vdd-buckhelper-current = <10000>;
345
346 qcom,cdc-static-supplies = "cdc-vdd-h",
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]347 "cdc-vdd-px",
348 "cdc-vdd-a-1p2v",
349 "cdc-vdd-cx";
350
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame]351 qcom,cdc-cp-supplies = "cdc-vdd-buck",
352 "cdc-vdd-buckhelper";
353
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]354 qcom,cdc-micbias-ldoh-v = <0x3>;
355 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]356 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]357 qcom,cdc-micbias-cfilt3-mv = <1800>;
358
359 qcom,cdc-micbias1-cfilt-sel = <0x0>;
360 qcom,cdc-micbias2-cfilt-sel = <0x1>;
361 qcom,cdc-micbias3-cfilt-sel = <0x2>;
362
363 qcom,cdc-mclk-clk-rate = <9600000>;
364 qcom,cdc-slim-ifd = "tapan-slim-ifd";
365 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
366 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]367 };
368
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]369 qcom,msm-adsp-loader {
370 compatible = "qcom,adsp-loader";
371 qcom,adsp-state = <0>;
372 };
373
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]374 sound {
375 compatible = "qcom,msm8226-audio-tapan";
376 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]377 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]378 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
379 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
380 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
381 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
382 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]383 };
384
385 qcom,msm-pcm {
386 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]387 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]388 };
389
390 qcom,msm-pcm-routing {
391 compatible = "qcom,msm-pcm-routing";
392 };
393
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]394 qcom,msm-pcm-low-latency {
395 compatible = "qcom,msm-pcm-dsp";
396 qcom,msm-pcm-dsp-id = <1>;
397 qcom,msm-pcm-low-latency;
398 };
399
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]400 qcom,msm-pcm-lpa {
401 compatible = "qcom,msm-pcm-lpa";
402 };
403
404 qcom,msm-compr-dsp {
405 compatible = "qcom,msm-compr-dsp";
406 };
407
408 qcom,msm-voip-dsp {
409 compatible = "qcom,msm-voip-dsp";
410 };
411
412 qcom,msm-pcm-voice {
413 compatible = "qcom,msm-pcm-voice";
414 };
415
416 qcom,msm-stub-codec {
417 compatible = "qcom,msm-stub-codec";
418 };
419
420 qcom,msm-dai-fe {
421 compatible = "qcom,msm-dai-fe";
422 };
423
424 qcom,msm-pcm-afe {
425 compatible = "qcom,msm-pcm-afe";
426 };
427
428 qcom,msm-dai-q6-hdmi {
429 compatible = "qcom,msm-dai-q6-hdmi";
430 qcom,msm-dai-q6-dev-id = <8>;
431 };
432
433 qcom,msm-dai-q6 {
434 compatible = "qcom,msm-dai-q6";
435 qcom,msm-dai-q6-sb-0-rx {
436 compatible = "qcom,msm-dai-q6-dev";
437 qcom,msm-dai-q6-dev-id = <16384>;
438 };
439
440 qcom,msm-dai-q6-sb-0-tx {
441 compatible = "qcom,msm-dai-q6-dev";
442 qcom,msm-dai-q6-dev-id = <16385>;
443 };
444
445 qcom,msm-dai-q6-sb-1-rx {
446 compatible = "qcom,msm-dai-q6-dev";
447 qcom,msm-dai-q6-dev-id = <16386>;
448 };
449
450 qcom,msm-dai-q6-sb-1-tx {
451 compatible = "qcom,msm-dai-q6-dev";
452 qcom,msm-dai-q6-dev-id = <16387>;
453 };
454
455 qcom,msm-dai-q6-sb-3-rx {
456 compatible = "qcom,msm-dai-q6-dev";
457 qcom,msm-dai-q6-dev-id = <16390>;
458 };
459
460 qcom,msm-dai-q6-sb-3-tx {
461 compatible = "qcom,msm-dai-q6-dev";
462 qcom,msm-dai-q6-dev-id = <16391>;
463 };
464
465 qcom,msm-dai-q6-sb-4-rx {
466 compatible = "qcom,msm-dai-q6-dev";
467 qcom,msm-dai-q6-dev-id = <16392>;
468 };
469
470 qcom,msm-dai-q6-sb-4-tx {
471 compatible = "qcom,msm-dai-q6-dev";
472 qcom,msm-dai-q6-dev-id = <16393>;
473 };
474
475 qcom,msm-dai-q6-bt-sco-rx {
476 compatible = "qcom,msm-dai-q6-dev";
477 qcom,msm-dai-q6-dev-id = <12288>;
478 };
479
480 qcom,msm-dai-q6-bt-sco-tx {
481 compatible = "qcom,msm-dai-q6-dev";
482 qcom,msm-dai-q6-dev-id = <12289>;
483 };
484
485 qcom,msm-dai-q6-int-fm-rx {
486 compatible = "qcom,msm-dai-q6-dev";
487 qcom,msm-dai-q6-dev-id = <12292>;
488 };
489
490 qcom,msm-dai-q6-int-fm-tx {
491 compatible = "qcom,msm-dai-q6-dev";
492 qcom,msm-dai-q6-dev-id = <12293>;
493 };
494
495 qcom,msm-dai-q6-be-afe-pcm-rx {
496 compatible = "qcom,msm-dai-q6-dev";
497 qcom,msm-dai-q6-dev-id = <224>;
498 };
499
500 qcom,msm-dai-q6-be-afe-pcm-tx {
501 compatible = "qcom,msm-dai-q6-dev";
502 qcom,msm-dai-q6-dev-id = <225>;
503 };
504
505 qcom,msm-dai-q6-afe-proxy-rx {
506 compatible = "qcom,msm-dai-q6-dev";
507 qcom,msm-dai-q6-dev-id = <241>;
508 };
509
510 qcom,msm-dai-q6-afe-proxy-tx {
511 compatible = "qcom,msm-dai-q6-dev";
512 qcom,msm-dai-q6-dev-id = <240>;
513 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]514
515 qcom,msm-dai-q6-incall-record-rx {
516 compatible = "qcom,msm-dai-q6-dev";
517 qcom,msm-dai-q6-dev-id = <32771>;
518 };
519
520 qcom,msm-dai-q6-incall-record-tx {
521 compatible = "qcom,msm-dai-q6-dev";
522 qcom,msm-dai-q6-dev-id = <32772>;
523 };
524
525 qcom,msm-dai-q6-incall-music-rx {
526 compatible = "qcom,msm-dai-q6-dev";
527 qcom,msm-dai-q6-dev-id = <32773>;
528 };
Vicky Sehrawat5ac670f2013-05-17 16:32:13 -0700[diff] [blame]529
530 qcom,msm-dai-q6-incall-music-2-rx {
531 compatible = "qcom,msm-dai-q6-dev";
532 qcom,msm-dai-q6-dev-id = <32770>;
533 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]534 };
535
536 qcom,msm-pcm-hostless {
537 compatible = "qcom,msm-pcm-hostless";
538 };
539
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]540 qcom,msm-pri-auxpcm {
541 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]542 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
543 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
544 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
545 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
546 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
547 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
548 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]549 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]550 };
551
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]552 qcom,wcnss-wlan@fb000000 {
553 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]554 reg = <0xfb000000 0x280000>,
555 <0xf9011008 0x04>;
556 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]557 interrupts = <0 145 0 0 146 0>;
558 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
559
560 qcom,pronto-vddmx-supply = <&pm8226_l3>;
561 qcom,pronto-vddcx-supply = <&pm8226_s1>;
562 qcom,pronto-vddpx-supply = <&pm8226_l6>;
563 qcom,iris-vddxo-supply = <&pm8226_l10>;
564 qcom,iris-vddrfa-supply = <&pm8226_l24>;
565 qcom,iris-vddpa-supply = <&pm8226_l16>;
566 qcom,iris-vdddig-supply = <&pm8226_l24>;
567
568 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]569 qcom,has-pronto-hw;
570 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]571 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]572
573 qcom,msm-adsp-sensors {
574 compatible = "qcom,msm-adsp-sensors";
575 qcom,src-id = <11>;
576 qcom,dst-id = <604>;
577 qcom,ab = <32505856>;
578 qcom,ib = <32505856>;
579 };
580
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]581 qcom,wdt@f9017000 {
582 compatible = "qcom,msm-watchdog";
583 reg = <0xf9017000 0x1000>;
584 interrupts = <0 3 0>, <0 4 0>;
585 qcom,bark-time = <11000>;
586 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]587 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]588 };
589
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]590 qcom,smem@fa00000 {
591 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]592 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]593 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]594 <0xfc428000 0x4000>;
595 reg-names = "smem", "irq-reg-base", "aux-mem1";
596
597 qcom,smd-modem {
598 compatible = "qcom,smd";
599 qcom,smd-edge = <0>;
600 qcom,smd-irq-offset = <0x8>;
601 qcom,smd-irq-bitmask = <0x1000>;
602 qcom,pil-string = "modem";
603 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]604 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]605
606 qcom,smsm-modem {
607 compatible = "qcom,smsm";
608 qcom,smsm-edge = <0>;
609 qcom,smsm-irq-offset = <0x8>;
610 qcom,smsm-irq-bitmask = <0x2000>;
611 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]612 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]613
614 qcom,smd-adsp {
615 compatible = "qcom,smd";
616 qcom,smd-edge = <1>;
617 qcom,smd-irq-offset = <0x8>;
618 qcom,smd-irq-bitmask = <0x100>;
619 qcom,pil-string = "adsp";
620 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]621 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]622
623 qcom,smsm-adsp {
624 compatible = "qcom,smsm";
625 qcom,smsm-edge = <1>;
626 qcom,smsm-irq-offset = <0x8>;
627 qcom,smsm-irq-bitmask = <0x200>;
628 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]629 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]630
631 qcom,smd-wcnss {
632 compatible = "qcom,smd";
633 qcom,smd-edge = <6>;
634 qcom,smd-irq-offset = <0x8>;
635 qcom,smd-irq-bitmask = <0x20000>;
636 qcom,pil-string = "wcnss";
637 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]638 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]639
640 qcom,smsm-wcnss {
641 compatible = "qcom,smsm";
642 qcom,smsm-edge = <6>;
643 qcom,smsm-irq-offset = <0x8>;
644 qcom,smsm-irq-bitmask = <0x80000>;
645 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]646 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]647
648 qcom,smd-rpm {
649 compatible = "qcom,smd";
650 qcom,smd-edge = <15>;
651 qcom,smd-irq-offset = <0x8>;
652 qcom,smd-irq-bitmask = <0x1>;
653 interrupts = <0 168 1>;
654 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]655 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]656 };
657
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]658 rpm_bus: qcom,rpm-smd {
659 compatible = "qcom,rpm-smd";
660 rpm-channel-name = "rpm_requests";
661 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]662 };
663
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]664 qcom,bcl {
665 compatible = "qcom,bcl";
666 };
667
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]668 sdcc1: qcom,sdcc@f9824000 {
669 cell-index = <1>; /* SDC1 eMMC slot */
670 compatible = "qcom,msm-sdcc";
671
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]672 reg = <0xf9824000 0x800>,
673 <0xf9824800 0x100>,
674 <0xf9804000 0x7000>;
675 reg-names = "core_mem", "dml_mem", "bam_mem";
676 interrupts = <0 123 0>, <0 137 0>;
677 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]678
679 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]680
681 qcom,msm-bus,name = "sdcc1";
682 qcom,msm-bus,num-cases = <8>;
683 qcom,msm-bus,num-paths = <1>;
684 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
685 <78 512 1600 3200>, /* 400 KB/s*/
686 <78 512 80000 160000>, /* 20 MB/s */
687 <78 512 100000 200000>, /* 25 MB/s */
688 <78 512 200000 400000>, /* 50 MB/s */
689 <78 512 400000 800000>, /* 100 MB/s */
690 <78 512 400000 800000>, /* 200 MB/s */
691 <78 512 2048000 4096000>; /* Max. bandwidth */
692 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
693 100000000 200000000 4294967295>;
694
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]695 status = "disabled";
696 };
697
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]698 sdhc_1: sdhci@f9824900 {
699 compatible = "qcom,sdhci-msm";
700 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
701 reg-names = "hc_mem", "core_mem";
702
703 interrupts = <0 123 0>, <0 138 0>;
704 interrupt-names = "hc_irq", "pwr_irq";
705
706 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]707
708 qcom,msm-bus,name = "sdhc1";
709 qcom,msm-bus,num-cases = <8>;
710 qcom,msm-bus,num-paths = <1>;
711 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
712 <78 512 1600 3200>, /* 400 KB/s*/
713 <78 512 80000 160000>, /* 20 MB/s */
714 <78 512 100000 200000>, /* 25 MB/s */
715 <78 512 200000 400000>, /* 50 MB/s */
716 <78 512 400000 800000>, /* 100 MB/s */
717 <78 512 400000 800000>, /* 200 MB/s */
718 <78 512 2048000 4096000>; /* Max. bandwidth */
719 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
720 100000000 200000000 4294967295>;
721
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]722 status = "disabled";
723 };
724
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]725 sdcc2: qcom,sdcc@f98a4000 {
726 cell-index = <2>; /* SDC2 SD card slot */
727 compatible = "qcom,msm-sdcc";
728
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]729 reg = <0xf98a4000 0x800>,
730 <0xf98a4800 0x100>,
731 <0xf9884000 0x7000>;
732 reg-names = "core_mem", "dml_mem", "bam_mem";
733 interrupts = <0 125 0>, <0 220 0>;
734 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]735
736 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]737
738 qcom,msm-bus,name = "sdcc2";
739 qcom,msm-bus,num-cases = <8>;
740 qcom,msm-bus,num-paths = <1>;
741 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
742 <81 512 1600 3200>, /* 400 KB/s*/
743 <81 512 80000 160000>, /* 20 MB/s */
744 <81 512 100000 200000>, /* 25 MB/s */
745 <81 512 200000 400000>, /* 50 MB/s */
746 <81 512 400000 800000>, /* 100 MB/s */
747 <81 512 400000 800000>, /* 200 MB/s */
748 <81 512 2048000 4096000>; /* Max. bandwidth */
749 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
750 100000000 200000000 4294967295>;
751
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]752 status = "disabled";
753 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]754
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]755 sdhc_2: sdhci@f98a4900 {
756 compatible = "qcom,sdhci-msm";
757 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
758 reg-names = "hc_mem", "core_mem";
759
760 interrupts = <0 125 0>, <0 221 0>;
761 interrupt-names = "hc_irq", "pwr_irq";
762
763 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]764
765 qcom,msm-bus,name = "sdhc2";
766 qcom,msm-bus,num-cases = <8>;
767 qcom,msm-bus,num-paths = <1>;
768 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
769 <81 512 1600 3200>, /* 400 KB/s*/
770 <81 512 80000 160000>, /* 20 MB/s */
771 <81 512 100000 200000>, /* 25 MB/s */
772 <81 512 200000 400000>, /* 50 MB/s */
773 <81 512 400000 800000>, /* 100 MB/s */
774 <81 512 400000 800000>, /* 200 MB/s */
775 <81 512 2048000 4096000>; /* Max. bandwidth */
776 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
777 100000000 200000000 4294967295>;
778
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]779 status = "disabled";
780 };
781
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]782 sdcc3: qcom,sdcc@f9864000 {
783 cell-index = <3>;
784 compatible = "qcom,msm-sdcc";
785 reg = <0xf9864000 0x800>,
786 <0xf9864800 0x100>,
787 <0xf9844000 0x7000>;
788 reg-names = "core_mem", "dml_mem", "bam_mem";
789
790 qcom,bus-width = <4>;
791 gpios = <&msmgpio 44 0>, /* CLK */
792 <&msmgpio 43 0>, /* CMD */
793 <&msmgpio 42 0>, /* DATA0 */
794 <&msmgpio 41 0>, /* DATA1 */
795 <&msmgpio 40 0>, /* DATA2 */
796 <&msmgpio 39 0>; /* DATA3 */
797 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
798
799 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
800
801 qcom,msm-bus,name = "sdcc3";
802 qcom,msm-bus,num-cases = <8>;
803 qcom,msm-bus,num-paths = <1>;
804 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
805 <79 512 1600 3200>, /* 400 KB/s*/
806 <79 512 80000 160000>, /* 20 MB/s */
807 <79 512 100000 200000>, /* 25 MB/s */
808 <79 512 200000 400000>, /* 50 MB/s */
809 <79 512 400000 800000>, /* 100 MB/s */
810 <79 512 400000 800000>, /* 200 MB/s */
811 <79 512 2048000 4096000>; /* Max. bandwidth */
812 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
813 100000000 200000000 4294967295>;
814
815 #address-cells = <0>;
816 interrupt-parent = <&sdcc3>;
817 interrupts = <0 1 2>;
818 #interrupt-cells = <1>;
819 interrupt-map-mask = <0xffffffff>;
820 interrupt-map = <0 &intc 0 127 0
821 1 &intc 0 223 0
822 2 &msmgpio 41 0x8>;
823 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
824
825 status = "disabled";
826 };
827
828 sdhc_3: sdhci@f9864900 {
829 compatible = "qcom,sdhci-msm";
830 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
831 reg-names = "hc_mem", "core_mem";
832
833 qcom,bus-width = <4>;
834 gpios = <&msmgpio 44 0>, /* CLK */
835 <&msmgpio 43 0>, /* CMD */
836 <&msmgpio 42 0>, /* DATA0 */
837 <&msmgpio 41 0>, /* DATA1 */
838 <&msmgpio 40 0>, /* DATA2 */
839 <&msmgpio 39 0>; /* DATA3 */
840 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
841
842 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
843
844 qcom,msm-bus,name = "sdhc3";
845 qcom,msm-bus,num-cases = <8>;
846 qcom,msm-bus,num-paths = <1>;
847 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
848 <79 512 1600 3200>, /* 400 KB/s*/
849 <79 512 80000 160000>, /* 20 MB/s */
850 <79 512 100000 200000>, /* 25 MB/s */
851 <79 512 200000 400000>, /* 50 MB/s */
852 <79 512 400000 800000>, /* 100 MB/s */
853 <79 512 400000 800000>, /* 200 MB/s */
854 <79 512 2048000 4096000>; /* Max. bandwidth */
855 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
856 100000000 200000000 4294967295>;
857
858 #address-cells = <0>;
859 interrupt-parent = <&sdhc_3>;
860 interrupts = <0 1 2>;
861 #interrupt-cells = <1>;
862 interrupt-map-mask = <0xffffffff>;
863 interrupt-map = <0 &intc 0 127 0
864 1 &intc 0 224 0
865 2 &msmgpio 41 0x8>;
866 interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
867
868 status = "disabled";
869 };
870
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]871 spmi_bus: qcom,spmi@fc4c0000 {
872 cell-index = <0>;
873 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]874 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]875 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]876 <0Xfc4cb000 0x1000>,
877 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]878 /* 190,ee0_krait_hlos_spmi_periph_irq */
879 /* 187,channel_0_krait_hlos_trans_done_irq */
880 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]881 qcom,pmic-arb-ee = <0>;
882 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]883 };
884
Madan Mohan Koyyalamudi2d7c6f52013-06-19 17:49:45 -0700[diff] [blame]885 i2c@f9925000 { /* BLSP-1 QUP-3 */
886 cell-index = <2>;
887 compatible = "qcom,i2c-qup";
888 reg = <0xf9925000 0x1000>;
889 #address-cells = <1>;
890 #size-cells = <0>;
891 reg-names = "qup_phys_addr";
892 interrupts = <0 97 0>;
893 interrupt-names = "qup_err_intr";
894 qcom,i2c-bus-freq = <400000>;
895 qcom,i2c-src-freq = <19200000>;
896 };
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]897 i2c@f9926000 { /* BLSP-1 QUP-4 */
898 cell-index = <0>;
899 compatible = "qcom,i2c-qup";
900 reg = <0xf9926000 0x1000>;
901 #address-cells = <1>;
902 #size-cells = <0>;
903 reg-names = "qup_phys_addr";
904 interrupts = <0 98 0>;
905 interrupt-names = "qup_err_intr";
906 qcom,i2c-bus-freq = <100000>;
907 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]908
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]909 i2c@f9927000 { /* BLSP1 QUP5 */
910 cell-index = <5>;
911 compatible = "qcom,i2c-qup";
912 #address-cells = <1>;
913 #size-cells = <0>;
914 reg-names = "qup_phys_addr";
915 reg = <0xf9927000 0x1000>;
916 interrupt-names = "qup_err_intr";
917 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]918 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]919 qcom,i2c-src-freq = <19200000>;
Amy Malochebf346092013-07-31 12:57:28 -0700[diff] [blame]920 qcom,sda-gpio = <&msmgpio 18 0>;
921 qcom,scl-gpio = <&msmgpio 19 0>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]922 };
923
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]924 qcom,acpuclk@f9011050 {
925 compatible = "qcom,acpuclk-a7";
Patrick Daly4fd80f42013-06-18 11:09:15 -0700[diff] [blame]926 reg = <0xf9011050 0x8>;
927 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]928 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]929 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]930
931 qcom,ocmem@fdd00000 {
932 compatible = "qcom,msm-ocmem";
933 reg = <0xfdd00000 0x2000>,
934 <0xfdd02000 0x2000>,
935 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]936 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]937 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
938 interrupts = <0 76 0 0 77 0>;
939 interrupt-names = "ocmem_irq", "dm_irq";
940 qcom,ocmem-num-regions = <0x1>;
941 qcom,ocmem-num-macros = <0x2>;
942 qcom,resource-type = <0x706d636f>;
943 #address-cells = <1>;
944 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]945 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]946
947 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]948 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]949 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]950 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]951 };
952 };
953
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]954 qcom,venus@fdce0000 {
955 compatible = "qcom,pil-venus";
956 reg = <0xfdce0000 0x4000>,
957 <0xfdc80000 0x400>;
958 reg-names = "wrapper_base", "vbif_base";
959 vdd-supply = <&gdsc_venus>;
960
961 qcom,firmware-name = "venus";
962 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]963
964 qcom,pronto@fb21b000 {
965 compatible = "qcom,pil-pronto";
966 reg = <0xfb21b000 0x3000>,
967 <0xfc401700 0x4>,
968 <0xfd485300 0xc>;
969 reg-names = "pmu_base", "clk_base", "halt_base";
970 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]971 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]972
973 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]974
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]975 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]976 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]977 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]978 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]979
980 /* GPIO output to wcnss */
981 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]982 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]983
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]984 qcom,iris-fm {
985 compatible = "qcom,iris_fm";
986 };
987
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]988 qcom,lpass@fe200000 {
989 compatible = "qcom,pil-q6v5-lpass";
990 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]991 <0xfd485100 0x00010>,
992 <0xfc4016c0 0x00004>;
993 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]994 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]995 interrupts = <0 162 1>;
996
997 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]998
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]999 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1000 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]1001 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]1002 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1003
1004 /* GPIO output to lpass */
1005 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]1006 };
1007
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1008 qcom,mss@fc880000 {
1009 compatible = "qcom,pil-q6v5-mss";
1010 reg = <0xfc880000 0x100>,
1011 <0xfd485000 0x400>,
1012 <0xfc820000 0x020>,
1013 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1014 <0xfd485194 0x4>;
1015 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]1016 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1017
1018 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1019 vdd_cx-supply = <&pm8226_s1_corner>;
1020 vdd_mx-supply = <&pm8226_l3>;
1021 vdd_pll-supply = <&pm8226_l8>;
1022 qcom,vdd_pll = <1800000>;
1023
1024 qcom,is-loadable;
1025 qcom,firmware-name = "mba";
1026 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1027
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1028 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1029 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]1030 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1031 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]1032 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1033
1034 /* GPIO output to mss */
1035 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1036 };
1037
Neeti Desaif82314e2013-08-09 15:59:54 -0700[diff] [blame]1038 memory_hole: qcom,msm-mem-hole {
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1039 compatible = "qcom,msm-mem-hole";
Neeti Desai183b33d2013-08-09 14:58:38 -0700[diff] [blame]1040 qcom,memblock-remove = <0x08400000 0x4000000
1041 0x0d200000 0x2300000
1042 0x0fa00000 0x500000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1043 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1044
1045 tsens: tsens@fc4a8000 {
1046 compatible = "qcom,msm-tsens";
1047 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700[diff] [blame]1048 <0xfc4bc000 0x1000>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1049 reg-names = "tsens_physical", "tsens_eeprom_physical";
1050 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]1051 qcom,sensors = <4>;
1052 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1053 qcom,calib-mode = "fuse_map2";
1054 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1055
1056 qcom,msm-thermal {
1057 compatible = "qcom,msm-thermal";
1058 qcom,sensor-id = <0>;
1059 qcom,poll-ms = <250>;
1060 qcom,limit-temp = <60>;
1061 qcom,temp-hysteresis = <10>;
1062 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]1063 qcom,freq-control-mask = <0xf>;
Jennifer Liu003438d2013-06-21 11:24:20 -0700[diff] [blame]1064 qcom,core-limit-temp = <80>;
1065 qcom,core-temp-hysteresis = <10>;
1066 qcom,core-control-mask = <0xe>;
Jennifer Liu53bb5642013-06-26 10:42:42 -0700[diff] [blame]1067 qcom,vdd-restriction-temp = <5>;
1068 qcom,vdd-restriction-temp-hysteresis = <10>;
1069 vdd-dig-supply = <&pm8226_s1_floor_corner>;
1070
1071 qcom,vdd-dig-rstr{
1072 qcom,vdd-rstr-reg = "vdd-dig";
1073 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
1074 qcom,min-level = <1>; /* No Request */
1075 };
1076
1077 qcom,vdd-apps-rstr{
1078 qcom,vdd-rstr-reg = "vdd-apps";
1079 qcom,levels = <600000 787200 998400>;
1080 qcom,freq-req;
1081 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1082 };
1083
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1084 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
1085 compatible = "qcom,spi-qup-v2";
1086 #address-cells = <1>;
1087 #size-cells = <0>;
1088 reg-names = "spi_physical", "spi_bam_physical";
1089 reg = <0xf9923000 0x1000>,
1090 <0xf9904000 0xF000>;
1091 interrupt-names = "spi_irq", "spi_bam_irq";
1092 interrupts = <0 95 0>, <0 238 0>;
1093 spi-max-frequency = <19200000>;
1094
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1095 qcom,gpio-mosi = <&msmgpio 0 0>;
1096 qcom,gpio-miso = <&msmgpio 1 0>;
1097 qcom,gpio-clk = <&msmgpio 3 0>;
1098 qcom,gpio-cs0 = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1099
1100 qcom,infinite-mode = <0>;
1101 qcom,use-bam;
1102 qcom,ver-reg-exists;
1103 qcom,bam-consumer-pipe-index = <12>;
1104 qcom,bam-producer-pipe-index = <13>;
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1105 qcom,master-id = <86>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1106 };
1107
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]1108 qcom,bam_dmux@fc834000 {
1109 compatible = "qcom,bam_dmux";
1110 reg = <0xfc834000 0x7000>;
1111 interrupts = <0 29 1>;
1112 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]1113
1114 qcom,msm-rtb {
1115 compatible = "qcom,msm-rtb";
1116 qcom,memory-reservation-type = "EBI1";
1117 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1118 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1119
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1120 qcom,msm-rng@f9bff000 {
1121 compatible = "qcom,msm-rng";
1122 reg = <0xf9bff000 0x200>;
1123 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]1124 qcom,msm-bus,name = "msm-rng-noc";
1125 qcom,msm-bus,num-cases = <2>;
1126 qcom,msm-bus,num-paths = <1>;
1127 qcom,msm-bus,vectors-KBps =
1128 <1 618 0 0>,
1129 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1130 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1131
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1132 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1133 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1134 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1135 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1136
Pratik Patelf2945ef2013-06-13 23:52:05 -0700[diff] [blame]1137 jtag_fuse: jtagfuse@fc4be024 {
1138 compatible = "qcom,jtag-fuse";
1139 reg = <0xfc4be024 0x8>;
1140 reg-names = "fuse-base";
1141 };
1142
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1143 jtag_mm0: jtagmm@fc33c000 {
1144 compatible = "qcom,jtag-mm";
1145 reg = <0xfc33c000 0x1000>,
1146 <0xfc330000 0x1000>;
1147 reg-names = "etm-base","debug-base";
1148 };
1149
1150 jtag_mm1: jtagmm@fc33d000 {
1151 compatible = "qcom,jtag-mm";
1152 reg = <0xfc33d000 0x1000>,
1153 <0xfc332000 0x1000>;
1154 reg-names = "etm-base","debug-base";
1155 };
1156
1157 jtag_mm2: jtagmm@fc33e000 {
1158 compatible = "qcom,jtag-mm";
1159 reg = <0xfc33e000 0x1000>,
1160 <0xfc334000 0x1000>;
1161 reg-names = "etm-base","debug-base";
1162 };
1163
1164 jtag_mm3: jtagmm@fc33f000 {
1165 compatible = "qcom,jtag-mm";
1166 reg = <0xfc33f000 0x1000>,
1167 <0xfc336000 0x1000>;
1168 reg-names = "etm-base","debug-base";
1169 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]1170
1171 qcom,ipc-spinlock@fd484000 {
1172 compatible = "qcom,ipc-spinlock-sfpb";
1173 reg = <0xfd484000 0x400>;
1174 qcom,num-locks = <8>;
1175 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]1176
1177 qcom,qseecom@d980000 {
1178 compatible = "qcom,qseecom";
1179 reg = <0xd980000 0x256000>;
1180 reg-names = "secapp-region";
1181 qcom,disk-encrypt-pipe-pair = <2>;
1182 qcom,hlos-ce-hw-instance = <0>;
1183 qcom,qsee-ce-hw-instance = <0>;
1184 qcom,msm-bus,name = "qseecom-noc";
1185 qcom,msm-bus,num-cases = <4>;
1186 qcom,msm-bus,active-only = <0>;
1187 qcom,msm-bus,num-paths = <1>;
1188 qcom,msm-bus,vectors-KBps =
1189 <55 512 0 0>,
1190 <55 512 3936000 393600>,
1191 <55 512 3936000 393600>,
1192 <55 512 3936000 393600>;
1193 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1194
1195 qcom,qcrypto@fd404000 {
1196 compatible = "qcom,qcrypto";
1197 reg = <0xfd400000 0x20000>,
1198 <0xfd404000 0x8000>;
1199 reg-names = "crypto-base","crypto-bam-base";
1200 interrupts = <0 207 0>;
1201 qcom,bam-pipe-pair = <2>;
1202 qcom,ce-hw-instance = <0>;
1203 qcom,ce-hw-shared;
1204 qcom,msm-bus,name = "qcrypto-noc";
1205 qcom,msm-bus,num-cases = <2>;
1206 qcom,msm-bus,active-only = <0>;
1207 qcom,msm-bus,num-paths = <1>;
1208 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1209 <55 512 0 0>,
1210 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1211 };
1212
1213 qcom,qcedev@fd400000 {
1214 compatible = "qcom,qcedev";
1215 reg = <0xfd400000 0x20000>,
1216 <0xfd404000 0x8000>;
1217 reg-names = "crypto-base","crypto-bam-base";
1218 interrupts = <0 207 0>;
1219 qcom,bam-pipe-pair = <1>;
1220 qcom,ce-hw-instance = <0>;
1221 qcom,ce-hw-shared;
1222 qcom,msm-bus,name = "qcedev-noc";
1223 qcom,msm-bus,num-cases = <2>;
1224 qcom,msm-bus,active-only = <0>;
1225 qcom,msm-bus,num-paths = <1>;
1226 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1227 <55 512 0 0>,
1228 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1229 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1230
1231 cpu-pmu {
1232 compatible = "arm,cortex-a7-pmu";
1233 qcom,irq-is-percpu;
1234 interrupts = <1 7 0xf00>;
1235 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1236};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1237
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1238&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1239 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1240 status = "ok";
1241};
1242
1243&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1244 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1245 status = "ok";
1246};
1247
1248&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1249 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1250 status = "ok";
1251};
1252
1253&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1254 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1255 status = "ok";
1256};
1257
1258&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1259 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1260 status = "ok";
1261};
1262
1263&gdsc_usb_hsic {
1264 status = "ok";
1265};
1266
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1267/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1268/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1269/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1270
1271&pm8226_vadc {
1272 chan@0 {
1273 label = "usb_in";
1274 reg = <0>;
1275 qcom,decimation = <0>;
1276 qcom,pre-div-channel-scaling = <4>;
1277 qcom,calibration-type = "absolute";
1278 qcom,scale-function = <0>;
1279 qcom,hw-settle-time = <0>;
1280 qcom,fast-avg-setup = <0>;
1281 };
1282
1283 chan@2 {
1284 label = "vchg_sns";
1285 reg = <2>;
1286 qcom,decimation = <0>;
1287 qcom,pre-div-channel-scaling = <3>;
1288 qcom,calibration-type = "absolute";
1289 qcom,scale-function = <0>;
1290 qcom,hw-settle-time = <0>;
1291 qcom,fast-avg-setup = <0>;
1292 };
1293
1294 chan@5 {
1295 label = "vcoin";
1296 reg = <5>;
1297 qcom,decimation = <0>;
1298 qcom,pre-div-channel-scaling = <1>;
1299 qcom,calibration-type = "absolute";
1300 qcom,scale-function = <0>;
1301 qcom,hw-settle-time = <0>;
1302 qcom,fast-avg-setup = <0>;
1303 };
1304
1305 chan@6 {
1306 label = "vbat_sns";
1307 reg = <6>;
1308 qcom,decimation = <0>;
1309 qcom,pre-div-channel-scaling = <1>;
1310 qcom,calibration-type = "absolute";
1311 qcom,scale-function = <0>;
1312 qcom,hw-settle-time = <0>;
1313 qcom,fast-avg-setup = <0>;
1314 };
1315
1316 chan@7 {
1317 label = "vph_pwr";
1318 reg = <7>;
1319 qcom,decimation = <0>;
1320 qcom,pre-div-channel-scaling = <1>;
1321 qcom,calibration-type = "absolute";
1322 qcom,scale-function = <0>;
1323 qcom,hw-settle-time = <0>;
1324 qcom,fast-avg-setup = <0>;
1325 };
1326
1327 chan@30 {
1328 label = "batt_therm";
1329 reg = <0x30>;
1330 qcom,decimation = <0>;
1331 qcom,pre-div-channel-scaling = <0>;
1332 qcom,calibration-type = "ratiometric";
1333 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1334 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1335 qcom,fast-avg-setup = <0>;
1336 };
1337
1338 chan@31 {
1339 label = "batt_id";
1340 reg = <0x31>;
1341 qcom,decimation = <0>;
1342 qcom,pre-div-channel-scaling = <0>;
1343 qcom,calibration-type = "ratiometric";
1344 qcom,scale-function = <0>;
1345 qcom,hw-settle-time = <2>;
1346 qcom,fast-avg-setup = <0>;
1347 };
1348
1349 chan@b2 {
1350 label = "xo_therm_pu2";
1351 reg = <0xb2>;
1352 qcom,decimation = <0>;
1353 qcom,pre-div-channel-scaling = <0>;
1354 qcom,calibration-type = "ratiometric";
1355 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1356 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1357 qcom,fast-avg-setup = <0>;
1358 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1359
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1360 chan@39 {
1361 label = "usb_id_nopull";
1362 reg = <0x39>;
1363 qcom,decimation = <0>;
1364 qcom,pre-div-channel-scaling = <0>;
1365 qcom,calibration-type = "ratiometric";
1366 qcom,scale-function = <0>;
1367 qcom,hw-settle-time = <2>;
1368 qcom,fast-avg-setup = <0>;
1369 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1370};
1371
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1372&pm8226_adc_tm {
1373 /* Channel Node */
1374 chan@30 {
1375 label = "batt_therm";
1376 reg = <0x30>;
1377 qcom,decimation = <0>;
1378 qcom,pre-div-channel-scaling = <0>;
1379 qcom,calibration-type = "ratiometric";
1380 qcom,scale-function = <1>;
1381 qcom,hw-settle-time = <2>;
1382 qcom,fast-avg-setup = <3>;
1383 qcom,btm-channel-number = <0x48>;
1384 };
1385
1386 chan@8 {
1387 label = "die_temp";
1388 reg = <8>;
1389 qcom,decimation = <0>;
1390 qcom,pre-div-channel-scaling = <0>;
1391 qcom,calibration-type = "absolute";
1392 qcom,scale-function = <3>;
1393 qcom,hw-settle-time = <0>;
1394 qcom,fast-avg-setup = <3>;
1395 qcom,btm-channel-number = <0x68>;
1396 };
1397
1398 chan@6 {
1399 label = "vbat_sns";
1400 reg = <6>;
1401 qcom,decimation = <0>;
1402 qcom,pre-div-channel-scaling = <1>;
1403 qcom,calibration-type = "absolute";
1404 qcom,scale-function = <0>;
1405 qcom,hw-settle-time = <0>;
1406 qcom,fast-avg-setup = <3>;
1407 qcom,btm-channel-number = <0x70>;
1408 };
1409
1410 chan@14 {
1411 label = "pa_therm0";
1412 reg = <0x14>;
1413 qcom,decimation = <0>;
1414 qcom,pre-div-channel-scaling = <0>;
1415 qcom,calibration-type = "ratiometric";
1416 qcom,scale-function = <2>;
1417 qcom,hw-settle-time = <2>;
1418 qcom,fast-avg-setup = <0>;
1419 qcom,btm-channel-number = <0x78>;
1420 qcom,thermal-node;
1421 };
1422
1423 chan@17 {
1424 label = "pa_therm1";
1425 reg = <0x17>;
1426 qcom,decimation = <0>;
1427 qcom,pre-div-channel-scaling = <0>;
1428 qcom,calibration-type = "ratiometric";
1429 qcom,scale-function = <2>;
1430 qcom,hw-settle-time = <2>;
1431 qcom,fast-avg-setup = <0>;
1432 qcom,btm-channel-number = <0x80>;
1433 qcom,thermal-node;
1434 };
1435};
1436
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1437&pm8226_chg {
1438 status = "ok";
1439
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1440 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1441 status = "ok";
1442 };
1443
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1444 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1445 status = "ok";
1446 };
1447
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1448 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1449 status = "ok";
1450 };
1451
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1452 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1453 status = "ok";
1454 };
1455
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1456 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1457 status = "ok";
1458 };
1459
1460 qcom,chg-misc@1600 {
1461 status = "ok";
1462 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1463};