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Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -07001/*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
19 */
20
21#ifndef __DMAR_H__
22#define __DMAR_H__
23
24#include <linux/acpi.h>
25#include <linux/types.h>
Keshavamurthy, Anil Sba395922007-10-21 16:41:49 -070026#include <linux/msi.h>
Suresh Siddha1531a6a2009-03-16 17:04:57 -070027#include <linux/irqreturn.h>
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070028
Andrew Morton6eea69d2011-10-31 17:06:29 -070029struct acpi_dmar_header;
30
Suresh Siddha41750d32011-08-23 17:05:18 -070031/* DMAR Flags */
32#define DMAR_INTR_REMAP 0x1
33#define DMAR_X2APIC_OPT_OUT 0x2
34
Keshavamurthy, Anil Sba395922007-10-21 16:41:49 -070035struct intel_iommu;
Suresh Siddhad3f13812011-08-23 17:05:25 -070036#ifdef CONFIG_DMAR_TABLE
Suresh Siddha41750d32011-08-23 17:05:18 -070037extern struct acpi_table_header *dmar_tbl;
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070038struct dmar_drhd_unit {
39 struct list_head list; /* list of drhd units */
Suresh Siddha1886e8a2008-07-10 11:16:37 -070040 struct acpi_dmar_header *hdr; /* ACPI header */
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070041 u64 reg_base_addr; /* register base address*/
42 struct pci_dev **devices; /* target device array */
43 int devices_cnt; /* target device count */
David Woodhouse276dbf92009-04-04 01:45:37 +010044 u16 segment; /* PCI domain */
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070045 u8 ignored:1; /* ignore drhd */
46 u8 include_all:1;
47 struct intel_iommu *iommu;
48};
49
Suresh Siddha2ae21012008-07-10 11:16:43 -070050extern struct list_head dmar_drhd_units;
51
52#define for_each_drhd_unit(drhd) \
53 list_for_each_entry(drhd, &dmar_drhd_units, list)
54
David Woodhouse8f912ba2009-04-03 15:19:32 +010055#define for_each_active_iommu(i, drhd) \
56 list_for_each_entry(drhd, &dmar_drhd_units, list) \
57 if (i=drhd->iommu, drhd->ignored) {} else
58
59#define for_each_iommu(i, drhd) \
60 list_for_each_entry(drhd, &dmar_drhd_units, list) \
61 if (i=drhd->iommu, 0) {} else
62
Suresh Siddha2ae21012008-07-10 11:16:43 -070063extern int dmar_table_init(void);
Suresh Siddha2ae21012008-07-10 11:16:43 -070064extern int dmar_dev_scope_init(void);
65
66/* Intel IOMMU detection */
Konrad Rzeszutek Wilk480125b2010-08-26 13:57:57 -040067extern int detect_intel_iommu(void);
Suresh Siddha9d783ba2009-03-16 17:04:55 -070068extern int enable_drhd_fault_handling(void);
Suresh Siddha2ae21012008-07-10 11:16:43 -070069
Suresh Siddha2ae21012008-07-10 11:16:43 -070070extern int parse_ioapics_under_ir(void);
71extern int alloc_iommu(struct dmar_drhd_unit *);
72#else
Konrad Rzeszutek Wilk480125b2010-08-26 13:57:57 -040073static inline int detect_intel_iommu(void)
Suresh Siddha2ae21012008-07-10 11:16:43 -070074{
Konrad Rzeszutek Wilk480125b2010-08-26 13:57:57 -040075 return -ENODEV;
Suresh Siddha2ae21012008-07-10 11:16:43 -070076}
77
78static inline int dmar_table_init(void)
79{
80 return -ENODEV;
81}
Suresh Siddha29b61be2009-03-16 17:05:02 -070082static inline int enable_drhd_fault_handling(void)
83{
84 return -1;
85}
Suresh Siddhad3f13812011-08-23 17:05:25 -070086#endif /* !CONFIG_DMAR_TABLE */
Suresh Siddha2ae21012008-07-10 11:16:43 -070087
Suresh Siddha2ae21012008-07-10 11:16:43 -070088struct irte {
89 union {
90 struct {
91 __u64 present : 1,
92 fpd : 1,
93 dst_mode : 1,
94 redir_hint : 1,
95 trigger_mode : 1,
96 dlvry_mode : 3,
97 avail : 4,
98 __reserved_1 : 4,
99 vector : 8,
100 __reserved_2 : 8,
101 dest_id : 32;
102 };
103 __u64 low;
104 };
105
106 union {
107 struct {
108 __u64 sid : 16,
109 sq : 2,
110 svt : 2,
111 __reserved_3 : 44;
112 };
113 __u64 high;
114 };
115};
Thomas Gleixner423f0852010-10-10 11:39:09 +0200116
Suresh Siddhad3f13812011-08-23 17:05:25 -0700117#ifdef CONFIG_IRQ_REMAP
Suresh Siddha29b61be2009-03-16 17:05:02 -0700118extern int intr_remapping_enabled;
Weidong Han93758232009-04-17 16:42:14 +0800119extern int intr_remapping_supported(void);
Suresh Siddha41750d32011-08-23 17:05:18 -0700120extern int enable_intr_remapping(void);
Fenghua Yub24696b2009-03-27 14:22:44 -0700121extern void disable_intr_remapping(void);
122extern int reenable_intr_remapping(int);
Suresh Siddha29b61be2009-03-16 17:05:02 -0700123
Suresh Siddhab6fcb332008-07-10 11:16:44 -0700124extern int get_irte(int irq, struct irte *entry);
125extern int modify_irte(int irq, struct irte *irte_modified);
126extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
127extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
128 u16 sub_handle);
129extern int map_irq_to_irte_handle(int irq, u16 *sub_handle);
Suresh Siddhab6fcb332008-07-10 11:16:44 -0700130extern int free_irte(int irq);
131
Suresh Siddha75c46fa2008-07-10 11:16:57 -0700132extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
Suresh Siddha89027d32008-07-10 11:16:56 -0700133extern struct intel_iommu *map_ioapic_to_ir(int apic);
Suresh Siddha20f30972009-08-04 12:07:08 -0700134extern struct intel_iommu *map_hpet_to_ir(u8 id);
Weidong Hanf007e992009-05-23 00:41:15 +0800135extern int set_ioapic_sid(struct irte *irte, int apic);
Suresh Siddha20f30972009-08-04 12:07:08 -0700136extern int set_hpet_sid(struct irte *irte, u8 id);
Weidong Hanf007e992009-05-23 00:41:15 +0800137extern int set_msi_sid(struct irte *irte, struct pci_dev *dev);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700138#else
Suresh Siddha29b61be2009-03-16 17:05:02 -0700139static inline int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
140{
141 return -1;
142}
143static inline int modify_irte(int irq, struct irte *irte_modified)
144{
145 return -1;
146}
147static inline int free_irte(int irq)
148{
149 return -1;
150}
151static inline int map_irq_to_irte_handle(int irq, u16 *sub_handle)
152{
153 return -1;
154}
155static inline int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
156 u16 sub_handle)
157{
158 return -1;
159}
160static inline struct intel_iommu *map_dev_to_ir(struct pci_dev *dev)
161{
162 return NULL;
163}
164static inline struct intel_iommu *map_ioapic_to_ir(int apic)
165{
166 return NULL;
167}
Suresh Siddha20f30972009-08-04 12:07:08 -0700168static inline struct intel_iommu *map_hpet_to_ir(unsigned int hpet_id)
169{
170 return NULL;
171}
Weidong Hanf007e992009-05-23 00:41:15 +0800172static inline int set_ioapic_sid(struct irte *irte, int apic)
173{
174 return 0;
175}
Suresh Siddha20f30972009-08-04 12:07:08 -0700176static inline int set_hpet_sid(struct irte *irte, u8 id)
177{
178 return -1;
179}
Weidong Hanf007e992009-05-23 00:41:15 +0800180static inline int set_msi_sid(struct irte *irte, struct pci_dev *dev)
181{
182 return 0;
183}
184
Suresh Siddha2ae21012008-07-10 11:16:43 -0700185#define intr_remapping_enabled (0)
Randy Dunlap4917b282010-11-22 12:48:34 -0800186
Suresh Siddha41750d32011-08-23 17:05:18 -0700187static inline int enable_intr_remapping(void)
Randy Dunlap4917b282010-11-22 12:48:34 -0800188{
189 return -1;
190}
191
192static inline void disable_intr_remapping(void)
193{
194}
195
196static inline int reenable_intr_remapping(int eim)
197{
198 return 0;
199}
Suresh Siddha2ae21012008-07-10 11:16:43 -0700200#endif
201
Suresh Siddha41750d32011-08-23 17:05:18 -0700202enum {
203 IRQ_REMAP_XAPIC_MODE,
204 IRQ_REMAP_X2APIC_MODE,
205};
206
Suresh Siddha2ae21012008-07-10 11:16:43 -0700207/* Can't use the common MSI interrupt functions
208 * since DMAR is not a pci device
209 */
Thomas Gleixner5c2837f2010-09-28 17:15:11 +0200210struct irq_data;
211extern void dmar_msi_unmask(struct irq_data *data);
212extern void dmar_msi_mask(struct irq_data *data);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700213extern void dmar_msi_read(int irq, struct msi_msg *msg);
214extern void dmar_msi_write(int irq, struct msi_msg *msg);
215extern int dmar_set_interrupt(struct intel_iommu *iommu);
Suresh Siddha1531a6a2009-03-16 17:04:57 -0700216extern irqreturn_t dmar_fault(int irq, void *dev_id);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700217extern int arch_setup_dmar_msi(unsigned int irq);
218
Suresh Siddhad3f13812011-08-23 17:05:25 -0700219#ifdef CONFIG_INTEL_IOMMU
Suresh Siddha2ae21012008-07-10 11:16:43 -0700220extern int iommu_detected, no_iommu;
221extern struct list_head dmar_rmrr_units;
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -0700222struct dmar_rmrr_unit {
223 struct list_head list; /* list of rmrr units */
Suresh Siddha1886e8a2008-07-10 11:16:37 -0700224 struct acpi_dmar_header *hdr; /* ACPI header */
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -0700225 u64 base_address; /* reserved base address*/
226 u64 end_address; /* reserved end address */
227 struct pci_dev **devices; /* target devices */
228 int devices_cnt; /* target device count */
229};
230
Keshavamurthy, Anil Sba395922007-10-21 16:41:49 -0700231#define for_each_rmrr_units(rmrr) \
232 list_for_each_entry(rmrr, &dmar_rmrr_units, list)
Yu Zhaoaa5d2b52009-05-18 13:51:34 +0800233
234struct dmar_atsr_unit {
235 struct list_head list; /* list of ATSR units */
236 struct acpi_dmar_header *hdr; /* ACPI header */
237 struct pci_dev **devices; /* target devices */
238 int devices_cnt; /* target device count */
239 u8 include_all:1; /* include all ports */
240};
241
Suresh Siddha318fe7d2011-08-23 17:05:20 -0700242int dmar_parse_rmrr_atsr_dev(void);
243extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
244extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
245extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
246 struct pci_dev ***devices, u16 segment);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700247extern int intel_iommu_init(void);
Suresh Siddhad3f13812011-08-23 17:05:25 -0700248#else /* !CONFIG_INTEL_IOMMU: */
FUJITA Tomonori9d5ce732009-11-10 19:46:16 +0900249static inline int intel_iommu_init(void) { return -ENODEV; }
Suresh Siddha318fe7d2011-08-23 17:05:20 -0700250static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
251{
252 return 0;
253}
254static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
255{
256 return 0;
257}
258static inline int dmar_parse_rmrr_atsr_dev(void)
259{
260 return 0;
261}
Suresh Siddhad3f13812011-08-23 17:05:25 -0700262#endif /* CONFIG_INTEL_IOMMU */
FUJITA Tomonori9d5ce732009-11-10 19:46:16 +0900263
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -0700264#endif /* __DMAR_H__ */