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gerrit-public.fairphone.software / kernel / msm / c8082d344ac4c05932fec1766e5e9ce72cf286ed / . / arch / arm / boot / dts / at91sam9g45.dtsi
blob: faccd4f5aace600794588f2feb794631b3fee212 [file] [log] [blame]
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]32 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
39 memory@70000000 {
40 reg = <0x70000000 0x10000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]56 #interrupt-cells = <2>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 interrupt-parent;
60 reg = <0xfffff000 0x200>;
61 };
62
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame]63 pmc: pmc@fffffc00 {
64 compatible = "atmel,at91rm9200-pmc";
65 reg = <0xfffffc00 0x100>;
66 };
67
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +0800[diff] [blame^]68 rstc@fffffd00 {
69 compatible = "atmel,at91sam9g45-rstc";
70 reg = <0xfffffd00 0x10>;
71 };
72
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +0100[diff] [blame]73 pit: timer@fffffd30 {
74 compatible = "atmel,at91sam9260-pit";
75 reg = <0xfffffd30 0xf>;
76 interrupts = <1 4>;
77 };
78
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]79
80 tcb0: timer@fff7c000 {
81 compatible = "atmel,at91rm9200-tcb";
82 reg = <0xfff7c000 0x100>;
83 interrupts = <18 4>;
84 };
85
86 tcb1: timer@fffd4000 {
87 compatible = "atmel,at91rm9200-tcb";
88 reg = <0xfffd4000 0x100>;
89 interrupts = <18 4>;
90 };
91
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]92 dma: dma-controller@ffffec00 {
93 compatible = "atmel,at91sam9g45-dma";
94 reg = <0xffffec00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]95 interrupts = <21 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]96 };
97
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]98 pioA: gpio@fffff200 {
99 compatible = "atmel,at91rm9200-gpio";
100 reg = <0xfffff200 0x100>;
101 interrupts = <2 4>;
102 #gpio-cells = <2>;
103 gpio-controller;
104 interrupt-controller;
105 };
106
107 pioB: gpio@fffff400 {
108 compatible = "atmel,at91rm9200-gpio";
109 reg = <0xfffff400 0x100>;
110 interrupts = <3 4>;
111 #gpio-cells = <2>;
112 gpio-controller;
113 interrupt-controller;
114 };
115
116 pioC: gpio@fffff600 {
117 compatible = "atmel,at91rm9200-gpio";
118 reg = <0xfffff600 0x100>;
119 interrupts = <4 4>;
120 #gpio-cells = <2>;
121 gpio-controller;
122 interrupt-controller;
123 };
124
125 pioD: gpio@fffff800 {
126 compatible = "atmel,at91rm9200-gpio";
127 reg = <0xfffff800 0x100>;
128 interrupts = <5 4>;
129 #gpio-cells = <2>;
130 gpio-controller;
131 interrupt-controller;
132 };
133
134 pioE: gpio@fffffa00 {
135 compatible = "atmel,at91rm9200-gpio";
136 reg = <0xfffffa00 0x100>;
137 interrupts = <5 4>;
138 #gpio-cells = <2>;
139 gpio-controller;
140 interrupt-controller;
141 };
142
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]143 dbgu: serial@ffffee00 {
144 compatible = "atmel,at91sam9260-usart";
145 reg = <0xffffee00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]146 interrupts = <1 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]147 status = "disabled";
148 };
149
150 usart0: serial@fff8c000 {
151 compatible = "atmel,at91sam9260-usart";
152 reg = <0xfff8c000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]153 interrupts = <7 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]154 atmel,use-dma-rx;
155 atmel,use-dma-tx;
156 status = "disabled";
157 };
158
159 usart1: serial@fff90000 {
160 compatible = "atmel,at91sam9260-usart";
161 reg = <0xfff90000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]162 interrupts = <8 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]163 atmel,use-dma-rx;
164 atmel,use-dma-tx;
165 status = "disabled";
166 };
167
168 usart2: serial@fff94000 {
169 compatible = "atmel,at91sam9260-usart";
170 reg = <0xfff94000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]171 interrupts = <9 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]172 atmel,use-dma-rx;
173 atmel,use-dma-tx;
174 status = "disabled";
175 };
176
177 usart3: serial@fff98000 {
178 compatible = "atmel,at91sam9260-usart";
179 reg = <0xfff98000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]180 interrupts = <10 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]181 atmel,use-dma-rx;
182 atmel,use-dma-tx;
183 status = "disabled";
184 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]185
186 macb0: ethernet@fffbc000 {
187 compatible = "cdns,at32ap7000-macb", "cdns,macb";
188 reg = <0xfffbc000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]189 interrupts = <25 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]190 status = "disabled";
191 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]192 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800[diff] [blame]193
194 nand0: nand@40000000 {
195 compatible = "atmel,at91rm9200-nand";
196 #address-cells = <1>;
197 #size-cells = <1>;
198 reg = <0x40000000 0x10000000
199 0xffffe200 0x200
200 >;
201 atmel,nand-addr-offset = <21>;
202 atmel,nand-cmd-offset = <22>;
203 gpios = <&pioC 8 0
204 &pioC 14 0
205 0
206 >;
207 status = "disabled";
208 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]209 };
Jean-Christophe PLAGNIOL-VILLARD8f24bda2012-02-05 18:32:37 +0800[diff] [blame]210
211 i2c@0 {
212 compatible = "i2c-gpio";
213 gpios = <&pioA 20 0 /* sda */
214 &pioA 21 0 /* scl */
215 >;
216 i2c-gpio,sda-open-drain;
217 i2c-gpio,scl-open-drain;
218 i2c-gpio,delay-us = <5>; /* ~100 kHz */
219 #address-cells = <1>;
220 #size-cells = <0>;
221 status = "disabled";
222 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]223};