blob: 4db36026f82b3f3e622dd0df3289f067ffc3ba07 [file] [log] [blame]
Auke Kok9d5c8242008-01-24 02:22:38 -08001/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
Alexander Duyck86d5d382009-02-06 23:23:12 +00004 Copyright(c) 2007-2009 Intel Corporation.
Auke Kok9d5c8242008-01-24 02:22:38 -08005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#ifndef _E1000_HW_H_
29#define _E1000_HW_H_
30
31#include <linux/types.h>
32#include <linux/delay.h>
33#include <linux/io.h>
34
Auke Kok9d5c8242008-01-24 02:22:38 -080035#include "e1000_regs.h"
36#include "e1000_defines.h"
37
38struct e1000_hw;
39
Alexander Duyck2d064c02008-07-08 15:10:12 -070040#define E1000_DEV_ID_82576 0x10C9
41#define E1000_DEV_ID_82576_FIBER 0x10E6
42#define E1000_DEV_ID_82576_SERDES 0x10E7
Alexander Duyck9eb23412009-03-13 20:42:15 +000043#define E1000_DEV_ID_82576_NS 0x150A
Auke Kok9d5c8242008-01-24 02:22:38 -080044#define E1000_DEV_ID_82575EB_COPPER 0x10A7
45#define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
46#define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
47
48#define E1000_REVISION_2 2
49#define E1000_REVISION_4 4
50
51#define E1000_FUNC_1 1
52
53enum e1000_mac_type {
54 e1000_undefined = 0,
55 e1000_82575,
Alexander Duyck2d064c02008-07-08 15:10:12 -070056 e1000_82576,
Auke Kok9d5c8242008-01-24 02:22:38 -080057 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
58};
59
60enum e1000_media_type {
61 e1000_media_type_unknown = 0,
62 e1000_media_type_copper = 1,
63 e1000_media_type_fiber = 2,
64 e1000_media_type_internal_serdes = 3,
65 e1000_num_media_types
66};
67
68enum e1000_nvm_type {
69 e1000_nvm_unknown = 0,
70 e1000_nvm_none,
71 e1000_nvm_eeprom_spi,
72 e1000_nvm_eeprom_microwire,
73 e1000_nvm_flash_hw,
74 e1000_nvm_flash_sw
75};
76
77enum e1000_nvm_override {
78 e1000_nvm_override_none = 0,
79 e1000_nvm_override_spi_small,
80 e1000_nvm_override_spi_large,
81 e1000_nvm_override_microwire_small,
82 e1000_nvm_override_microwire_large
83};
84
85enum e1000_phy_type {
86 e1000_phy_unknown = 0,
87 e1000_phy_none,
88 e1000_phy_m88,
89 e1000_phy_igp,
90 e1000_phy_igp_2,
91 e1000_phy_gg82563,
92 e1000_phy_igp_3,
93 e1000_phy_ife,
94};
95
96enum e1000_bus_type {
97 e1000_bus_type_unknown = 0,
98 e1000_bus_type_pci,
99 e1000_bus_type_pcix,
100 e1000_bus_type_pci_express,
101 e1000_bus_type_reserved
102};
103
104enum e1000_bus_speed {
105 e1000_bus_speed_unknown = 0,
106 e1000_bus_speed_33,
107 e1000_bus_speed_66,
108 e1000_bus_speed_100,
109 e1000_bus_speed_120,
110 e1000_bus_speed_133,
111 e1000_bus_speed_2500,
112 e1000_bus_speed_5000,
113 e1000_bus_speed_reserved
114};
115
116enum e1000_bus_width {
117 e1000_bus_width_unknown = 0,
118 e1000_bus_width_pcie_x1,
119 e1000_bus_width_pcie_x2,
120 e1000_bus_width_pcie_x4 = 4,
121 e1000_bus_width_pcie_x8 = 8,
122 e1000_bus_width_32,
123 e1000_bus_width_64,
124 e1000_bus_width_reserved
125};
126
127enum e1000_1000t_rx_status {
128 e1000_1000t_rx_status_not_ok = 0,
129 e1000_1000t_rx_status_ok,
130 e1000_1000t_rx_status_undefined = 0xFF
131};
132
133enum e1000_rev_polarity {
134 e1000_rev_polarity_normal = 0,
135 e1000_rev_polarity_reversed,
136 e1000_rev_polarity_undefined = 0xFF
137};
138
139enum e1000_fc_type {
140 e1000_fc_none = 0,
141 e1000_fc_rx_pause,
142 e1000_fc_tx_pause,
143 e1000_fc_full,
144 e1000_fc_default = 0xFF
145};
146
Auke Kok9d5c8242008-01-24 02:22:38 -0800147/* Statistics counters collected by the MAC */
148struct e1000_hw_stats {
149 u64 crcerrs;
150 u64 algnerrc;
151 u64 symerrs;
152 u64 rxerrc;
153 u64 mpc;
154 u64 scc;
155 u64 ecol;
156 u64 mcc;
157 u64 latecol;
158 u64 colc;
159 u64 dc;
160 u64 tncrs;
161 u64 sec;
162 u64 cexterr;
163 u64 rlec;
164 u64 xonrxc;
165 u64 xontxc;
166 u64 xoffrxc;
167 u64 xofftxc;
168 u64 fcruc;
169 u64 prc64;
170 u64 prc127;
171 u64 prc255;
172 u64 prc511;
173 u64 prc1023;
174 u64 prc1522;
175 u64 gprc;
176 u64 bprc;
177 u64 mprc;
178 u64 gptc;
179 u64 gorc;
180 u64 gotc;
181 u64 rnbc;
182 u64 ruc;
183 u64 rfc;
184 u64 roc;
185 u64 rjc;
186 u64 mgprc;
187 u64 mgpdc;
188 u64 mgptc;
189 u64 tor;
190 u64 tot;
191 u64 tpr;
192 u64 tpt;
193 u64 ptc64;
194 u64 ptc127;
195 u64 ptc255;
196 u64 ptc511;
197 u64 ptc1023;
198 u64 ptc1522;
199 u64 mptc;
200 u64 bptc;
201 u64 tsctc;
202 u64 tsctfc;
203 u64 iac;
204 u64 icrxptc;
205 u64 icrxatc;
206 u64 ictxptc;
207 u64 ictxatc;
208 u64 ictxqec;
209 u64 ictxqmtc;
210 u64 icrxdmtc;
211 u64 icrxoc;
212 u64 cbtmpc;
213 u64 htdpmc;
214 u64 cbrdpc;
215 u64 cbrmpc;
216 u64 rpthc;
217 u64 hgptc;
218 u64 htcbdpc;
219 u64 hgorc;
220 u64 hgotc;
221 u64 lenerrs;
222 u64 scvpc;
223 u64 hrmpc;
Alexander Duyckdda0e082009-02-06 23:19:08 +0000224 u64 doosync;
Auke Kok9d5c8242008-01-24 02:22:38 -0800225};
226
227struct e1000_phy_stats {
228 u32 idle_errors;
229 u32 receive_errors;
230};
231
232struct e1000_host_mng_dhcp_cookie {
233 u32 signature;
234 u8 status;
235 u8 reserved0;
236 u16 vlan_id;
237 u32 reserved1;
238 u16 reserved2;
239 u8 reserved3;
240 u8 checksum;
241};
242
243/* Host Interface "Rev 1" */
244struct e1000_host_command_header {
245 u8 command_id;
246 u8 command_length;
247 u8 command_options;
248 u8 checksum;
249};
250
251#define E1000_HI_MAX_DATA_LENGTH 252
252struct e1000_host_command_info {
253 struct e1000_host_command_header command_header;
254 u8 command_data[E1000_HI_MAX_DATA_LENGTH];
255};
256
257/* Host Interface "Rev 2" */
258struct e1000_host_mng_command_header {
259 u8 command_id;
260 u8 checksum;
261 u16 reserved1;
262 u16 reserved2;
263 u16 command_length;
264};
265
266#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
267struct e1000_host_mng_command_info {
268 struct e1000_host_mng_command_header command_header;
269 u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
270};
271
272#include "e1000_mac.h"
273#include "e1000_phy.h"
274#include "e1000_nvm.h"
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800275#include "e1000_mbx.h"
Auke Kok9d5c8242008-01-24 02:22:38 -0800276
277struct e1000_mac_operations {
278 s32 (*check_for_link)(struct e1000_hw *);
279 s32 (*reset_hw)(struct e1000_hw *);
280 s32 (*init_hw)(struct e1000_hw *);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700281 bool (*check_mng_mode)(struct e1000_hw *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800282 s32 (*setup_physical_interface)(struct e1000_hw *);
283 void (*rar_set)(struct e1000_hw *, u8 *, u32);
284 s32 (*read_mac_addr)(struct e1000_hw *);
285 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
286};
287
288struct e1000_phy_operations {
Alexander Duycka8d2a0c2009-02-06 23:17:26 +0000289 s32 (*acquire)(struct e1000_hw *);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700290 s32 (*check_reset_block)(struct e1000_hw *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800291 s32 (*force_speed_duplex)(struct e1000_hw *);
292 s32 (*get_cfg_done)(struct e1000_hw *hw);
293 s32 (*get_cable_length)(struct e1000_hw *);
294 s32 (*get_phy_info)(struct e1000_hw *);
Alexander Duycka8d2a0c2009-02-06 23:17:26 +0000295 s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
296 void (*release)(struct e1000_hw *);
297 s32 (*reset)(struct e1000_hw *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800298 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
299 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
Alexander Duycka8d2a0c2009-02-06 23:17:26 +0000300 s32 (*write_reg)(struct e1000_hw *, u32, u16);
Auke Kok9d5c8242008-01-24 02:22:38 -0800301};
302
303struct e1000_nvm_operations {
Alexander Duyck312c75a2009-02-06 23:17:47 +0000304 s32 (*acquire)(struct e1000_hw *);
305 s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
306 void (*release)(struct e1000_hw *);
307 s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800308};
309
310struct e1000_info {
311 s32 (*get_invariants)(struct e1000_hw *);
312 struct e1000_mac_operations *mac_ops;
313 struct e1000_phy_operations *phy_ops;
314 struct e1000_nvm_operations *nvm_ops;
315};
316
317extern const struct e1000_info e1000_82575_info;
318
319struct e1000_mac_info {
320 struct e1000_mac_operations ops;
321
322 u8 addr[6];
323 u8 perm_addr[6];
324
325 enum e1000_mac_type type;
326
327 u32 collision_delta;
328 u32 ledctl_default;
329 u32 ledctl_mode1;
330 u32 ledctl_mode2;
331 u32 mc_filter_type;
332 u32 tx_packet_delta;
333 u32 txcw;
334
335 u16 current_ifs_val;
336 u16 ifs_max_val;
337 u16 ifs_min_val;
338 u16 ifs_ratio;
339 u16 ifs_step_size;
340 u16 mta_reg_count;
341 u16 rar_entry_count;
342
343 u8 forced_speed_duplex;
344
345 bool adaptive_ifs;
346 bool arc_subsystem_valid;
347 bool asf_firmware_present;
348 bool autoneg;
349 bool autoneg_failed;
Auke Kok9d5c8242008-01-24 02:22:38 -0800350 bool disable_hw_init_bits;
351 bool get_link_status;
352 bool ifs_params_forced;
353 bool in_ifs_mode;
354 bool report_tx_early;
355 bool serdes_has_link;
356 bool tx_pkt_filtering;
357};
358
359struct e1000_phy_info {
360 struct e1000_phy_operations ops;
361
362 enum e1000_phy_type type;
363
364 enum e1000_1000t_rx_status local_rx;
365 enum e1000_1000t_rx_status remote_rx;
366 enum e1000_ms_type ms_type;
367 enum e1000_ms_type original_ms_type;
368 enum e1000_rev_polarity cable_polarity;
369 enum e1000_smart_speed smart_speed;
370
371 u32 addr;
372 u32 id;
373 u32 reset_delay_us; /* in usec */
374 u32 revision;
375
376 enum e1000_media_type media_type;
377
378 u16 autoneg_advertised;
379 u16 autoneg_mask;
380 u16 cable_length;
381 u16 max_cable_length;
382 u16 min_cable_length;
383
384 u8 mdix;
385
386 bool disable_polarity_correction;
387 bool is_mdix;
388 bool polarity_correction;
389 bool reset_disable;
390 bool speed_downgraded;
391 bool autoneg_wait_to_complete;
392};
393
394struct e1000_nvm_info {
395 struct e1000_nvm_operations ops;
396
397 enum e1000_nvm_type type;
398 enum e1000_nvm_override override;
399
400 u32 flash_bank_size;
401 u32 flash_base_addr;
402
403 u16 word_size;
404 u16 delay_usec;
405 u16 address_bits;
406 u16 opcode_bits;
407 u16 page_size;
408};
409
410struct e1000_bus_info {
411 enum e1000_bus_type type;
412 enum e1000_bus_speed speed;
413 enum e1000_bus_width width;
414
415 u32 snoop;
416
417 u16 func;
418 u16 pci_cmd_word;
419};
420
421struct e1000_fc_info {
422 u32 high_water; /* Flow control high-water mark */
423 u32 low_water; /* Flow control low-water mark */
424 u16 pause_time; /* Flow control pause timer */
425 bool send_xon; /* Flow control send XON */
426 bool strict_ieee; /* Strict IEEE mode */
427 enum e1000_fc_type type; /* Type of flow control */
428 enum e1000_fc_type original_type;
429};
430
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800431struct e1000_mbx_operations {
432 s32 (*init_params)(struct e1000_hw *hw);
433 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
434 s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
435 s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
436 s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
437 s32 (*check_for_msg)(struct e1000_hw *, u16);
438 s32 (*check_for_ack)(struct e1000_hw *, u16);
439 s32 (*check_for_rst)(struct e1000_hw *, u16);
440};
441
442struct e1000_mbx_stats {
443 u32 msgs_tx;
444 u32 msgs_rx;
445
446 u32 acks;
447 u32 reqs;
448 u32 rsts;
449};
450
451struct e1000_mbx_info {
452 struct e1000_mbx_operations ops;
453 struct e1000_mbx_stats stats;
454 u32 timeout;
455 u32 usec_delay;
456 u16 size;
457};
458
Alexander Duyckc1889bf2009-02-06 23:16:45 +0000459struct e1000_dev_spec_82575 {
460 bool sgmii_active;
461};
462
Auke Kok9d5c8242008-01-24 02:22:38 -0800463struct e1000_hw {
464 void *back;
Auke Kok9d5c8242008-01-24 02:22:38 -0800465
466 u8 __iomem *hw_addr;
467 u8 __iomem *flash_address;
468 unsigned long io_base;
469
470 struct e1000_mac_info mac;
471 struct e1000_fc_info fc;
472 struct e1000_phy_info phy;
473 struct e1000_nvm_info nvm;
474 struct e1000_bus_info bus;
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800475 struct e1000_mbx_info mbx;
Auke Kok9d5c8242008-01-24 02:22:38 -0800476 struct e1000_host_mng_dhcp_cookie mng_cookie;
477
Alexander Duyckc1889bf2009-02-06 23:16:45 +0000478 union {
479 struct e1000_dev_spec_82575 _82575;
480 } dev_spec;
Auke Kok9d5c8242008-01-24 02:22:38 -0800481
482 u16 device_id;
483 u16 subsystem_vendor_id;
484 u16 subsystem_device_id;
485 u16 vendor_id;
486
487 u8 revision_id;
488};
489
490#ifdef DEBUG
491extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
Auke Kok652fff32008-06-27 11:00:18 -0700492#define hw_dbg(format, arg...) \
Auke Kok9d5c8242008-01-24 02:22:38 -0800493 printk(KERN_DEBUG "%s: " format, igb_get_hw_dev_name(hw), ##arg)
494#else
Auke Kok652fff32008-06-27 11:00:18 -0700495#define hw_dbg(format, arg...)
Auke Kok9d5c8242008-01-24 02:22:38 -0800496#endif
497
498#endif