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gerrit-public.fairphone.software / kernel / msm / c92ad31ccbb04f2a41116cec08dd75df1cfe8345 / . / arch / arm / mach-omap1 / clock.h
blob: 3d04f4f67676280a591f7bbcfb003c426fdba2dc [file] [log] [blame]
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]1/*
2 * linux/arch/arm/mach-omap1/clock.h
3 *
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]4 * Copyright (C) 2004 - 2005, 2009 Nokia corporation
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
15
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]16#include <linux/clk.h>
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]17
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]18#include <plat/clock.h>
Russell Kingd5e60722009-02-08 16:07:46 +0000[diff] [blame]19
Tony Lindgrene9b70862011-11-11 10:15:11 -0800[diff] [blame]20int omap1_clk_init(void);
21void omap1_clk_late_init(void);
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]22extern int omap1_clk_enable(struct clk *clk);
23extern void omap1_clk_disable(struct clk *clk);
24extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
25extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate);
26extern unsigned long omap1_ckctl_recalc(struct clk *clk);
27extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
28extern unsigned long omap1_sossi_recalc(struct clk *clk);
29extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
30extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate);
31extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate);
32extern unsigned long omap1_uart_recalc(struct clk *clk);
33extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate);
34extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate);
35extern void omap1_init_ext_clk(struct clk *clk);
36extern int omap1_select_table_rate(struct clk *clk, unsigned long rate);
37extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate);
38extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
39extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
40extern unsigned long omap1_watchdog_recalc(struct clk *clk);
41
42#ifdef CONFIG_OMAP_RESET_CLOCKS
Felipe Balbi5838bb62010-05-20 12:31:04 -0600[diff] [blame]43extern void omap1_clk_disable_unused(struct clk *clk);
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]44#else
45#define omap1_clk_disable_unused NULL
46#endif
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]47
48struct uart_clk {
49 struct clk clk;
50 unsigned long sysc_addr;
51};
52
53/* Provide a method for preventing idling some ARM IDLECT clocks */
54struct arm_idlect1_clk {
55 struct clk clk;
56 unsigned long no_idle_count;
57 __u8 idlect_shift;
58};
59
60/* ARM_CKCTL bit shifts */
61#define CKCTL_PERDIV_OFFSET 0
62#define CKCTL_LCDDIV_OFFSET 2
63#define CKCTL_ARMDIV_OFFSET 4
64#define CKCTL_DSPDIV_OFFSET 6
65#define CKCTL_TCDIV_OFFSET 8
66#define CKCTL_DSPMMUDIV_OFFSET 10
67/*#define ARM_TIMXO 12*/
68#define EN_DSPCK 13
69/*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */
70/* DSP_CKCTL bit shifts */
71#define CKCTL_DSPPERDIV_OFFSET 0
72
73/* ARM_IDLECT2 bit shifts */
74#define EN_WDTCK 0
75#define EN_XORPCK 1
76#define EN_PERCK 2
77#define EN_LCDCK 3
78#define EN_LBCK 4 /* Not on 1610/1710 */
79/*#define EN_HSABCK 5*/
80#define EN_APICK 6
81#define EN_TIMCK 7
82#define DMACK_REQ 8
83#define EN_GPIOCK 9 /* Not on 1610/1710 */
84/*#define EN_LBFREECK 10*/
85#define EN_CKOUT_ARM 11
86
87/* ARM_IDLECT3 bit shifts */
88#define EN_OCPI_CK 0
89#define EN_TC1_CK 2
90#define EN_TC2_CK 4
91
92/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
93#define EN_DSPTIMCK 5
94
95/* Various register defines for clock controls scattered around OMAP chip */
Tony Lindgren90afd5c2006-09-25 13:27:20 +0300[diff] [blame]96#define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]97#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
98#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
99#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
100#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
101#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
102#define COM_CLK_DIV_CTRL_SEL 0xfffe0878
103#define SOFT_REQ_REG 0xfffe0834
104#define SOFT_REQ_REG2 0xfffe0880
105
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]106extern __u32 arm_idlect1_mask;
107extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]108
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]109extern const struct clkops clkops_dspck;
110extern const struct clkops clkops_dummy;
Paul Walmsleyfb2fc922010-07-26 16:34:28 -0600[diff] [blame]111extern const struct clkops clkops_uart_16xx;
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]112extern const struct clkops clkops_generic;
Tony Lindgren90afd5c2006-09-25 13:27:20 +0300[diff] [blame]113
Janusz Krzysztofik24ce2702011-12-08 18:01:41 -0800[diff] [blame]114/* used for passing SoC type to omap1_{select,round_to}_table_rate() */
115extern u32 cpu_mask;
116
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]117#endif