Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1 | /* |
| 2 | * SuperTrak EX Series Storage Controller driver for Linux |
| 3 | * |
Ed Lin - PTU | bd5cd9c | 2009-01-26 02:42:11 -0800 | [diff] [blame] | 4 | * Copyright (C) 2005-2009 Promise Technology Inc. |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * Written By: |
| 12 | * Ed Lin <promise_linux@promise.com> |
| 13 | * |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/errno.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/delay.h> |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 20 | #include <linux/time.h> |
| 21 | #include <linux/pci.h> |
| 22 | #include <linux/blkdev.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/types.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/spinlock.h> |
| 27 | #include <asm/io.h> |
| 28 | #include <asm/irq.h> |
| 29 | #include <asm/byteorder.h> |
| 30 | #include <scsi/scsi.h> |
| 31 | #include <scsi/scsi_device.h> |
| 32 | #include <scsi/scsi_cmnd.h> |
| 33 | #include <scsi/scsi_host.h> |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 34 | #include <scsi/scsi_tcq.h> |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 35 | #include <scsi/scsi_dbg.h> |
FUJITA Tomonori | 11002fb | 2008-03-25 09:26:52 +0900 | [diff] [blame] | 36 | #include <scsi/scsi_eh.h> |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 37 | |
| 38 | #define DRV_NAME "stex" |
Ed Lin | 05b4460 | 2009-03-31 17:30:41 -0800 | [diff] [blame] | 39 | #define ST_DRIVER_VERSION "4.6.0000.3" |
| 40 | #define ST_VER_MAJOR 4 |
| 41 | #define ST_VER_MINOR 6 |
| 42 | #define ST_OEM 0 |
| 43 | #define ST_BUILD_VER 3 |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 44 | |
| 45 | enum { |
| 46 | /* MU register offset */ |
| 47 | IMR0 = 0x10, /* MU_INBOUND_MESSAGE_REG0 */ |
| 48 | IMR1 = 0x14, /* MU_INBOUND_MESSAGE_REG1 */ |
| 49 | OMR0 = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */ |
| 50 | OMR1 = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */ |
| 51 | IDBL = 0x20, /* MU_INBOUND_DOORBELL */ |
| 52 | IIS = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */ |
| 53 | IIM = 0x28, /* MU_INBOUND_INTERRUPT_MASK */ |
| 54 | ODBL = 0x2c, /* MU_OUTBOUND_DOORBELL */ |
| 55 | OIS = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */ |
| 56 | OIM = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */ |
| 57 | |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 58 | YIOA_STATUS = 0x00, |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 59 | YH2I_INT = 0x20, |
| 60 | YINT_EN = 0x34, |
| 61 | YI2H_INT = 0x9c, |
| 62 | YI2H_INT_C = 0xa0, |
| 63 | YH2I_REQ = 0xc0, |
| 64 | YH2I_REQ_HI = 0xc4, |
| 65 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 66 | /* MU register value */ |
| 67 | MU_INBOUND_DOORBELL_HANDSHAKE = 1, |
| 68 | MU_INBOUND_DOORBELL_REQHEADCHANGED = 2, |
| 69 | MU_INBOUND_DOORBELL_STATUSTAILCHANGED = 4, |
| 70 | MU_INBOUND_DOORBELL_HMUSTOPPED = 8, |
| 71 | MU_INBOUND_DOORBELL_RESET = 16, |
| 72 | |
| 73 | MU_OUTBOUND_DOORBELL_HANDSHAKE = 1, |
| 74 | MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2, |
| 75 | MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED = 4, |
| 76 | MU_OUTBOUND_DOORBELL_BUSCHANGE = 8, |
| 77 | MU_OUTBOUND_DOORBELL_HASEVENT = 16, |
| 78 | |
| 79 | /* MU status code */ |
| 80 | MU_STATE_STARTING = 1, |
| 81 | MU_STATE_FMU_READY_FOR_HANDSHAKE = 2, |
| 82 | MU_STATE_SEND_HANDSHAKE_FRAME = 3, |
| 83 | MU_STATE_STARTED = 4, |
| 84 | MU_STATE_RESETTING = 5, |
| 85 | |
Ed Lin | 76fbf96 | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 86 | MU_MAX_DELAY = 120, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 87 | MU_HANDSHAKE_SIGNATURE = 0x55aaaa55, |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 88 | MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000, |
Ed Lin | 76fbf96 | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 89 | MU_HARD_RESET_WAIT = 30000, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 90 | HMU_PARTNER_TYPE = 2, |
| 91 | |
| 92 | /* firmware returned values */ |
| 93 | SRB_STATUS_SUCCESS = 0x01, |
| 94 | SRB_STATUS_ERROR = 0x04, |
| 95 | SRB_STATUS_BUSY = 0x05, |
| 96 | SRB_STATUS_INVALID_REQUEST = 0x06, |
| 97 | SRB_STATUS_SELECTION_TIMEOUT = 0x0A, |
| 98 | SRB_SEE_SENSE = 0x80, |
| 99 | |
| 100 | /* task attribute */ |
| 101 | TASK_ATTRIBUTE_SIMPLE = 0x0, |
| 102 | TASK_ATTRIBUTE_HEADOFQUEUE = 0x1, |
| 103 | TASK_ATTRIBUTE_ORDERED = 0x2, |
| 104 | TASK_ATTRIBUTE_ACA = 0x4, |
| 105 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 106 | SS_STS_NORMAL = 0x80000000, |
| 107 | SS_STS_DONE = 0x40000000, |
| 108 | SS_STS_HANDSHAKE = 0x20000000, |
| 109 | |
| 110 | SS_HEAD_HANDSHAKE = 0x80, |
| 111 | |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 112 | SS_H2I_INT_RESET = 0x100, |
| 113 | |
| 114 | SS_MU_OPERATIONAL = 0x80000000, |
| 115 | |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 116 | STEX_CDB_LENGTH = 16, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 117 | STATUS_VAR_LEN = 128, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 118 | |
| 119 | /* sg flags */ |
| 120 | SG_CF_EOT = 0x80, /* end of table */ |
| 121 | SG_CF_64B = 0x40, /* 64 bit item */ |
| 122 | SG_CF_HOST = 0x20, /* sg in host memory */ |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 123 | MSG_DATA_DIR_ND = 0, |
| 124 | MSG_DATA_DIR_IN = 1, |
| 125 | MSG_DATA_DIR_OUT = 2, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 126 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 127 | st_shasta = 0, |
| 128 | st_vsc = 1, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 129 | st_yosemite = 2, |
| 130 | st_seq = 3, |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 131 | st_yel = 4, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 132 | |
| 133 | PASSTHRU_REQ_TYPE = 0x00000001, |
| 134 | PASSTHRU_REQ_NO_WAKEUP = 0x00000100, |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 135 | ST_INTERNAL_TIMEOUT = 180, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 136 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 137 | ST_TO_CMD = 0, |
| 138 | ST_FROM_CMD = 1, |
| 139 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 140 | /* vendor specific commands of Promise */ |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 141 | MGT_CMD = 0xd8, |
| 142 | SINBAND_MGT_CMD = 0xd9, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 143 | ARRAY_CMD = 0xe0, |
| 144 | CONTROLLER_CMD = 0xe1, |
| 145 | DEBUGGING_CMD = 0xe2, |
| 146 | PASSTHRU_CMD = 0xe3, |
| 147 | |
| 148 | PASSTHRU_GET_ADAPTER = 0x05, |
| 149 | PASSTHRU_GET_DRVVER = 0x10, |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 150 | |
| 151 | CTLR_CONFIG_CMD = 0x03, |
| 152 | CTLR_SHUTDOWN = 0x0d, |
| 153 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 154 | CTLR_POWER_STATE_CHANGE = 0x0e, |
| 155 | CTLR_POWER_SAVING = 0x01, |
| 156 | |
| 157 | PASSTHRU_SIGNATURE = 0x4e415041, |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 158 | MGT_CMD_SIGNATURE = 0xba, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 159 | |
| 160 | INQUIRY_EVPD = 0x01, |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 161 | |
| 162 | ST_ADDITIONAL_MEM = 0x200000, |
Ed Lin | cbacfb5 | 2009-09-28 22:58:17 -0800 | [diff] [blame^] | 163 | ST_ADDITIONAL_MEM_MIN = 0x80000, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 164 | }; |
| 165 | |
| 166 | struct st_sgitem { |
| 167 | u8 ctrl; /* SG_CF_xxx */ |
| 168 | u8 reserved[3]; |
| 169 | __le32 count; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 170 | __le64 addr; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 171 | }; |
| 172 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 173 | struct st_ss_sgitem { |
| 174 | __le32 addr; |
| 175 | __le32 addr_hi; |
| 176 | __le32 count; |
| 177 | }; |
| 178 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 179 | struct st_sgtable { |
| 180 | __le16 sg_count; |
| 181 | __le16 max_sg_count; |
| 182 | __le32 sz_in_byte; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 183 | }; |
| 184 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 185 | struct st_msg_header { |
| 186 | __le64 handle; |
| 187 | u8 flag; |
| 188 | u8 channel; |
| 189 | __le16 timeout; |
| 190 | u32 reserved; |
| 191 | }; |
| 192 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 193 | struct handshake_frame { |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 194 | __le64 rb_phy; /* request payload queue physical address */ |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 195 | __le16 req_sz; /* size of each request payload */ |
| 196 | __le16 req_cnt; /* count of reqs the buffer can hold */ |
| 197 | __le16 status_sz; /* size of each status payload */ |
| 198 | __le16 status_cnt; /* count of status the buffer can hold */ |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 199 | __le64 hosttime; /* seconds from Jan 1, 1970 (GMT) */ |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 200 | u8 partner_type; /* who sends this frame */ |
| 201 | u8 reserved0[7]; |
| 202 | __le32 partner_ver_major; |
| 203 | __le32 partner_ver_minor; |
| 204 | __le32 partner_ver_oem; |
| 205 | __le32 partner_ver_build; |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 206 | __le32 extra_offset; /* NEW */ |
| 207 | __le32 extra_size; /* NEW */ |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 208 | __le32 scratch_size; |
| 209 | u32 reserved1; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 210 | }; |
| 211 | |
| 212 | struct req_msg { |
| 213 | __le16 tag; |
| 214 | u8 lun; |
| 215 | u8 target; |
| 216 | u8 task_attr; |
| 217 | u8 task_manage; |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 218 | u8 data_dir; |
Ed Lin | f903d7b7 | 2006-09-27 19:23:33 +0800 | [diff] [blame] | 219 | u8 payload_sz; /* payload size in 4-byte, not used */ |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 220 | u8 cdb[STEX_CDB_LENGTH]; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 221 | u32 variable[0]; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 222 | }; |
| 223 | |
| 224 | struct status_msg { |
| 225 | __le16 tag; |
| 226 | u8 lun; |
| 227 | u8 target; |
| 228 | u8 srb_status; |
| 229 | u8 scsi_status; |
| 230 | u8 reserved; |
| 231 | u8 payload_sz; /* payload size in 4-byte */ |
| 232 | u8 variable[STATUS_VAR_LEN]; |
| 233 | }; |
| 234 | |
| 235 | struct ver_info { |
| 236 | u32 major; |
| 237 | u32 minor; |
| 238 | u32 oem; |
| 239 | u32 build; |
| 240 | u32 reserved[2]; |
| 241 | }; |
| 242 | |
| 243 | struct st_frame { |
| 244 | u32 base[6]; |
| 245 | u32 rom_addr; |
| 246 | |
| 247 | struct ver_info drv_ver; |
| 248 | struct ver_info bios_ver; |
| 249 | |
| 250 | u32 bus; |
| 251 | u32 slot; |
| 252 | u32 irq_level; |
| 253 | u32 irq_vec; |
| 254 | u32 id; |
| 255 | u32 subid; |
| 256 | |
| 257 | u32 dimm_size; |
| 258 | u8 dimm_type; |
| 259 | u8 reserved[3]; |
| 260 | |
| 261 | u32 channel; |
| 262 | u32 reserved1; |
| 263 | }; |
| 264 | |
| 265 | struct st_drvver { |
| 266 | u32 major; |
| 267 | u32 minor; |
| 268 | u32 oem; |
| 269 | u32 build; |
| 270 | u32 signature[2]; |
| 271 | u8 console_id; |
| 272 | u8 host_no; |
| 273 | u8 reserved0[2]; |
| 274 | u32 reserved[3]; |
| 275 | }; |
| 276 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 277 | struct st_ccb { |
| 278 | struct req_msg *req; |
| 279 | struct scsi_cmnd *cmd; |
| 280 | |
| 281 | void *sense_buffer; |
| 282 | unsigned int sense_bufflen; |
| 283 | int sg_count; |
| 284 | |
| 285 | u32 req_type; |
| 286 | u8 srb_status; |
| 287 | u8 scsi_status; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 288 | u8 reserved[2]; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 289 | }; |
| 290 | |
| 291 | struct st_hba { |
| 292 | void __iomem *mmio_base; /* iomapped PCI memory space */ |
| 293 | void *dma_mem; |
| 294 | dma_addr_t dma_handle; |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 295 | size_t dma_size; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 296 | |
| 297 | struct Scsi_Host *host; |
| 298 | struct pci_dev *pdev; |
| 299 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 300 | struct req_msg * (*alloc_rq) (struct st_hba *); |
| 301 | int (*map_sg)(struct st_hba *, struct req_msg *, struct st_ccb *); |
| 302 | void (*send) (struct st_hba *, struct req_msg *, u16); |
| 303 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 304 | u32 req_head; |
| 305 | u32 req_tail; |
| 306 | u32 status_head; |
| 307 | u32 status_tail; |
| 308 | |
| 309 | struct status_msg *status_buffer; |
| 310 | void *copy_buffer; /* temp buffer for driver-handled commands */ |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 311 | struct st_ccb *ccb; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 312 | struct st_ccb *wait_ccb; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 313 | __le32 *scratch; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 314 | |
| 315 | unsigned int mu_status; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 316 | unsigned int cardtype; |
Ed Lin | 99946f8 | 2009-03-31 17:30:25 -0800 | [diff] [blame] | 317 | int msi_enabled; |
| 318 | int out_req_cnt; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 319 | u32 extra_offset; |
| 320 | u16 rq_count; |
| 321 | u16 rq_size; |
| 322 | u16 sts_count; |
| 323 | }; |
| 324 | |
| 325 | struct st_card_info { |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 326 | struct req_msg * (*alloc_rq) (struct st_hba *); |
| 327 | int (*map_sg)(struct st_hba *, struct req_msg *, struct st_ccb *); |
| 328 | void (*send) (struct st_hba *, struct req_msg *, u16); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 329 | unsigned int max_id; |
| 330 | unsigned int max_lun; |
| 331 | unsigned int max_channel; |
| 332 | u16 rq_count; |
| 333 | u16 rq_size; |
| 334 | u16 sts_count; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 335 | }; |
| 336 | |
Ed Lin | 99946f8 | 2009-03-31 17:30:25 -0800 | [diff] [blame] | 337 | static int msi; |
| 338 | module_param(msi, int, 0); |
| 339 | MODULE_PARM_DESC(msi, "Enable Message Signaled Interrupts(0=off, 1=on)"); |
| 340 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 341 | static const char console_inq_page[] = |
| 342 | { |
| 343 | 0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30, |
| 344 | 0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20, /* "Promise " */ |
| 345 | 0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E, /* "RAID Con" */ |
| 346 | 0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20, /* "sole " */ |
| 347 | 0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20, /* "1.00 " */ |
| 348 | 0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D, /* "SX/RSAF-" */ |
| 349 | 0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20, /* "TE1.00 " */ |
| 350 | 0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20 |
| 351 | }; |
| 352 | |
| 353 | MODULE_AUTHOR("Ed Lin"); |
| 354 | MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers"); |
| 355 | MODULE_LICENSE("GPL"); |
| 356 | MODULE_VERSION(ST_DRIVER_VERSION); |
| 357 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 358 | static void stex_gettime(__le64 *time) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 359 | { |
| 360 | struct timeval tv; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 361 | |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 362 | do_gettimeofday(&tv); |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 363 | *time = cpu_to_le64(tv.tv_sec); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 364 | } |
| 365 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 366 | static struct status_msg *stex_get_status(struct st_hba *hba) |
| 367 | { |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 368 | struct status_msg *status = hba->status_buffer + hba->status_tail; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 369 | |
| 370 | ++hba->status_tail; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 371 | hba->status_tail %= hba->sts_count+1; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 372 | |
| 373 | return status; |
| 374 | } |
| 375 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 376 | static void stex_invalid_field(struct scsi_cmnd *cmd, |
| 377 | void (*done)(struct scsi_cmnd *)) |
| 378 | { |
FUJITA Tomonori | 11002fb | 2008-03-25 09:26:52 +0900 | [diff] [blame] | 379 | cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION; |
| 380 | |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 381 | /* "Invalid field in cdb" */ |
FUJITA Tomonori | 11002fb | 2008-03-25 09:26:52 +0900 | [diff] [blame] | 382 | scsi_build_sense_buffer(0, cmd->sense_buffer, ILLEGAL_REQUEST, 0x24, |
| 383 | 0x0); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 384 | done(cmd); |
| 385 | } |
| 386 | |
| 387 | static struct req_msg *stex_alloc_req(struct st_hba *hba) |
| 388 | { |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 389 | struct req_msg *req = hba->dma_mem + hba->req_head * hba->rq_size; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 390 | |
| 391 | ++hba->req_head; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 392 | hba->req_head %= hba->rq_count+1; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 393 | |
| 394 | return req; |
| 395 | } |
| 396 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 397 | static struct req_msg *stex_ss_alloc_req(struct st_hba *hba) |
| 398 | { |
| 399 | return (struct req_msg *)(hba->dma_mem + |
| 400 | hba->req_head * hba->rq_size + sizeof(struct st_msg_header)); |
| 401 | } |
| 402 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 403 | static int stex_map_sg(struct st_hba *hba, |
| 404 | struct req_msg *req, struct st_ccb *ccb) |
| 405 | { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 406 | struct scsi_cmnd *cmd; |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 407 | struct scatterlist *sg; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 408 | struct st_sgtable *dst; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 409 | struct st_sgitem *table; |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 410 | int i, nseg; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 411 | |
| 412 | cmd = ccb->cmd; |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 413 | nseg = scsi_dma_map(cmd); |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 414 | BUG_ON(nseg < 0); |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 415 | if (nseg) { |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 416 | dst = (struct st_sgtable *)req->variable; |
| 417 | |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 418 | ccb->sg_count = nseg; |
| 419 | dst->sg_count = cpu_to_le16((u16)nseg); |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 420 | dst->max_sg_count = cpu_to_le16(hba->host->sg_tablesize); |
| 421 | dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 422 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 423 | table = (struct st_sgitem *)(dst + 1); |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 424 | scsi_for_each_sg(cmd, sg, nseg, i) { |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 425 | table[i].count = cpu_to_le32((u32)sg_dma_len(sg)); |
| 426 | table[i].addr = cpu_to_le64(sg_dma_address(sg)); |
| 427 | table[i].ctrl = SG_CF_64B | SG_CF_HOST; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 428 | } |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 429 | table[--i].ctrl |= SG_CF_EOT; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 430 | } |
| 431 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 432 | return nseg; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 433 | } |
| 434 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 435 | static int stex_ss_map_sg(struct st_hba *hba, |
| 436 | struct req_msg *req, struct st_ccb *ccb) |
| 437 | { |
| 438 | struct scsi_cmnd *cmd; |
| 439 | struct scatterlist *sg; |
| 440 | struct st_sgtable *dst; |
| 441 | struct st_ss_sgitem *table; |
| 442 | int i, nseg; |
| 443 | |
| 444 | cmd = ccb->cmd; |
| 445 | nseg = scsi_dma_map(cmd); |
| 446 | BUG_ON(nseg < 0); |
| 447 | if (nseg) { |
| 448 | dst = (struct st_sgtable *)req->variable; |
| 449 | |
| 450 | ccb->sg_count = nseg; |
| 451 | dst->sg_count = cpu_to_le16((u16)nseg); |
| 452 | dst->max_sg_count = cpu_to_le16(hba->host->sg_tablesize); |
| 453 | dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd)); |
| 454 | |
| 455 | table = (struct st_ss_sgitem *)(dst + 1); |
| 456 | scsi_for_each_sg(cmd, sg, nseg, i) { |
| 457 | table[i].count = cpu_to_le32((u32)sg_dma_len(sg)); |
| 458 | table[i].addr = |
| 459 | cpu_to_le32(sg_dma_address(sg) & 0xffffffff); |
| 460 | table[i].addr_hi = |
| 461 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); |
| 462 | } |
| 463 | } |
| 464 | |
| 465 | return nseg; |
| 466 | } |
| 467 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 468 | static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb) |
| 469 | { |
| 470 | struct st_frame *p; |
| 471 | size_t count = sizeof(struct st_frame); |
| 472 | |
| 473 | p = hba->copy_buffer; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 474 | scsi_sg_copy_to_buffer(ccb->cmd, p, count); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 475 | memset(p->base, 0, sizeof(u32)*6); |
| 476 | *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0); |
| 477 | p->rom_addr = 0; |
| 478 | |
| 479 | p->drv_ver.major = ST_VER_MAJOR; |
| 480 | p->drv_ver.minor = ST_VER_MINOR; |
| 481 | p->drv_ver.oem = ST_OEM; |
| 482 | p->drv_ver.build = ST_BUILD_VER; |
| 483 | |
| 484 | p->bus = hba->pdev->bus->number; |
| 485 | p->slot = hba->pdev->devfn; |
| 486 | p->irq_level = 0; |
| 487 | p->irq_vec = hba->pdev->irq; |
| 488 | p->id = hba->pdev->vendor << 16 | hba->pdev->device; |
| 489 | p->subid = |
| 490 | hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device; |
| 491 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 492 | scsi_sg_copy_from_buffer(ccb->cmd, p, count); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | static void |
| 496 | stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag) |
| 497 | { |
| 498 | req->tag = cpu_to_le16(tag); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 499 | |
| 500 | hba->ccb[tag].req = req; |
| 501 | hba->out_req_cnt++; |
| 502 | |
| 503 | writel(hba->req_head, hba->mmio_base + IMR0); |
| 504 | writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL); |
| 505 | readl(hba->mmio_base + IDBL); /* flush */ |
| 506 | } |
| 507 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 508 | static void |
| 509 | stex_ss_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag) |
| 510 | { |
| 511 | struct scsi_cmnd *cmd; |
| 512 | struct st_msg_header *msg_h; |
| 513 | dma_addr_t addr; |
| 514 | |
| 515 | req->tag = cpu_to_le16(tag); |
| 516 | |
| 517 | hba->ccb[tag].req = req; |
| 518 | hba->out_req_cnt++; |
| 519 | |
| 520 | cmd = hba->ccb[tag].cmd; |
| 521 | msg_h = (struct st_msg_header *)req - 1; |
| 522 | if (likely(cmd)) { |
| 523 | msg_h->channel = (u8)cmd->device->channel; |
| 524 | msg_h->timeout = cpu_to_le16(cmd->request->timeout/HZ); |
| 525 | } |
| 526 | addr = hba->dma_handle + hba->req_head * hba->rq_size; |
| 527 | addr += (hba->ccb[tag].sg_count+4)/11; |
| 528 | msg_h->handle = cpu_to_le64(addr); |
| 529 | |
| 530 | ++hba->req_head; |
| 531 | hba->req_head %= hba->rq_count+1; |
| 532 | |
| 533 | writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI); |
| 534 | readl(hba->mmio_base + YH2I_REQ_HI); /* flush */ |
| 535 | writel(addr, hba->mmio_base + YH2I_REQ); |
| 536 | readl(hba->mmio_base + YH2I_REQ); /* flush */ |
| 537 | } |
| 538 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 539 | static int |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 540 | stex_slave_alloc(struct scsi_device *sdev) |
| 541 | { |
| 542 | /* Cheat: usually extracted from Inquiry data */ |
| 543 | sdev->tagged_supported = 1; |
| 544 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 545 | scsi_activate_tcq(sdev, sdev->host->can_queue); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 546 | |
| 547 | return 0; |
| 548 | } |
| 549 | |
| 550 | static int |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 551 | stex_slave_config(struct scsi_device *sdev) |
| 552 | { |
| 553 | sdev->use_10_for_rw = 1; |
| 554 | sdev->use_10_for_ms = 1; |
James Bottomley | dc5c49b | 2008-11-30 10:38:08 -0600 | [diff] [blame] | 555 | blk_queue_rq_timeout(sdev->request_queue, 60 * HZ); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 556 | sdev->tagged_supported = 1; |
| 557 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 558 | return 0; |
| 559 | } |
| 560 | |
| 561 | static void |
| 562 | stex_slave_destroy(struct scsi_device *sdev) |
| 563 | { |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 564 | scsi_deactivate_tcq(sdev, 1); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 565 | } |
| 566 | |
| 567 | static int |
| 568 | stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) |
| 569 | { |
| 570 | struct st_hba *hba; |
| 571 | struct Scsi_Host *host; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 572 | unsigned int id, lun; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 573 | struct req_msg *req; |
| 574 | u16 tag; |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 575 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 576 | host = cmd->device->host; |
| 577 | id = cmd->device->id; |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 578 | lun = cmd->device->lun; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 579 | hba = (struct st_hba *) &host->hostdata[0]; |
| 580 | |
| 581 | switch (cmd->cmnd[0]) { |
| 582 | case MODE_SENSE_10: |
| 583 | { |
| 584 | static char ms10_caching_page[12] = |
| 585 | { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 }; |
| 586 | unsigned char page; |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 587 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 588 | page = cmd->cmnd[2] & 0x3f; |
| 589 | if (page == 0x8 || page == 0x3f) { |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 590 | scsi_sg_copy_from_buffer(cmd, ms10_caching_page, |
| 591 | sizeof(ms10_caching_page)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 592 | cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 593 | done(cmd); |
| 594 | } else |
| 595 | stex_invalid_field(cmd, done); |
| 596 | return 0; |
| 597 | } |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 598 | case REPORT_LUNS: |
| 599 | /* |
| 600 | * The shasta firmware does not report actual luns in the |
| 601 | * target, so fail the command to force sequential lun scan. |
| 602 | * Also, the console device does not support this command. |
| 603 | */ |
| 604 | if (hba->cardtype == st_shasta || id == host->max_id - 1) { |
| 605 | stex_invalid_field(cmd, done); |
| 606 | return 0; |
| 607 | } |
| 608 | break; |
Ed Lin | d116a7b | 2007-05-09 20:50:40 -0800 | [diff] [blame] | 609 | case TEST_UNIT_READY: |
| 610 | if (id == host->max_id - 1) { |
| 611 | cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 612 | done(cmd); |
| 613 | return 0; |
| 614 | } |
| 615 | break; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 616 | case INQUIRY: |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 617 | if (id != host->max_id - 1) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 618 | break; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 619 | if (!lun && !cmd->device->channel && |
| 620 | (cmd->cmnd[1] & INQUIRY_EVPD) == 0) { |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 621 | scsi_sg_copy_from_buffer(cmd, (void *)console_inq_page, |
| 622 | sizeof(console_inq_page)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 623 | cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 624 | done(cmd); |
| 625 | } else |
| 626 | stex_invalid_field(cmd, done); |
| 627 | return 0; |
| 628 | case PASSTHRU_CMD: |
| 629 | if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) { |
| 630 | struct st_drvver ver; |
FUJITA Tomonori | 26106e3 | 2008-02-22 23:11:03 +0900 | [diff] [blame] | 631 | size_t cp_len = sizeof(ver); |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 632 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 633 | ver.major = ST_VER_MAJOR; |
| 634 | ver.minor = ST_VER_MINOR; |
| 635 | ver.oem = ST_OEM; |
| 636 | ver.build = ST_BUILD_VER; |
| 637 | ver.signature[0] = PASSTHRU_SIGNATURE; |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 638 | ver.console_id = host->max_id - 1; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 639 | ver.host_no = hba->host->host_no; |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 640 | cp_len = scsi_sg_copy_from_buffer(cmd, &ver, cp_len); |
FUJITA Tomonori | 26106e3 | 2008-02-22 23:11:03 +0900 | [diff] [blame] | 641 | cmd->result = sizeof(ver) == cp_len ? |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 642 | DID_OK << 16 | COMMAND_COMPLETE << 8 : |
| 643 | DID_ERROR << 16 | COMMAND_COMPLETE << 8; |
| 644 | done(cmd); |
| 645 | return 0; |
| 646 | } |
| 647 | default: |
| 648 | break; |
| 649 | } |
| 650 | |
| 651 | cmd->scsi_done = done; |
| 652 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 653 | tag = cmd->request->tag; |
| 654 | |
| 655 | if (unlikely(tag >= host->can_queue)) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 656 | return SCSI_MLQUEUE_HOST_BUSY; |
| 657 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 658 | req = hba->alloc_rq(hba); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 659 | |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 660 | req->lun = lun; |
| 661 | req->target = id; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 662 | |
| 663 | /* cdb */ |
| 664 | memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH); |
| 665 | |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 666 | if (cmd->sc_data_direction == DMA_FROM_DEVICE) |
| 667 | req->data_dir = MSG_DATA_DIR_IN; |
| 668 | else if (cmd->sc_data_direction == DMA_TO_DEVICE) |
| 669 | req->data_dir = MSG_DATA_DIR_OUT; |
| 670 | else |
| 671 | req->data_dir = MSG_DATA_DIR_ND; |
| 672 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 673 | hba->ccb[tag].cmd = cmd; |
| 674 | hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE; |
| 675 | hba->ccb[tag].sense_buffer = cmd->sense_buffer; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 676 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 677 | if (!hba->map_sg(hba, req, &hba->ccb[tag])) { |
| 678 | hba->ccb[tag].sg_count = 0; |
| 679 | memset(&req->variable[0], 0, 8); |
| 680 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 681 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 682 | hba->send(hba, req, tag); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 683 | return 0; |
| 684 | } |
| 685 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 686 | static void stex_scsi_done(struct st_ccb *ccb) |
| 687 | { |
| 688 | struct scsi_cmnd *cmd = ccb->cmd; |
| 689 | int result; |
| 690 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 691 | if (ccb->srb_status == SRB_STATUS_SUCCESS || ccb->srb_status == 0) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 692 | result = ccb->scsi_status; |
| 693 | switch (ccb->scsi_status) { |
| 694 | case SAM_STAT_GOOD: |
| 695 | result |= DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 696 | break; |
| 697 | case SAM_STAT_CHECK_CONDITION: |
| 698 | result |= DRIVER_SENSE << 24; |
| 699 | break; |
| 700 | case SAM_STAT_BUSY: |
| 701 | result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8; |
| 702 | break; |
| 703 | default: |
| 704 | result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8; |
| 705 | break; |
| 706 | } |
| 707 | } |
| 708 | else if (ccb->srb_status & SRB_SEE_SENSE) |
| 709 | result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION; |
| 710 | else switch (ccb->srb_status) { |
| 711 | case SRB_STATUS_SELECTION_TIMEOUT: |
| 712 | result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8; |
| 713 | break; |
| 714 | case SRB_STATUS_BUSY: |
| 715 | result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8; |
| 716 | break; |
| 717 | case SRB_STATUS_INVALID_REQUEST: |
| 718 | case SRB_STATUS_ERROR: |
| 719 | default: |
| 720 | result = DID_ERROR << 16 | COMMAND_COMPLETE << 8; |
| 721 | break; |
| 722 | } |
| 723 | |
| 724 | cmd->result = result; |
| 725 | cmd->scsi_done(cmd); |
| 726 | } |
| 727 | |
| 728 | static void stex_copy_data(struct st_ccb *ccb, |
| 729 | struct status_msg *resp, unsigned int variable) |
| 730 | { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 731 | if (resp->scsi_status != SAM_STAT_GOOD) { |
| 732 | if (ccb->sense_buffer != NULL) |
| 733 | memcpy(ccb->sense_buffer, resp->variable, |
| 734 | min(variable, ccb->sense_bufflen)); |
| 735 | return; |
| 736 | } |
| 737 | |
| 738 | if (ccb->cmd == NULL) |
| 739 | return; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 740 | scsi_sg_copy_from_buffer(ccb->cmd, resp->variable, variable); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 741 | } |
| 742 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 743 | static void stex_check_cmd(struct st_hba *hba, |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 744 | struct st_ccb *ccb, struct status_msg *resp) |
| 745 | { |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 746 | if (ccb->cmd->cmnd[0] == MGT_CMD && |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 747 | resp->scsi_status != SAM_STAT_CHECK_CONDITION) |
Ed Lin | 968a576 | 2007-07-05 12:09:06 -0700 | [diff] [blame] | 748 | scsi_set_resid(ccb->cmd, scsi_bufflen(ccb->cmd) - |
| 749 | le32_to_cpu(*(__le32 *)&resp->variable[0])); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 750 | } |
| 751 | |
| 752 | static void stex_mu_intr(struct st_hba *hba, u32 doorbell) |
| 753 | { |
| 754 | void __iomem *base = hba->mmio_base; |
| 755 | struct status_msg *resp; |
| 756 | struct st_ccb *ccb; |
| 757 | unsigned int size; |
| 758 | u16 tag; |
| 759 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 760 | if (unlikely(!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 761 | return; |
| 762 | |
| 763 | /* status payloads */ |
| 764 | hba->status_head = readl(base + OMR1); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 765 | if (unlikely(hba->status_head > hba->sts_count)) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 766 | printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n", |
| 767 | pci_name(hba->pdev)); |
| 768 | return; |
| 769 | } |
| 770 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 771 | /* |
| 772 | * it's not a valid status payload if: |
| 773 | * 1. there are no pending requests(e.g. during init stage) |
| 774 | * 2. there are some pending requests, but the controller is in |
| 775 | * reset status, and its type is not st_yosemite |
| 776 | * firmware of st_yosemite in reset status will return pending requests |
| 777 | * to driver, so we allow it to pass |
| 778 | */ |
| 779 | if (unlikely(hba->out_req_cnt <= 0 || |
| 780 | (hba->mu_status == MU_STATE_RESETTING && |
| 781 | hba->cardtype != st_yosemite))) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 782 | hba->status_tail = hba->status_head; |
| 783 | goto update_status; |
| 784 | } |
| 785 | |
| 786 | while (hba->status_tail != hba->status_head) { |
| 787 | resp = stex_get_status(hba); |
| 788 | tag = le16_to_cpu(resp->tag); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 789 | if (unlikely(tag >= hba->host->can_queue)) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 790 | printk(KERN_WARNING DRV_NAME |
| 791 | "(%s): invalid tag\n", pci_name(hba->pdev)); |
| 792 | continue; |
| 793 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 794 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 795 | hba->out_req_cnt--; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 796 | ccb = &hba->ccb[tag]; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 797 | if (unlikely(hba->wait_ccb == ccb)) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 798 | hba->wait_ccb = NULL; |
| 799 | if (unlikely(ccb->req == NULL)) { |
| 800 | printk(KERN_WARNING DRV_NAME |
| 801 | "(%s): lagging req\n", pci_name(hba->pdev)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 802 | continue; |
| 803 | } |
| 804 | |
| 805 | size = resp->payload_sz * sizeof(u32); /* payload size */ |
| 806 | if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN || |
| 807 | size > sizeof(*resp))) { |
| 808 | printk(KERN_WARNING DRV_NAME "(%s): bad status size\n", |
| 809 | pci_name(hba->pdev)); |
| 810 | } else { |
| 811 | size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */ |
| 812 | if (size) |
| 813 | stex_copy_data(ccb, resp, size); |
| 814 | } |
| 815 | |
Ed Lin - PTU | dd48ebf | 2009-01-26 02:40:11 -0800 | [diff] [blame] | 816 | ccb->req = NULL; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 817 | ccb->srb_status = resp->srb_status; |
| 818 | ccb->scsi_status = resp->scsi_status; |
| 819 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 820 | if (likely(ccb->cmd != NULL)) { |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 821 | if (hba->cardtype == st_yosemite) |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 822 | stex_check_cmd(hba, ccb, resp); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 823 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 824 | if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD && |
| 825 | ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER)) |
| 826 | stex_controller_info(hba, ccb); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 827 | |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 828 | scsi_dma_unmap(ccb->cmd); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 829 | stex_scsi_done(ccb); |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 830 | } else |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 831 | ccb->req_type = 0; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 832 | } |
| 833 | |
| 834 | update_status: |
| 835 | writel(hba->status_head, base + IMR1); |
| 836 | readl(base + IMR1); /* flush */ |
| 837 | } |
| 838 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 839 | static irqreturn_t stex_intr(int irq, void *__hba) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 840 | { |
| 841 | struct st_hba *hba = __hba; |
| 842 | void __iomem *base = hba->mmio_base; |
| 843 | u32 data; |
| 844 | unsigned long flags; |
| 845 | int handled = 0; |
| 846 | |
| 847 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 848 | |
| 849 | data = readl(base + ODBL); |
| 850 | |
| 851 | if (data && data != 0xffffffff) { |
| 852 | /* clear the interrupt */ |
| 853 | writel(data, base + ODBL); |
| 854 | readl(base + ODBL); /* flush */ |
| 855 | stex_mu_intr(hba, data); |
| 856 | handled = 1; |
| 857 | } |
| 858 | |
| 859 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 860 | |
| 861 | return IRQ_RETVAL(handled); |
| 862 | } |
| 863 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 864 | static void stex_ss_mu_intr(struct st_hba *hba) |
| 865 | { |
| 866 | struct status_msg *resp; |
| 867 | struct st_ccb *ccb; |
| 868 | __le32 *scratch; |
| 869 | unsigned int size; |
| 870 | int count = 0; |
| 871 | u32 value; |
| 872 | u16 tag; |
| 873 | |
| 874 | if (unlikely(hba->out_req_cnt <= 0 || |
| 875 | hba->mu_status == MU_STATE_RESETTING)) |
| 876 | return; |
| 877 | |
| 878 | while (count < hba->sts_count) { |
| 879 | scratch = hba->scratch + hba->status_tail; |
| 880 | value = le32_to_cpu(*scratch); |
| 881 | if (unlikely(!(value & SS_STS_NORMAL))) |
| 882 | return; |
| 883 | |
| 884 | resp = hba->status_buffer + hba->status_tail; |
| 885 | *scratch = 0; |
| 886 | ++count; |
| 887 | ++hba->status_tail; |
| 888 | hba->status_tail %= hba->sts_count+1; |
| 889 | |
| 890 | tag = (u16)value; |
| 891 | if (unlikely(tag >= hba->host->can_queue)) { |
| 892 | printk(KERN_WARNING DRV_NAME |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 893 | "(%s): invalid tag\n", pci_name(hba->pdev)); |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 894 | continue; |
| 895 | } |
| 896 | |
| 897 | hba->out_req_cnt--; |
| 898 | ccb = &hba->ccb[tag]; |
| 899 | if (unlikely(hba->wait_ccb == ccb)) |
| 900 | hba->wait_ccb = NULL; |
| 901 | if (unlikely(ccb->req == NULL)) { |
| 902 | printk(KERN_WARNING DRV_NAME |
| 903 | "(%s): lagging req\n", pci_name(hba->pdev)); |
| 904 | continue; |
| 905 | } |
| 906 | |
| 907 | ccb->req = NULL; |
| 908 | if (likely(value & SS_STS_DONE)) { /* normal case */ |
| 909 | ccb->srb_status = SRB_STATUS_SUCCESS; |
| 910 | ccb->scsi_status = SAM_STAT_GOOD; |
| 911 | } else { |
| 912 | ccb->srb_status = resp->srb_status; |
| 913 | ccb->scsi_status = resp->scsi_status; |
| 914 | size = resp->payload_sz * sizeof(u32); |
| 915 | if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN || |
| 916 | size > sizeof(*resp))) { |
| 917 | printk(KERN_WARNING DRV_NAME |
| 918 | "(%s): bad status size\n", |
| 919 | pci_name(hba->pdev)); |
| 920 | } else { |
| 921 | size -= sizeof(*resp) - STATUS_VAR_LEN; |
| 922 | if (size) |
| 923 | stex_copy_data(ccb, resp, size); |
| 924 | } |
| 925 | if (likely(ccb->cmd != NULL)) |
| 926 | stex_check_cmd(hba, ccb, resp); |
| 927 | } |
| 928 | |
| 929 | if (likely(ccb->cmd != NULL)) { |
| 930 | scsi_dma_unmap(ccb->cmd); |
| 931 | stex_scsi_done(ccb); |
| 932 | } else |
| 933 | ccb->req_type = 0; |
| 934 | } |
| 935 | } |
| 936 | |
| 937 | static irqreturn_t stex_ss_intr(int irq, void *__hba) |
| 938 | { |
| 939 | struct st_hba *hba = __hba; |
| 940 | void __iomem *base = hba->mmio_base; |
| 941 | u32 data; |
| 942 | unsigned long flags; |
| 943 | int handled = 0; |
| 944 | |
| 945 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 946 | |
| 947 | data = readl(base + YI2H_INT); |
| 948 | if (data && data != 0xffffffff) { |
| 949 | /* clear the interrupt */ |
| 950 | writel(data, base + YI2H_INT_C); |
| 951 | stex_ss_mu_intr(hba); |
| 952 | handled = 1; |
| 953 | } |
| 954 | |
| 955 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 956 | |
| 957 | return IRQ_RETVAL(handled); |
| 958 | } |
| 959 | |
| 960 | static int stex_common_handshake(struct st_hba *hba) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 961 | { |
| 962 | void __iomem *base = hba->mmio_base; |
| 963 | struct handshake_frame *h; |
| 964 | dma_addr_t status_phys; |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 965 | u32 data; |
Ed Lin | 76fbf96 | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 966 | unsigned long before; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 967 | |
| 968 | if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) { |
| 969 | writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL); |
| 970 | readl(base + IDBL); |
Ed Lin | 76fbf96 | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 971 | before = jiffies; |
| 972 | while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) { |
| 973 | if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) { |
| 974 | printk(KERN_ERR DRV_NAME |
| 975 | "(%s): no handshake signature\n", |
| 976 | pci_name(hba->pdev)); |
| 977 | return -1; |
| 978 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 979 | rmb(); |
| 980 | msleep(1); |
| 981 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 982 | } |
| 983 | |
| 984 | udelay(10); |
| 985 | |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 986 | data = readl(base + OMR1); |
| 987 | if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) { |
| 988 | data &= 0x0000ffff; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 989 | if (hba->host->can_queue > data) { |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 990 | hba->host->can_queue = data; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 991 | hba->host->cmd_per_lun = data; |
| 992 | } |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 993 | } |
| 994 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 995 | h = (struct handshake_frame *)hba->status_buffer; |
| 996 | h->rb_phy = cpu_to_le64(hba->dma_handle); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 997 | h->req_sz = cpu_to_le16(hba->rq_size); |
| 998 | h->req_cnt = cpu_to_le16(hba->rq_count+1); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 999 | h->status_sz = cpu_to_le16(sizeof(struct status_msg)); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1000 | h->status_cnt = cpu_to_le16(hba->sts_count+1); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1001 | stex_gettime(&h->hosttime); |
| 1002 | h->partner_type = HMU_PARTNER_TYPE; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1003 | if (hba->extra_offset) { |
| 1004 | h->extra_offset = cpu_to_le32(hba->extra_offset); |
Ed Lin | cbacfb5 | 2009-09-28 22:58:17 -0800 | [diff] [blame^] | 1005 | h->extra_size = cpu_to_le32(hba->dma_size - hba->extra_offset); |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1006 | } else |
| 1007 | h->extra_offset = h->extra_size = 0; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1008 | |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1009 | status_phys = hba->dma_handle + (hba->rq_count+1) * hba->rq_size; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1010 | writel(status_phys, base + IMR0); |
| 1011 | readl(base + IMR0); |
| 1012 | writel((status_phys >> 16) >> 16, base + IMR1); |
| 1013 | readl(base + IMR1); |
| 1014 | |
| 1015 | writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */ |
| 1016 | readl(base + OMR0); |
| 1017 | writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL); |
| 1018 | readl(base + IDBL); /* flush */ |
| 1019 | |
| 1020 | udelay(10); |
Ed Lin | 76fbf96 | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 1021 | before = jiffies; |
| 1022 | while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) { |
| 1023 | if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) { |
| 1024 | printk(KERN_ERR DRV_NAME |
| 1025 | "(%s): no signature after handshake frame\n", |
| 1026 | pci_name(hba->pdev)); |
| 1027 | return -1; |
| 1028 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1029 | rmb(); |
| 1030 | msleep(1); |
| 1031 | } |
| 1032 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1033 | writel(0, base + IMR0); |
| 1034 | readl(base + IMR0); |
| 1035 | writel(0, base + OMR0); |
| 1036 | readl(base + OMR0); |
| 1037 | writel(0, base + IMR1); |
| 1038 | readl(base + IMR1); |
| 1039 | writel(0, base + OMR1); |
| 1040 | readl(base + OMR1); /* flush */ |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1041 | return 0; |
| 1042 | } |
| 1043 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1044 | static int stex_ss_handshake(struct st_hba *hba) |
| 1045 | { |
| 1046 | void __iomem *base = hba->mmio_base; |
| 1047 | struct st_msg_header *msg_h; |
| 1048 | struct handshake_frame *h; |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 1049 | __le32 *scratch; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1050 | u32 data; |
| 1051 | unsigned long before; |
| 1052 | int ret = 0; |
| 1053 | |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 1054 | before = jiffies; |
| 1055 | while ((readl(base + YIOA_STATUS) & SS_MU_OPERATIONAL) == 0) { |
| 1056 | if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) { |
| 1057 | printk(KERN_ERR DRV_NAME |
| 1058 | "(%s): firmware not operational\n", |
| 1059 | pci_name(hba->pdev)); |
| 1060 | return -1; |
| 1061 | } |
| 1062 | msleep(1); |
| 1063 | } |
| 1064 | |
| 1065 | msg_h = (struct st_msg_header *)hba->dma_mem; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1066 | msg_h->handle = cpu_to_le64(hba->dma_handle); |
| 1067 | msg_h->flag = SS_HEAD_HANDSHAKE; |
| 1068 | |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 1069 | h = (struct handshake_frame *)(msg_h + 1); |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1070 | h->rb_phy = cpu_to_le64(hba->dma_handle); |
| 1071 | h->req_sz = cpu_to_le16(hba->rq_size); |
| 1072 | h->req_cnt = cpu_to_le16(hba->rq_count+1); |
| 1073 | h->status_sz = cpu_to_le16(sizeof(struct status_msg)); |
| 1074 | h->status_cnt = cpu_to_le16(hba->sts_count+1); |
| 1075 | stex_gettime(&h->hosttime); |
| 1076 | h->partner_type = HMU_PARTNER_TYPE; |
| 1077 | h->extra_offset = h->extra_size = 0; |
| 1078 | h->scratch_size = cpu_to_le32((hba->sts_count+1)*sizeof(u32)); |
| 1079 | |
| 1080 | data = readl(base + YINT_EN); |
| 1081 | data &= ~4; |
| 1082 | writel(data, base + YINT_EN); |
| 1083 | writel((hba->dma_handle >> 16) >> 16, base + YH2I_REQ_HI); |
| 1084 | writel(hba->dma_handle, base + YH2I_REQ); |
| 1085 | |
| 1086 | scratch = hba->scratch; |
| 1087 | before = jiffies; |
| 1088 | while (!(le32_to_cpu(*scratch) & SS_STS_HANDSHAKE)) { |
| 1089 | if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) { |
| 1090 | printk(KERN_ERR DRV_NAME |
| 1091 | "(%s): no signature after handshake frame\n", |
| 1092 | pci_name(hba->pdev)); |
| 1093 | ret = -1; |
| 1094 | break; |
| 1095 | } |
| 1096 | rmb(); |
| 1097 | msleep(1); |
| 1098 | } |
| 1099 | |
| 1100 | *scratch = 0; |
| 1101 | msg_h->flag = 0; |
| 1102 | return ret; |
| 1103 | } |
| 1104 | |
| 1105 | static int stex_handshake(struct st_hba *hba) |
| 1106 | { |
| 1107 | int err; |
| 1108 | unsigned long flags; |
| 1109 | |
| 1110 | err = (hba->cardtype == st_yel) ? |
| 1111 | stex_ss_handshake(hba) : stex_common_handshake(hba); |
| 1112 | if (err == 0) { |
| 1113 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1114 | hba->req_head = 0; |
| 1115 | hba->req_tail = 0; |
| 1116 | hba->status_head = 0; |
| 1117 | hba->status_tail = 0; |
| 1118 | hba->out_req_cnt = 0; |
| 1119 | hba->mu_status = MU_STATE_STARTED; |
| 1120 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1121 | } |
| 1122 | return err; |
| 1123 | } |
| 1124 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1125 | static int stex_abort(struct scsi_cmnd *cmd) |
| 1126 | { |
| 1127 | struct Scsi_Host *host = cmd->device->host; |
| 1128 | struct st_hba *hba = (struct st_hba *)host->hostdata; |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1129 | u16 tag = cmd->request->tag; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1130 | void __iomem *base; |
| 1131 | u32 data; |
| 1132 | int result = SUCCESS; |
| 1133 | unsigned long flags; |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 1134 | |
| 1135 | printk(KERN_INFO DRV_NAME |
| 1136 | "(%s): aborting command\n", pci_name(hba->pdev)); |
| 1137 | scsi_print_command(cmd); |
| 1138 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1139 | base = hba->mmio_base; |
| 1140 | spin_lock_irqsave(host->host_lock, flags); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1141 | if (tag < host->can_queue && hba->ccb[tag].cmd == cmd) |
| 1142 | hba->wait_ccb = &hba->ccb[tag]; |
| 1143 | else { |
| 1144 | for (tag = 0; tag < host->can_queue; tag++) |
| 1145 | if (hba->ccb[tag].cmd == cmd) { |
| 1146 | hba->wait_ccb = &hba->ccb[tag]; |
| 1147 | break; |
| 1148 | } |
| 1149 | if (tag >= host->can_queue) |
| 1150 | goto out; |
| 1151 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1152 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1153 | if (hba->cardtype == st_yel) { |
| 1154 | data = readl(base + YI2H_INT); |
| 1155 | if (data == 0 || data == 0xffffffff) |
| 1156 | goto fail_out; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1157 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1158 | writel(data, base + YI2H_INT_C); |
| 1159 | stex_ss_mu_intr(hba); |
| 1160 | } else { |
| 1161 | data = readl(base + ODBL); |
| 1162 | if (data == 0 || data == 0xffffffff) |
| 1163 | goto fail_out; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1164 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1165 | writel(data, base + ODBL); |
| 1166 | readl(base + ODBL); /* flush */ |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1167 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1168 | stex_mu_intr(hba, data); |
| 1169 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1170 | if (hba->wait_ccb == NULL) { |
| 1171 | printk(KERN_WARNING DRV_NAME |
| 1172 | "(%s): lost interrupt\n", pci_name(hba->pdev)); |
| 1173 | goto out; |
| 1174 | } |
| 1175 | |
| 1176 | fail_out: |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 1177 | scsi_dma_unmap(cmd); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1178 | hba->wait_ccb->req = NULL; /* nullify the req's future return */ |
| 1179 | hba->wait_ccb = NULL; |
| 1180 | result = FAILED; |
| 1181 | out: |
| 1182 | spin_unlock_irqrestore(host->host_lock, flags); |
| 1183 | return result; |
| 1184 | } |
| 1185 | |
| 1186 | static void stex_hard_reset(struct st_hba *hba) |
| 1187 | { |
| 1188 | struct pci_bus *bus; |
| 1189 | int i; |
| 1190 | u16 pci_cmd; |
| 1191 | u8 pci_bctl; |
| 1192 | |
| 1193 | for (i = 0; i < 16; i++) |
| 1194 | pci_read_config_dword(hba->pdev, i * 4, |
| 1195 | &hba->pdev->saved_config_space[i]); |
| 1196 | |
| 1197 | /* Reset secondary bus. Our controller(MU/ATU) is the only device on |
| 1198 | secondary bus. Consult Intel 80331/3 developer's manual for detail */ |
| 1199 | bus = hba->pdev->bus; |
| 1200 | pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl); |
| 1201 | pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 1202 | pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl); |
Ed Lin | 69f4a51 | 2007-05-09 20:50:37 -0800 | [diff] [blame] | 1203 | |
| 1204 | /* |
| 1205 | * 1 ms may be enough for 8-port controllers. But 16-port controllers |
| 1206 | * require more time to finish bus reset. Use 100 ms here for safety |
| 1207 | */ |
| 1208 | msleep(100); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1209 | pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 1210 | pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl); |
| 1211 | |
Ed Lin | 76fbf96 | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 1212 | for (i = 0; i < MU_HARD_RESET_WAIT; i++) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1213 | pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd); |
Ed Lin | 47c4f99 | 2006-12-04 17:49:31 -0800 | [diff] [blame] | 1214 | if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER)) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1215 | break; |
| 1216 | msleep(1); |
| 1217 | } |
| 1218 | |
| 1219 | ssleep(5); |
| 1220 | for (i = 0; i < 16; i++) |
| 1221 | pci_write_config_dword(hba->pdev, i * 4, |
| 1222 | hba->pdev->saved_config_space[i]); |
| 1223 | } |
| 1224 | |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 1225 | static void stex_ss_reset(struct st_hba *hba) |
| 1226 | { |
| 1227 | writel(SS_H2I_INT_RESET, hba->mmio_base + YH2I_INT); |
| 1228 | readl(hba->mmio_base + YH2I_INT); |
| 1229 | ssleep(5); |
| 1230 | } |
| 1231 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1232 | static int stex_reset(struct scsi_cmnd *cmd) |
| 1233 | { |
| 1234 | struct st_hba *hba; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 1235 | void __iomem *base; |
| 1236 | unsigned long flags, before; |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 1237 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1238 | hba = (struct st_hba *) &cmd->device->host->hostdata[0]; |
| 1239 | |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 1240 | printk(KERN_INFO DRV_NAME |
| 1241 | "(%s): resetting host\n", pci_name(hba->pdev)); |
| 1242 | scsi_print_command(cmd); |
| 1243 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1244 | hba->mu_status = MU_STATE_RESETTING; |
| 1245 | |
| 1246 | if (hba->cardtype == st_shasta) |
| 1247 | stex_hard_reset(hba); |
Ed Lin | 69cb487 | 2009-08-18 12:15:14 -0700 | [diff] [blame] | 1248 | else if (hba->cardtype == st_yel) |
| 1249 | stex_ss_reset(hba); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1250 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 1251 | if (hba->cardtype != st_yosemite) { |
| 1252 | if (stex_handshake(hba)) { |
| 1253 | printk(KERN_WARNING DRV_NAME |
| 1254 | "(%s): resetting: handshake failed\n", |
| 1255 | pci_name(hba->pdev)); |
| 1256 | return FAILED; |
| 1257 | } |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 1258 | return SUCCESS; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1259 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1260 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 1261 | /* st_yosemite */ |
| 1262 | writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL); |
| 1263 | readl(hba->mmio_base + IDBL); /* flush */ |
| 1264 | before = jiffies; |
| 1265 | while (hba->out_req_cnt > 0) { |
| 1266 | if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) { |
| 1267 | printk(KERN_WARNING DRV_NAME |
| 1268 | "(%s): reset timeout\n", pci_name(hba->pdev)); |
| 1269 | return FAILED; |
| 1270 | } |
| 1271 | msleep(1); |
| 1272 | } |
| 1273 | |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 1274 | base = hba->mmio_base; |
| 1275 | writel(0, base + IMR0); |
| 1276 | readl(base + IMR0); |
| 1277 | writel(0, base + OMR0); |
| 1278 | readl(base + OMR0); |
| 1279 | writel(0, base + IMR1); |
| 1280 | readl(base + IMR1); |
| 1281 | writel(0, base + OMR1); |
| 1282 | readl(base + OMR1); /* flush */ |
| 1283 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1284 | hba->req_head = 0; |
| 1285 | hba->req_tail = 0; |
| 1286 | hba->status_head = 0; |
| 1287 | hba->status_tail = 0; |
| 1288 | hba->out_req_cnt = 0; |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 1289 | hba->mu_status = MU_STATE_STARTED; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 1290 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1291 | return SUCCESS; |
| 1292 | } |
| 1293 | |
| 1294 | static int stex_biosparam(struct scsi_device *sdev, |
| 1295 | struct block_device *bdev, sector_t capacity, int geom[]) |
| 1296 | { |
Ed Lin | b4b8bed | 2006-12-04 17:49:24 -0800 | [diff] [blame] | 1297 | int heads = 255, sectors = 63; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1298 | |
| 1299 | if (capacity < 0x200000) { |
| 1300 | heads = 64; |
| 1301 | sectors = 32; |
| 1302 | } |
| 1303 | |
Ed Lin | b4b8bed | 2006-12-04 17:49:24 -0800 | [diff] [blame] | 1304 | sector_div(capacity, heads * sectors); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1305 | |
| 1306 | geom[0] = heads; |
| 1307 | geom[1] = sectors; |
Ed Lin | b4b8bed | 2006-12-04 17:49:24 -0800 | [diff] [blame] | 1308 | geom[2] = capacity; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1309 | |
| 1310 | return 0; |
| 1311 | } |
| 1312 | |
| 1313 | static struct scsi_host_template driver_template = { |
| 1314 | .module = THIS_MODULE, |
| 1315 | .name = DRV_NAME, |
| 1316 | .proc_name = DRV_NAME, |
| 1317 | .bios_param = stex_biosparam, |
| 1318 | .queuecommand = stex_queuecommand, |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1319 | .slave_alloc = stex_slave_alloc, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1320 | .slave_configure = stex_slave_config, |
| 1321 | .slave_destroy = stex_slave_destroy, |
| 1322 | .eh_abort_handler = stex_abort, |
| 1323 | .eh_host_reset_handler = stex_reset, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1324 | .this_id = -1, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1325 | }; |
| 1326 | |
| 1327 | static struct pci_device_id stex_pci_tbl[] = { |
| 1328 | /* st_shasta */ |
| 1329 | { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1330 | st_shasta }, /* SuperTrak EX8350/8300/16350/16300 */ |
| 1331 | { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1332 | st_shasta }, /* SuperTrak EX12350 */ |
| 1333 | { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1334 | st_shasta }, /* SuperTrak EX4350 */ |
| 1335 | { 0x105a, 0xe350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1336 | st_shasta }, /* SuperTrak EX24350 */ |
| 1337 | |
| 1338 | /* st_vsc */ |
| 1339 | { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc }, |
| 1340 | |
| 1341 | /* st_yosemite */ |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1342 | { 0x105a, 0x8650, 0x105a, PCI_ANY_ID, 0, 0, st_yosemite }, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1343 | |
| 1344 | /* st_seq */ |
| 1345 | { 0x105a, 0x3360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_seq }, |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1346 | |
| 1347 | /* st_yel */ |
| 1348 | { 0x105a, 0x8650, 0x1033, PCI_ANY_ID, 0, 0, st_yel }, |
| 1349 | { 0x105a, 0x8760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yel }, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1350 | { } /* terminate list */ |
| 1351 | }; |
| 1352 | |
| 1353 | static struct st_card_info stex_card_info[] = { |
| 1354 | /* st_shasta */ |
| 1355 | { |
| 1356 | .max_id = 17, |
| 1357 | .max_lun = 8, |
| 1358 | .max_channel = 0, |
| 1359 | .rq_count = 32, |
| 1360 | .rq_size = 1048, |
| 1361 | .sts_count = 32, |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1362 | .alloc_rq = stex_alloc_req, |
| 1363 | .map_sg = stex_map_sg, |
| 1364 | .send = stex_send_cmd, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1365 | }, |
| 1366 | |
| 1367 | /* st_vsc */ |
| 1368 | { |
| 1369 | .max_id = 129, |
| 1370 | .max_lun = 1, |
| 1371 | .max_channel = 0, |
| 1372 | .rq_count = 32, |
| 1373 | .rq_size = 1048, |
| 1374 | .sts_count = 32, |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1375 | .alloc_rq = stex_alloc_req, |
| 1376 | .map_sg = stex_map_sg, |
| 1377 | .send = stex_send_cmd, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1378 | }, |
| 1379 | |
| 1380 | /* st_yosemite */ |
| 1381 | { |
| 1382 | .max_id = 2, |
| 1383 | .max_lun = 256, |
| 1384 | .max_channel = 0, |
| 1385 | .rq_count = 256, |
| 1386 | .rq_size = 1048, |
| 1387 | .sts_count = 256, |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1388 | .alloc_rq = stex_alloc_req, |
| 1389 | .map_sg = stex_map_sg, |
| 1390 | .send = stex_send_cmd, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1391 | }, |
| 1392 | |
| 1393 | /* st_seq */ |
| 1394 | { |
| 1395 | .max_id = 129, |
| 1396 | .max_lun = 1, |
| 1397 | .max_channel = 0, |
| 1398 | .rq_count = 32, |
| 1399 | .rq_size = 1048, |
| 1400 | .sts_count = 32, |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1401 | .alloc_rq = stex_alloc_req, |
| 1402 | .map_sg = stex_map_sg, |
| 1403 | .send = stex_send_cmd, |
| 1404 | }, |
| 1405 | |
| 1406 | /* st_yel */ |
| 1407 | { |
| 1408 | .max_id = 129, |
| 1409 | .max_lun = 256, |
| 1410 | .max_channel = 3, |
| 1411 | .rq_count = 801, |
| 1412 | .rq_size = 512, |
| 1413 | .sts_count = 801, |
| 1414 | .alloc_rq = stex_ss_alloc_req, |
| 1415 | .map_sg = stex_ss_map_sg, |
| 1416 | .send = stex_ss_send_cmd, |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1417 | }, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1418 | }; |
| 1419 | |
| 1420 | static int stex_set_dma_mask(struct pci_dev * pdev) |
| 1421 | { |
| 1422 | int ret; |
Ed Lin - PTU | 7cfe99a | 2009-01-26 02:41:53 -0800 | [diff] [blame] | 1423 | |
Yang Hongyang | 6a35528 | 2009-04-06 19:01:13 -0700 | [diff] [blame] | 1424 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) |
| 1425 | && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1426 | return 0; |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 1427 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1428 | if (!ret) |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 1429 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1430 | return ret; |
| 1431 | } |
| 1432 | |
Ed Lin | 99946f8 | 2009-03-31 17:30:25 -0800 | [diff] [blame] | 1433 | static int stex_request_irq(struct st_hba *hba) |
| 1434 | { |
| 1435 | struct pci_dev *pdev = hba->pdev; |
| 1436 | int status; |
| 1437 | |
| 1438 | if (msi) { |
| 1439 | status = pci_enable_msi(pdev); |
| 1440 | if (status != 0) |
| 1441 | printk(KERN_ERR DRV_NAME |
| 1442 | "(%s): error %d setting up MSI\n", |
| 1443 | pci_name(pdev), status); |
| 1444 | else |
| 1445 | hba->msi_enabled = 1; |
| 1446 | } else |
| 1447 | hba->msi_enabled = 0; |
| 1448 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1449 | status = request_irq(pdev->irq, hba->cardtype == st_yel ? |
| 1450 | stex_ss_intr : stex_intr, IRQF_SHARED, DRV_NAME, hba); |
Ed Lin | 99946f8 | 2009-03-31 17:30:25 -0800 | [diff] [blame] | 1451 | |
| 1452 | if (status != 0) { |
| 1453 | if (hba->msi_enabled) |
| 1454 | pci_disable_msi(pdev); |
| 1455 | } |
| 1456 | return status; |
| 1457 | } |
| 1458 | |
| 1459 | static void stex_free_irq(struct st_hba *hba) |
| 1460 | { |
| 1461 | struct pci_dev *pdev = hba->pdev; |
| 1462 | |
| 1463 | free_irq(pdev->irq, hba); |
| 1464 | if (hba->msi_enabled) |
| 1465 | pci_disable_msi(pdev); |
| 1466 | } |
| 1467 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1468 | static int __devinit |
| 1469 | stex_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
| 1470 | { |
| 1471 | struct st_hba *hba; |
| 1472 | struct Scsi_Host *host; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1473 | const struct st_card_info *ci = NULL; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1474 | u32 sts_offset, cp_offset, scratch_offset; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1475 | int err; |
| 1476 | |
| 1477 | err = pci_enable_device(pdev); |
| 1478 | if (err) |
| 1479 | return err; |
| 1480 | |
| 1481 | pci_set_master(pdev); |
| 1482 | |
| 1483 | host = scsi_host_alloc(&driver_template, sizeof(struct st_hba)); |
| 1484 | |
| 1485 | if (!host) { |
| 1486 | printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n", |
| 1487 | pci_name(pdev)); |
| 1488 | err = -ENOMEM; |
| 1489 | goto out_disable; |
| 1490 | } |
| 1491 | |
| 1492 | hba = (struct st_hba *)host->hostdata; |
| 1493 | memset(hba, 0, sizeof(struct st_hba)); |
| 1494 | |
| 1495 | err = pci_request_regions(pdev, DRV_NAME); |
| 1496 | if (err < 0) { |
| 1497 | printk(KERN_ERR DRV_NAME "(%s): request regions failed\n", |
| 1498 | pci_name(pdev)); |
| 1499 | goto out_scsi_host_put; |
| 1500 | } |
| 1501 | |
Arjan van de Ven | 25729a7 | 2008-09-28 16:18:02 -0700 | [diff] [blame] | 1502 | hba->mmio_base = pci_ioremap_bar(pdev, 0); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1503 | if ( !hba->mmio_base) { |
| 1504 | printk(KERN_ERR DRV_NAME "(%s): memory map failed\n", |
| 1505 | pci_name(pdev)); |
| 1506 | err = -ENOMEM; |
| 1507 | goto out_release_regions; |
| 1508 | } |
| 1509 | |
| 1510 | err = stex_set_dma_mask(pdev); |
| 1511 | if (err) { |
| 1512 | printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n", |
| 1513 | pci_name(pdev)); |
| 1514 | goto out_iounmap; |
| 1515 | } |
| 1516 | |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1517 | hba->cardtype = (unsigned int) id->driver_data; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1518 | ci = &stex_card_info[hba->cardtype]; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1519 | sts_offset = scratch_offset = (ci->rq_count+1) * ci->rq_size; |
| 1520 | if (hba->cardtype == st_yel) |
| 1521 | sts_offset += (ci->sts_count+1) * sizeof(u32); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1522 | cp_offset = sts_offset + (ci->sts_count+1) * sizeof(struct status_msg); |
| 1523 | hba->dma_size = cp_offset + sizeof(struct st_frame); |
| 1524 | if (hba->cardtype == st_seq || |
| 1525 | (hba->cardtype == st_vsc && (pdev->subsystem_device & 1))) { |
| 1526 | hba->extra_offset = hba->dma_size; |
| 1527 | hba->dma_size += ST_ADDITIONAL_MEM; |
| 1528 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1529 | hba->dma_mem = dma_alloc_coherent(&pdev->dev, |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1530 | hba->dma_size, &hba->dma_handle, GFP_KERNEL); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1531 | if (!hba->dma_mem) { |
Ed Lin | cbacfb5 | 2009-09-28 22:58:17 -0800 | [diff] [blame^] | 1532 | /* Retry minimum coherent mapping for st_seq and st_vsc */ |
| 1533 | if (hba->cardtype == st_seq || |
| 1534 | (hba->cardtype == st_vsc && (pdev->subsystem_device & 1))) { |
| 1535 | printk(KERN_WARNING DRV_NAME |
| 1536 | "(%s): allocating min buffer for controller\n", |
| 1537 | pci_name(pdev)); |
| 1538 | hba->dma_size = hba->extra_offset |
| 1539 | + ST_ADDITIONAL_MEM_MIN; |
| 1540 | hba->dma_mem = dma_alloc_coherent(&pdev->dev, |
| 1541 | hba->dma_size, &hba->dma_handle, GFP_KERNEL); |
| 1542 | } |
| 1543 | |
| 1544 | if (!hba->dma_mem) { |
| 1545 | err = -ENOMEM; |
| 1546 | printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n", |
| 1547 | pci_name(pdev)); |
| 1548 | goto out_iounmap; |
| 1549 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1550 | } |
| 1551 | |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1552 | hba->ccb = kcalloc(ci->rq_count, sizeof(struct st_ccb), GFP_KERNEL); |
| 1553 | if (!hba->ccb) { |
| 1554 | err = -ENOMEM; |
| 1555 | printk(KERN_ERR DRV_NAME "(%s): ccb alloc failed\n", |
| 1556 | pci_name(pdev)); |
| 1557 | goto out_pci_free; |
| 1558 | } |
| 1559 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1560 | if (hba->cardtype == st_yel) |
| 1561 | hba->scratch = (__le32 *)(hba->dma_mem + scratch_offset); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1562 | hba->status_buffer = (struct status_msg *)(hba->dma_mem + sts_offset); |
| 1563 | hba->copy_buffer = hba->dma_mem + cp_offset; |
| 1564 | hba->rq_count = ci->rq_count; |
| 1565 | hba->rq_size = ci->rq_size; |
| 1566 | hba->sts_count = ci->sts_count; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1567 | hba->alloc_rq = ci->alloc_rq; |
| 1568 | hba->map_sg = ci->map_sg; |
| 1569 | hba->send = ci->send; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1570 | hba->mu_status = MU_STATE_STARTING; |
| 1571 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1572 | if (hba->cardtype == st_yel) |
| 1573 | host->sg_tablesize = 38; |
| 1574 | else |
| 1575 | host->sg_tablesize = 32; |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1576 | host->can_queue = ci->rq_count; |
| 1577 | host->cmd_per_lun = ci->rq_count; |
| 1578 | host->max_id = ci->max_id; |
| 1579 | host->max_lun = ci->max_lun; |
| 1580 | host->max_channel = ci->max_channel; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1581 | host->unique_id = host->host_no; |
| 1582 | host->max_cmd_len = STEX_CDB_LENGTH; |
| 1583 | |
| 1584 | hba->host = host; |
| 1585 | hba->pdev = pdev; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1586 | |
Ed Lin | 99946f8 | 2009-03-31 17:30:25 -0800 | [diff] [blame] | 1587 | err = stex_request_irq(hba); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1588 | if (err) { |
| 1589 | printk(KERN_ERR DRV_NAME "(%s): request irq failed\n", |
| 1590 | pci_name(pdev)); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1591 | goto out_ccb_free; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1592 | } |
| 1593 | |
| 1594 | err = stex_handshake(hba); |
| 1595 | if (err) |
| 1596 | goto out_free_irq; |
| 1597 | |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 1598 | err = scsi_init_shared_tag_map(host, host->can_queue); |
James Bottomley | deb81d8 | 2006-09-01 09:28:48 -0400 | [diff] [blame] | 1599 | if (err) { |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1600 | printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n", |
| 1601 | pci_name(pdev)); |
| 1602 | goto out_free_irq; |
| 1603 | } |
| 1604 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1605 | pci_set_drvdata(pdev, hba); |
| 1606 | |
| 1607 | err = scsi_add_host(host, &pdev->dev); |
| 1608 | if (err) { |
| 1609 | printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n", |
| 1610 | pci_name(pdev)); |
| 1611 | goto out_free_irq; |
| 1612 | } |
| 1613 | |
| 1614 | scsi_scan_host(host); |
| 1615 | |
| 1616 | return 0; |
| 1617 | |
| 1618 | out_free_irq: |
Ed Lin | 99946f8 | 2009-03-31 17:30:25 -0800 | [diff] [blame] | 1619 | stex_free_irq(hba); |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1620 | out_ccb_free: |
| 1621 | kfree(hba->ccb); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1622 | out_pci_free: |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1623 | dma_free_coherent(&pdev->dev, hba->dma_size, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1624 | hba->dma_mem, hba->dma_handle); |
| 1625 | out_iounmap: |
| 1626 | iounmap(hba->mmio_base); |
| 1627 | out_release_regions: |
| 1628 | pci_release_regions(pdev); |
| 1629 | out_scsi_host_put: |
| 1630 | scsi_host_put(host); |
| 1631 | out_disable: |
| 1632 | pci_disable_device(pdev); |
| 1633 | |
| 1634 | return err; |
| 1635 | } |
| 1636 | |
| 1637 | static void stex_hba_stop(struct st_hba *hba) |
| 1638 | { |
| 1639 | struct req_msg *req; |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1640 | struct st_msg_header *msg_h; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1641 | unsigned long flags; |
| 1642 | unsigned long before; |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1643 | u16 tag = 0; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1644 | |
| 1645 | spin_lock_irqsave(hba->host->host_lock, flags); |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1646 | req = hba->alloc_rq(hba); |
| 1647 | if (hba->cardtype == st_yel) { |
| 1648 | msg_h = (struct st_msg_header *)req - 1; |
| 1649 | memset(msg_h, 0, hba->rq_size); |
| 1650 | } else |
| 1651 | memset(req, 0, hba->rq_size); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1652 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1653 | if (hba->cardtype == st_yosemite || hba->cardtype == st_yel) { |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 1654 | req->cdb[0] = MGT_CMD; |
| 1655 | req->cdb[1] = MGT_CMD_SIGNATURE; |
| 1656 | req->cdb[2] = CTLR_CONFIG_CMD; |
| 1657 | req->cdb[3] = CTLR_SHUTDOWN; |
| 1658 | } else { |
| 1659 | req->cdb[0] = CONTROLLER_CMD; |
| 1660 | req->cdb[1] = CTLR_POWER_STATE_CHANGE; |
| 1661 | req->cdb[2] = CTLR_POWER_SAVING; |
| 1662 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1663 | |
| 1664 | hba->ccb[tag].cmd = NULL; |
| 1665 | hba->ccb[tag].sg_count = 0; |
| 1666 | hba->ccb[tag].sense_bufflen = 0; |
| 1667 | hba->ccb[tag].sense_buffer = NULL; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 1668 | hba->ccb[tag].req_type = PASSTHRU_REQ_TYPE; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1669 | |
Ed Lin | 0f3f6ee | 2009-03-31 17:30:36 -0800 | [diff] [blame] | 1670 | hba->send(hba, req, tag); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1671 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1672 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1673 | before = jiffies; |
| 1674 | while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) { |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 1675 | if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) { |
| 1676 | hba->ccb[tag].req_type = 0; |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1677 | return; |
Ed Lin | f149816 | 2009-03-31 17:30:19 -0800 | [diff] [blame] | 1678 | } |
| 1679 | msleep(1); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1680 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1681 | } |
| 1682 | |
| 1683 | static void stex_hba_free(struct st_hba *hba) |
| 1684 | { |
Ed Lin | 99946f8 | 2009-03-31 17:30:25 -0800 | [diff] [blame] | 1685 | stex_free_irq(hba); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1686 | |
| 1687 | iounmap(hba->mmio_base); |
| 1688 | |
| 1689 | pci_release_regions(hba->pdev); |
| 1690 | |
Ed Lin | 591a3a5 | 2009-03-31 17:30:31 -0800 | [diff] [blame] | 1691 | kfree(hba->ccb); |
| 1692 | |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1693 | dma_free_coherent(&hba->pdev->dev, hba->dma_size, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1694 | hba->dma_mem, hba->dma_handle); |
| 1695 | } |
| 1696 | |
| 1697 | static void stex_remove(struct pci_dev *pdev) |
| 1698 | { |
| 1699 | struct st_hba *hba = pci_get_drvdata(pdev); |
| 1700 | |
| 1701 | scsi_remove_host(hba->host); |
| 1702 | |
| 1703 | pci_set_drvdata(pdev, NULL); |
| 1704 | |
| 1705 | stex_hba_stop(hba); |
| 1706 | |
| 1707 | stex_hba_free(hba); |
| 1708 | |
| 1709 | scsi_host_put(hba->host); |
| 1710 | |
| 1711 | pci_disable_device(pdev); |
| 1712 | } |
| 1713 | |
| 1714 | static void stex_shutdown(struct pci_dev *pdev) |
| 1715 | { |
| 1716 | struct st_hba *hba = pci_get_drvdata(pdev); |
| 1717 | |
| 1718 | stex_hba_stop(hba); |
| 1719 | } |
| 1720 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1721 | MODULE_DEVICE_TABLE(pci, stex_pci_tbl); |
| 1722 | |
| 1723 | static struct pci_driver stex_pci_driver = { |
| 1724 | .name = DRV_NAME, |
| 1725 | .id_table = stex_pci_tbl, |
| 1726 | .probe = stex_probe, |
| 1727 | .remove = __devexit_p(stex_remove), |
| 1728 | .shutdown = stex_shutdown, |
| 1729 | }; |
| 1730 | |
| 1731 | static int __init stex_init(void) |
| 1732 | { |
| 1733 | printk(KERN_INFO DRV_NAME |
| 1734 | ": Promise SuperTrak EX Driver version: %s\n", |
| 1735 | ST_DRIVER_VERSION); |
| 1736 | |
| 1737 | return pci_register_driver(&stex_pci_driver); |
| 1738 | } |
| 1739 | |
| 1740 | static void __exit stex_exit(void) |
| 1741 | { |
| 1742 | pci_unregister_driver(&stex_pci_driver); |
| 1743 | } |
| 1744 | |
| 1745 | module_init(stex_init); |
| 1746 | module_exit(stex_exit); |